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Commit ef0a3402 authored by Olof Johansson's avatar Olof Johansson
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Merge tag 'at91-dt' of git://github.com/at91linux/linux-at91 into next/dt 

From Nicolas Ferre:
Again some nice DT updates for AT91:
- DMA binding update with one patch shared with slave-dma tree
- more SPI DT activation
- enable the USB gadget HS for DT platforms

* tag 'at91-dt' of git://github.com/at91linux/linux-at91:
  ARM: at91: sam9m10g45ek add udc DT support
  ARM: at91: sam9g45 add udc DT support
  ARM: at91: sam9x5ek add udc DT support
  ARM: at91: sam9x5 add udc DT support
  ARM: at91: dt: at91sam9x5: add SPI DMA client infos
  ARM: at91: dt: switch DMA DT bindings to pre-processor
  ARM: at91: dt: add header to define at_hdmac configuration
parents 37177fae 24ce10e1
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arch/arm/boot/dts/at91sam9g45.dtsi
View file @ ef0a3402
...@@ -10,6 +10,7 @@ ...@@ -10,6 +10,7 @@
*/ */
#include "skeleton.dtsi" #include "skeleton.dtsi"
#include <dt-bindings/dma/at91.h>
#include <dt-bindings/pinctrl/at91.h> #include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h> #include <dt-bindings/gpio/gpio.h>
...@@ -617,7 +618,7 @@ mmc0: mmc@fff80000 { ...@@ -617,7 +618,7 @@ mmc0: mmc@fff80000 {
compatible = "atmel,hsmci"; compatible = "atmel,hsmci";
reg = <0xfff80000 0x600>; reg = <0xfff80000 0x600>;
interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>; interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
dmas = <&dma 1 0>; dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>;
dma-names = "rxtx"; dma-names = "rxtx";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
...@@ -628,7 +629,7 @@ mmc1: mmc@fffd0000 { ...@@ -628,7 +629,7 @@ mmc1: mmc@fffd0000 {
compatible = "atmel,hsmci"; compatible = "atmel,hsmci";
reg = <0xfffd0000 0x600>; reg = <0xfffd0000 0x600>;
interrupts = <29 IRQ_TYPE_LEVEL_HIGH 0>; interrupts = <29 IRQ_TYPE_LEVEL_HIGH 0>;
dmas = <&dma 1 13>; dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>;
dma-names = "rxtx"; dma-names = "rxtx";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
...@@ -662,6 +663,68 @@ spi1: spi@fffa8000 { ...@@ -662,6 +663,68 @@ spi1: spi@fffa8000 {
pinctrl-0 = <&pinctrl_spi1>; pinctrl-0 = <&pinctrl_spi1>;
status = "disabled"; status = "disabled";
}; };
usb2: gadget@fff78000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "atmel,at91sam9rl-udc";
reg = <0x00600000 0x80000
0xfff78000 0x400>;
interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>;
status = "disabled";
ep0 {
reg = <0>;
atmel,fifo-size = <64>;
atmel,nb-banks = <1>;
};
ep1 {
reg = <1>;
atmel,fifo-size = <1024>;
atmel,nb-banks = <2>;
atmel,can-dma;
atmel,can-isoc;
};
ep2 {
reg = <2>;
atmel,fifo-size = <1024>;
atmel,nb-banks = <2>;
atmel,can-dma;
atmel,can-isoc;
};
ep3 {
reg = <3>;
atmel,fifo-size = <1024>;
atmel,nb-banks = <3>;
atmel,can-dma;
};
ep4 {
reg = <4>;
atmel,fifo-size = <1024>;
atmel,nb-banks = <3>;
atmel,can-dma;
};
ep5 {
reg = <5>;
atmel,fifo-size = <1024>;
atmel,nb-banks = <3>;
atmel,can-dma;
atmel,can-isoc;
};
ep6 {
reg = <6>;
atmel,fifo-size = <1024>;
atmel,nb-banks = <3>;
atmel,can-dma;
atmel,can-isoc;
};
};
}; };
nand0: nand@40000000 { nand0: nand@40000000 {
......
arch/arm/boot/dts/at91sam9m10g45ek.dts
View file @ ef0a3402
...@@ -116,6 +116,11 @@ mtd_dataflash@0 { ...@@ -116,6 +116,11 @@ mtd_dataflash@0 {
reg = <0>; reg = <0>;
}; };
}; };
usb2: gadget@fff78000 {
atmel,vbus-gpio = <&pioB 19 GPIO_ACTIVE_HIGH>;
status = "okay";
};
}; };
nand0: nand@40000000 { nand0: nand@40000000 {
......
arch/arm/boot/dts/at91sam9n12.dtsi
View file @ ef0a3402
...@@ -8,6 +8,7 @@ ...@@ -8,6 +8,7 @@
*/ */
#include "skeleton.dtsi" #include "skeleton.dtsi"
#include <dt-bindings/dma/at91.h>
#include <dt-bindings/pinctrl/at91.h> #include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h> #include <dt-bindings/gpio/gpio.h>
...@@ -97,7 +98,7 @@ mmc0: mmc@f0008000 { ...@@ -97,7 +98,7 @@ mmc0: mmc@f0008000 {
compatible = "atmel,hsmci"; compatible = "atmel,hsmci";
reg = <0xf0008000 0x600>; reg = <0xf0008000 0x600>;
interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>; interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
dmas = <&dma 1 0>; dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>;
dma-names = "rxtx"; dma-names = "rxtx";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
...@@ -465,8 +466,8 @@ i2c0: i2c@f8010000 { ...@@ -465,8 +466,8 @@ i2c0: i2c@f8010000 {
compatible = "atmel,at91sam9x5-i2c"; compatible = "atmel,at91sam9x5-i2c";
reg = <0xf8010000 0x100>; reg = <0xf8010000 0x100>;
interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>; interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>;
dmas = <&dma 1 13>, dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>,
<&dma 1 14>; <&dma 1 AT91_DMA_CFG_PER_ID(14)>;
dma-names = "tx", "rx"; dma-names = "tx", "rx";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
...@@ -477,8 +478,8 @@ i2c1: i2c@f8014000 { ...@@ -477,8 +478,8 @@ i2c1: i2c@f8014000 {
compatible = "atmel,at91sam9x5-i2c"; compatible = "atmel,at91sam9x5-i2c";
reg = <0xf8014000 0x100>; reg = <0xf8014000 0x100>;
interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>; interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>;
dmas = <&dma 1 15>, dmas = <&dma 1 AT91_DMA_CFG_PER_ID(15)>,
<&dma 1 16>; <&dma 1 AT91_DMA_CFG_PER_ID(16)>;
dma-names = "tx", "rx"; dma-names = "tx", "rx";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
......
arch/arm/boot/dts/at91sam9x5.dtsi
View file @ ef0a3402
...@@ -10,6 +10,7 @@ ...@@ -10,6 +10,7 @@
*/ */
#include "skeleton.dtsi" #include "skeleton.dtsi"
#include <dt-bindings/dma/at91.h>
#include <dt-bindings/pinctrl/at91.h> #include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h> #include <dt-bindings/gpio/gpio.h>
...@@ -550,7 +551,7 @@ mmc0: mmc@f0008000 { ...@@ -550,7 +551,7 @@ mmc0: mmc@f0008000 {
compatible = "atmel,hsmci"; compatible = "atmel,hsmci";
reg = <0xf0008000 0x600>; reg = <0xf0008000 0x600>;
interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>; interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
dmas = <&dma0 1 0>; dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(0)>;
dma-names = "rxtx"; dma-names = "rxtx";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
...@@ -561,7 +562,7 @@ mmc1: mmc@f000c000 { ...@@ -561,7 +562,7 @@ mmc1: mmc@f000c000 {
compatible = "atmel,hsmci"; compatible = "atmel,hsmci";
reg = <0xf000c000 0x600>; reg = <0xf000c000 0x600>;
interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>; interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
dmas = <&dma1 1 0>; dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(0)>;
dma-names = "rxtx"; dma-names = "rxtx";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
...@@ -624,8 +625,8 @@ i2c0: i2c@f8010000 { ...@@ -624,8 +625,8 @@ i2c0: i2c@f8010000 {
compatible = "atmel,at91sam9x5-i2c"; compatible = "atmel,at91sam9x5-i2c";
reg = <0xf8010000 0x100>; reg = <0xf8010000 0x100>;
interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>; interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>;
dmas = <&dma0 1 7>, dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(7)>,
<&dma0 1 8>; <&dma0 1 AT91_DMA_CFG_PER_ID(8)>;
dma-names = "tx", "rx"; dma-names = "tx", "rx";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
...@@ -638,8 +639,8 @@ i2c1: i2c@f8014000 { ...@@ -638,8 +639,8 @@ i2c1: i2c@f8014000 {
compatible = "atmel,at91sam9x5-i2c"; compatible = "atmel,at91sam9x5-i2c";
reg = <0xf8014000 0x100>; reg = <0xf8014000 0x100>;
interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>; interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>;
dmas = <&dma1 1 5>, dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(5)>,
<&dma1 1 6>; <&dma1 1 AT91_DMA_CFG_PER_ID(6)>;
dma-names = "tx", "rx"; dma-names = "tx", "rx";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
...@@ -652,8 +653,8 @@ i2c2: i2c@f8018000 { ...@@ -652,8 +653,8 @@ i2c2: i2c@f8018000 {
compatible = "atmel,at91sam9x5-i2c"; compatible = "atmel,at91sam9x5-i2c";
reg = <0xf8018000 0x100>; reg = <0xf8018000 0x100>;
interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>; interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
dmas = <&dma0 1 9>, dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(9)>,
<&dma0 1 10>; <&dma0 1 AT91_DMA_CFG_PER_ID(10)>;
dma-names = "tx", "rx"; dma-names = "tx", "rx";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
...@@ -727,6 +728,9 @@ spi0: spi@f0000000 { ...@@ -727,6 +728,9 @@ spi0: spi@f0000000 {
compatible = "atmel,at91rm9200-spi"; compatible = "atmel,at91rm9200-spi";
reg = <0xf0000000 0x100>; reg = <0xf0000000 0x100>;
interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>; interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(1)>,
<&dma0 1 AT91_DMA_CFG_PER_ID(2)>;
dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0>; pinctrl-0 = <&pinctrl_spi0>;
status = "disabled"; status = "disabled";
...@@ -738,11 +742,76 @@ spi1: spi@f0004000 { ...@@ -738,11 +742,76 @@ spi1: spi@f0004000 {
compatible = "atmel,at91rm9200-spi"; compatible = "atmel,at91rm9200-spi";
reg = <0xf0004000 0x100>; reg = <0xf0004000 0x100>;
interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>; interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(1)>,
<&dma1 1 AT91_DMA_CFG_PER_ID(2)>;
dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1>; pinctrl-0 = <&pinctrl_spi1>;
status = "disabled"; status = "disabled";
}; };
usb2: gadget@f803c000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "atmel,at91sam9rl-udc";
reg = <0x00500000 0x80000
0xf803c000 0x400>;
interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>;
status = "disabled";
ep0 {
reg = <0>;
atmel,fifo-size = <64>;
atmel,nb-banks = <1>;
};
ep1 {
reg = <1>;
atmel,fifo-size = <1024>;
atmel,nb-banks = <2>;
atmel,can-dma;
atmel,can-isoc;
};
ep2 {
reg = <2>;
atmel,fifo-size = <1024>;
atmel,nb-banks = <2>;
atmel,can-dma;
atmel,can-isoc;
};
ep3 {
reg = <3>;
atmel,fifo-size = <1024>;
atmel,nb-banks = <3>;
atmel,can-dma;
};
ep4 {
reg = <4>;
atmel,fifo-size = <1024>;
atmel,nb-banks = <3>;
atmel,can-dma;
};
ep5 {
reg = <5>;
atmel,fifo-size = <1024>;
atmel,nb-banks = <3>;
atmel,can-dma;
atmel,can-isoc;
};
ep6 {
reg = <6>;
atmel,fifo-size = <1024>;
atmel,nb-banks = <3>;
atmel,can-dma;
atmel,can-isoc;
};
};
watchdog@fffffe40 { watchdog@fffffe40 {
compatible = "atmel,at91sam9260-wdt"; compatible = "atmel,at91sam9260-wdt";
reg = <0xfffffe40 0x10>; reg = <0xfffffe40 0x10>;
......
arch/arm/boot/dts/at91sam9x5ek.dtsi
View file @ ef0a3402
...@@ -52,6 +52,11 @@ usart0: serial@f801c000 { ...@@ -52,6 +52,11 @@ usart0: serial@f801c000 {
status = "okay"; status = "okay";
}; };
usb2: gadget@f803c000 {
atmel,vbus-gpio = <&pioB 16 GPIO_ACTIVE_HIGH>;
status = "okay";
};
i2c0: i2c@f8010000 { i2c0: i2c@f8010000 {
status = "okay"; status = "okay";
}; };
......
arch/arm/boot/dts/sama5d3.dtsi
View file @ ef0a3402
...@@ -9,6 +9,7 @@ ...@@ -9,6 +9,7 @@
*/ */
#include "skeleton.dtsi" #include "skeleton.dtsi"
#include <dt-bindings/dma/at91.h>
#include <dt-bindings/pinctrl/at91.h> #include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h> #include <dt-bindings/gpio/gpio.h>
...@@ -67,7 +68,7 @@ mmc0: mmc@f0000000 { ...@@ -67,7 +68,7 @@ mmc0: mmc@f0000000 {
compatible = "atmel,hsmci"; compatible = "atmel,hsmci";
reg = <0xf0000000 0x600>; reg = <0xf0000000 0x600>;
interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>; interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
dmas = <&dma0 2 0>; dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(0)>;
dma-names = "rxtx"; dma-names = "rxtx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7>; pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7>;
...@@ -115,8 +116,8 @@ i2c0: i2c@f0014000 { ...@@ -115,8 +116,8 @@ i2c0: i2c@f0014000 {
compatible = "atmel,at91sam9x5-i2c"; compatible = "atmel,at91sam9x5-i2c";
reg = <0xf0014000 0x4000>; reg = <0xf0014000 0x4000>;
interrupts = <18 IRQ_TYPE_LEVEL_HIGH 6>; interrupts = <18 IRQ_TYPE_LEVEL_HIGH 6>;
dmas = <&dma0 2 7>, dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(7)>,
<&dma0 2 8>; <&dma0 2 AT91_DMA_CFG_PER_ID(8)>;
dma-names = "tx", "rx"; dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c0>; pinctrl-0 = <&pinctrl_i2c0>;
...@@ -129,8 +130,8 @@ i2c1: i2c@f0018000 { ...@@ -129,8 +130,8 @@ i2c1: i2c@f0018000 {
compatible = "atmel,at91sam9x5-i2c"; compatible = "atmel,at91sam9x5-i2c";
reg = <0xf0018000 0x4000>; reg = <0xf0018000 0x4000>;
interrupts = <19 IRQ_TYPE_LEVEL_HIGH 6>; interrupts = <19 IRQ_TYPE_LEVEL_HIGH 6>;
dmas = <&dma0 2 9>, dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(9)>,
<&dma0 2 10>; <&dma0 2 AT91_DMA_CFG_PER_ID(10)>;
dma-names = "tx", "rx"; dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>; pinctrl-0 = <&pinctrl_i2c1>;
...@@ -177,7 +178,7 @@ mmc1: mmc@f8000000 { ...@@ -177,7 +178,7 @@ mmc1: mmc@f8000000 {
compatible = "atmel,hsmci"; compatible = "atmel,hsmci";
reg = <0xf8000000 0x600>; reg = <0xf8000000 0x600>;
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 0>; interrupts = <22 IRQ_TYPE_LEVEL_HIGH 0>;
dmas = <&dma1 2 0>; dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(0)>;
dma-names = "rxtx"; dma-names = "rxtx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>; pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>;
...@@ -190,7 +191,7 @@ mmc2: mmc@f8004000 { ...@@ -190,7 +191,7 @@ mmc2: mmc@f8004000 {
compatible = "atmel,hsmci"; compatible = "atmel,hsmci";
reg = <0xf8004000 0x600>; reg = <0xf8004000 0x600>;
interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>; interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>;
dmas = <&dma1 2 1>; dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(1)>;
dma-names = "rxtx"; dma-names = "rxtx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mmc2_clk_cmd_dat0 &pinctrl_mmc2_dat1_3>; pinctrl-0 = <&pinctrl_mmc2_clk_cmd_dat0 &pinctrl_mmc2_dat1_3>;
...@@ -303,8 +304,8 @@ i2c2: i2c@f801c000 { ...@@ -303,8 +304,8 @@ i2c2: i2c@f801c000 {
compatible = "atmel,at91sam9x5-i2c"; compatible = "atmel,at91sam9x5-i2c";
reg = <0xf801c000 0x4000>; reg = <0xf801c000 0x4000>;
interrupts = <20 IRQ_TYPE_LEVEL_HIGH 6>; interrupts = <20 IRQ_TYPE_LEVEL_HIGH 6>;
dmas = <&dma1 2 11>, dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(11)>,
<&dma1 2 12>; <&dma1 2 AT91_DMA_CFG_PER_ID(12)>;
dma-names = "tx", "rx"; dma-names = "tx", "rx";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
......
arch/arm/mach-at91/at91sam9g45.c
View file @ ef0a3402
...@@ -266,6 +266,8 @@ static struct clk_lookup periph_clocks_lookups[] = { ...@@ -266,6 +266,8 @@ static struct clk_lookup periph_clocks_lookups[] = {
CLKDEV_CON_DEV_ID(NULL, "fff88000.i2c", &twi1_clk), CLKDEV_CON_DEV_ID(NULL, "fff88000.i2c", &twi1_clk),
CLKDEV_CON_DEV_ID("spi_clk", "fffa4000.spi", &spi0_clk), CLKDEV_CON_DEV_ID("spi_clk", "fffa4000.spi", &spi0_clk),
CLKDEV_CON_DEV_ID("spi_clk", "fffa8000.spi", &spi1_clk), CLKDEV_CON_DEV_ID("spi_clk", "fffa8000.spi", &spi1_clk),
CLKDEV_CON_DEV_ID("hclk", "600000.gadget", &utmi_clk),
CLKDEV_CON_DEV_ID("pclk", "600000.gadget", &udphs_clk),
/* fake hclk clock */ /* fake hclk clock */
CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &uhphs_clk), CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &uhphs_clk),
CLKDEV_CON_DEV_ID(NULL, "fffff200.gpio", &pioA_clk), CLKDEV_CON_DEV_ID(NULL, "fffff200.gpio", &pioA_clk),
......
arch/arm/mach-at91/at91sam9x5.c
View file @ ef0a3402
...@@ -249,6 +249,8 @@ static struct clk_lookup periph_clocks_lookups[] = { ...@@ -249,6 +249,8 @@ static struct clk_lookup periph_clocks_lookups[] = {
CLKDEV_CON_DEV_ID("hclk", "600000.ohci", &uhphs_clk), CLKDEV_CON_DEV_ID("hclk", "600000.ohci", &uhphs_clk),
CLKDEV_CON_DEV_ID("ohci_clk", "600000.ohci", &uhphs_clk), CLKDEV_CON_DEV_ID("ohci_clk", "600000.ohci", &uhphs_clk),
CLKDEV_CON_DEV_ID("ehci_clk", "700000.ehci", &uhphs_clk), CLKDEV_CON_DEV_ID("ehci_clk", "700000.ehci", &uhphs_clk),
CLKDEV_CON_DEV_ID("hclk", "500000.gadget", &utmi_clk),
CLKDEV_CON_DEV_ID("pclk", "500000.gadget", &udphs_clk),
}; };
/* /*
......
include/dt-bindings/dma/at91.h 0 → 100644
View file @ ef0a3402
/*
* This header provides macros for at91 dma bindings.
*
* Copyright (C) 2013 Ludovic Desroches <ludovic.desroches@atmel.com>
*
* GPLv2 only
*/
#ifndef __DT_BINDINGS_AT91_DMA_H__
#define __DT_BINDINGS_AT91_DMA_H__
/*
* Source and/or destination peripheral ID
*/
#define AT91_DMA_CFG_PER_ID_MASK (0xff)
#define AT91_DMA_CFG_PER_ID(id) (id & AT91_DMA_CFG_PER_ID_MASK)
/*
* FIFO configuration: it defines when a request is serviced.
*/
#define AT91_DMA_CFG_FIFOCFG_OFFSET (8)
#define AT91_DMA_CFG_FIFOCFG_MASK (0xf << AT91_DMA_CFG_FIFOCFG_OFFSET)
#define AT91_DMA_CFG_FIFOCFG_HALF (0x0 << AT91_DMA_CFG_FIFOCFG_OFFSET) /* half FIFO (default behavior) */
#define AT91_DMA_CFG_FIFOCFG_ALAP (0x1 << AT91_DMA_CFG_FIFOCFG_OFFSET) /* largest defined AHB burst */
#define AT91_DMA_CFG_FIFOCFG_ASAP (0x2 << AT91_DMA_CFG_FIFOCFG_OFFSET) /* single AHB access */
#endif /* __DT_BINDINGS_AT91_DMA_H__ */
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