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Commit ef389b73 authored by Ingo Molnar's avatar Ingo Molnar
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Merge branch 'WIP.x86/asm' into x86/urgent, because the topic is ready 

Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parents a774635d c76fc982
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.mailmap
View file @ ef389b73
......@@ -62,6 +62,7 @@ Frank Zago <fzago@systemfabricworks.com>
Greg Kroah-Hartman <greg@echidna.(none)>
Greg Kroah-Hartman <gregkh@suse.de>
Greg Kroah-Hartman <greg@kroah.com>
Gregory CLEMENT <gregory.clement@bootlin.com> <gregory.clement@free-electrons.com>
Henk Vergonet <Henk.Vergonet@gmail.com>
Henrik Kretzschmar <henne@nachtwindheim.de>
Henrik Rydberg <rydberg@bitmath.org>
......
CREDITS
View file @ ef389b73
......@@ -1564,6 +1564,11 @@ W: http://www.carumba.com/
D: bug toaster (A1 sauce makes all the difference)
D: Random linux hacker
N: James Hogan
E: jhogan@kernel.org
D: Metag architecture maintainer
D: TZ1090 SoC maintainer
N: Tim Hockin
E: thockin@hockin.org
W: http://www.hockin.org/~thockin
......
Documentation/00-INDEX
View file @ ef389b73
......@@ -66,8 +66,6 @@ backlight/
- directory with info on controlling backlights in flat panel displays
bcache.txt
- Block-layer cache on fast SSDs to improve slow (raid) I/O performance.
blackfin/
- directory with documentation for the Blackfin arch.
block/
- info on the Block I/O (BIO) layer.
blockdev/
......@@ -114,8 +112,6 @@ cputopology.txt
- documentation on how CPU topology info is exported via sysfs.
crc32.txt
- brief tutorial on CRC computation
cris/
- directory with info about Linux on CRIS architecture.
crypto/
- directory with info on the Crypto API.
dcdbas.txt
......@@ -172,8 +168,6 @@ fmc/
- information about the FMC bus abstraction
fpga/
- FPGA Manager Core.
frv/
- Fujitsu FR-V Linux documentation.
futex-requeue-pi.txt
- info on requeueing of tasks from a non-PI futex to a PI futex
gcc-plugins.txt
......@@ -276,8 +270,6 @@ memory-hotplug.txt
- Hotpluggable memory support, how to use and current status.
men-chameleon-bus.txt
- info on MEN chameleon bus.
metag/
- directory with info about Linux on Meta architecture.
mic/
- Intel Many Integrated Core (MIC) architecture device driver.
mips/
......@@ -286,8 +278,6 @@ misc-devices/
- directory with info about devices using the misc dev subsystem
mmc/
- directory with info about the MMC subsystem
mn10300/
- directory with info about the mn10300 architecture port
mtd/
- directory with info about memory technology devices (flash)
namespaces/
......
Documentation/ABI/testing/sysfs-ata
View file @ ef389b73
What: /sys/class/ata_...
Date: August 2008
Contact: Gwendal Grignou<gwendal@google.com>
Description:
Provide a place in sysfs for storing the ATA topology of the system. This allows
retrieving various information about ATA objects.
Provide a place in sysfs for storing the ATA topology of the
system. This allows retrieving various information about ATA
objects.
Files under /sys/class/ata_port
-------------------------------
For each port, a directory ataX is created where X is the ata_port_id of
the port. The device parent is the ata host device.
For each port, a directory ataX is created where X is the ata_port_id of the
port. The device parent is the ata host device.
idle_irq (read)
Number of IRQ received by the port while idle [some ata HBA only].
What: /sys/class/ata_port/ataX/nr_pmp_links
What: /sys/class/ata_port/ataX/idle_irq
Date: May, 2010
KernelVersion: v2.6.37
Contact: Gwendal Grignou <gwendal@chromium.org>
Description:
nr_pmp_links: (RO) If a SATA Port Multiplier (PM) is
connected, the number of links behind it.
nr_pmp_links (read)
idle_irq: (RO) Number of IRQ received by the port while
idle [some ata HBA only].
If a SATA Port Multiplier (PM) is connected, number of link behind it.
What: /sys/class/ata_port/ataX/port_no
Date: May, 2013
KernelVersion: v3.11
Contact: Gwendal Grignou <gwendal@chromium.org>
Description:
(RO) Host local port number. While registering host controller,
port numbers are tracked based upon number of ports available on
the controller. This attribute is needed by udev for composing
persistent links in /dev/disk/by-path.
Files under /sys/class/ata_link
-------------------------------
Behind each port, there is a ata_link. If there is a SATA PM in the
topology, 15 ata_link objects are created.
If a link is behind a port, the directory name is linkX, where X is
ata_port_id of the port.
If a link is behind a PM, its name is linkX.Y where X is ata_port_id
of the parent port and Y the PM port.
Behind each port, there is a ata_link. If there is a SATA PM in the topology, 15
ata_link objects are created.
hw_sata_spd_limit
If a link is behind a port, the directory name is linkX, where X is ata_port_id
of the port. If a link is behind a PM, its name is linkX.Y where X is
ata_port_id of the parent port and Y the PM port.
Maximum speed supported by the connected SATA device.
sata_spd_limit
What: /sys/class/ata_link/linkX[.Y]/hw_sata_spd_limit
What: /sys/class/ata_link/linkX[.Y]/sata_spd_limit
What: /sys/class/ata_link/linkX[.Y]/sata_spd
Date: May, 2010
KernelVersion: v2.6.37
Contact: Gwendal Grignou <gwendal@chromium.org>
Description:
hw_sata_spd_limit: (RO) Maximum speed supported by the
connected SATA device.
Maximum speed imposed by libata.
sata_spd_limit: (RO) Maximum speed imposed by libata.
sata_spd
sata_spd: (RO) Current speed of the link
eg. 1.5, 3 Gbps etc.
Current speed of the link [1.5, 3Gps,...].
Files under /sys/class/ata_device
---------------------------------
Behind each link, up to two ata device are created.
The name of the directory is devX[.Y].Z where:
- X is ata_port_id of the port where the device is connected,
- Y the port of the PM if any, and
- Z the device id: for PATA, there is usually 2 devices [0,1],
only 1 for SATA.
class
Device class. Can be "ata" for disk, "atapi" for packet device,
"pmp" for PM, or "none" if no device was found behind the link.
dma_mode
Behind each link, up to two ata devices are created.
The name of the directory is devX[.Y].Z where:
- X is ata_port_id of the port where the device is connected,
- Y the port of the PM if any, and
- Z the device id: for PATA, there is usually 2 devices [0,1], only 1 for SATA.
What: /sys/class/ata_device/devX[.Y].Z/spdn_cnt
What: /sys/class/ata_device/devX[.Y].Z/gscr
What: /sys/class/ata_device/devX[.Y].Z/ering
What: /sys/class/ata_device/devX[.Y].Z/id
What: /sys/class/ata_device/devX[.Y].Z/pio_mode
What: /sys/class/ata_device/devX[.Y].Z/xfer_mode
What: /sys/class/ata_device/devX[.Y].Z/dma_mode
What: /sys/class/ata_device/devX[.Y].Z/class
Date: May, 2010
KernelVersion: v2.6.37
Contact: Gwendal Grignou <gwendal@chromium.org>
Description:
spdn_cnt: (RO) Number of times libata decided to lower the
speed of link due to errors.
Transfer modes supported by the device when in DMA mode.
Mostly used by PATA device.
gscr: (RO) Cached result of the dump of PM GSCR
register. Valid registers are:
pio_mode
0: SATA_PMP_GSCR_PROD_ID,
1: SATA_PMP_GSCR_REV,
2: SATA_PMP_GSCR_PORT_INFO,
32: SATA_PMP_GSCR_ERROR,
33: SATA_PMP_GSCR_ERROR_EN,
64: SATA_PMP_GSCR_FEAT,
96: SATA_PMP_GSCR_FEAT_EN,
130: SATA_PMP_GSCR_SII_GPIO
Transfer modes supported by the device when in PIO mode.
Mostly used by PATA device.
Only valid if the device is a PM.
xfer_mode
ering: (RO) Formatted output of the error ring of the
device.
Current transfer mode.
id: (RO) Cached result of IDENTIFY command, as
described in ATA8 7.16 and 7.17. Only valid if
the device is not a PM.
id
pio_mode: (RO) Transfer modes supported by the device when
in PIO mode. Mostly used by PATA device.
Cached result of IDENTIFY command, as described in ATA8 7.16 and 7.17.
Only valid if the device is not a PM.
xfer_mode: (RO) Current transfer mode
gscr
dma_mode: (RO) Transfer modes supported by the device when
in DMA mode. Mostly used by PATA device.
Cached result of the dump of PM GSCR register.
Valid registers are:
0: SATA_PMP_GSCR_PROD_ID,
1: SATA_PMP_GSCR_REV,
2: SATA_PMP_GSCR_PORT_INFO,
32: SATA_PMP_GSCR_ERROR,
33: SATA_PMP_GSCR_ERROR_EN,
64: SATA_PMP_GSCR_FEAT,
96: SATA_PMP_GSCR_FEAT_EN,
130: SATA_PMP_GSCR_SII_GPIO
Only valid if the device is a PM.
class: (RO) Device class. Can be "ata" for disk,
"atapi" for packet device, "pmp" for PM, or
"none" if no device was found behind the link.
trim
Shows the DSM TRIM mode currently used by the device. Valid
values are:
unsupported: Drive does not support DSM TRIM
unqueued: Drive supports unqueued DSM TRIM only
queued: Drive supports queued DSM TRIM
forced_unqueued: Drive's queued DSM support is known to be
buggy and only unqueued TRIM commands
are sent
What: /sys/class/ata_device/devX[.Y].Z/trim
Date: May, 2015
KernelVersion: v4.10
Contact: Gwendal Grignou <gwendal@chromium.org>
Description:
(RO) Shows the DSM TRIM mode currently used by the device. Valid
values are:
spdn_cnt
unsupported: Drive does not support DSM TRIM
Number of time libata decided to lower the speed of link due to errors.
unqueued: Drive supports unqueued DSM TRIM only
ering
queued: Drive supports queued DSM TRIM
Formatted output of the error ring of the device.
forced_unqueued: Drive's queued DSM support is known to
be buggy and only unqueued TRIM commands
are sent
Documentation/ABI/testing/sysfs-block-device 0 → 100644
View file @ ef389b73
What: /sys/block/*/device/sw_activity
Date: Jun, 2008
KernelVersion: v2.6.27
Contact: linux-ide@vger.kernel.org
Description:
(RW) Used by drivers which support software controlled activity
LEDs.
It has the following valid values:
0 OFF - the LED is not activated on activity
1 BLINK_ON - the LED blinks on every 10ms when activity is
detected.
2 BLINK_OFF - the LED is on when idle, and blinks off
every 10ms when activity is detected.
Note that the user must turn sw_activity OFF it they wish to
control the activity LED via the em_message file.
What: /sys/block/*/device/unload_heads
Date: Sep, 2008
KernelVersion: v2.6.28
Contact: linux-ide@vger.kernel.org
Description:
(RW) Hard disk shock protection
Writing an integer value to this file will take the heads of the
respective drive off the platter and block all I/O operations
for the specified number of milliseconds.
- If the device does not support the unload heads feature,
access is denied with -EOPNOTSUPP.
- The maximal value accepted for a timeout is 30000
milliseconds.
- A previously set timeout can be cancelled and disk can resume
normal operation immediately by specifying a timeout of 0.
- Some hard drives only comply with an earlier version of the
ATA standard, but support the unload feature nonetheless.
There is no safe way Linux can detect these devices, so this
is not enabled by default. If it is known that your device
does support the unload feature, then you can tell the kernel
to enable it by writing -1. It can be disabled again by
writing -2.
- Values below -2 are rejected with -EINVAL
For more information, see
Documentation/laptops/disk-shock-protection.txt
What: /sys/block/*/device/ncq_prio_enable
Date: Oct, 2016
KernelVersion: v4.10
Contact: linux-ide@vger.kernel.org
Description:
(RW) Write to the file to turn on or off the SATA ncq (native
command queueing) support. By default this feature is turned
off.
Documentation/ABI/testing/sysfs-class-scsi_host
View file @ ef389b73
......@@ -27,3 +27,92 @@ Description: This file contains the current status of the "SSD Smart Path"
the direct i/o path to physical devices. This setting is
controller wide, affecting all configured logical drives on the
controller. This file is readable and writable.
What: /sys/class/scsi_host/hostX/link_power_management_policy
Date: Oct, 2007
KernelVersion: v2.6.24
Contact: linux-ide@vger.kernel.org
Description:
(RW) This parameter allows the user to read and set the link
(interface) power management.
There are four possible options:
min_power: Tell the controller to try to make the link use the
least possible power when possible. This may sacrifice some
performance due to increased latency when coming out of lower
power states.
max_performance: Generally, this means no power management.
Tell the controller to have performance be a priority over power
management.
medium_power: Tell the controller to enter a lower power state
when possible, but do not enter the lowest power state, thus
improving latency over min_power setting.
med_power_with_dipm: Identical to the existing medium_power
setting except that it enables dipm (device initiated power
management) on top, which makes it match the Windows IRST (Intel
Rapid Storage Technology) driver settings. This setting is also
close to min_power, except that:
a) It does not use host-initiated slumber mode, but it does
allow device-initiated slumber
b) It does not enable low power device sleep mode (DevSlp).
What: /sys/class/scsi_host/hostX/em_message
What: /sys/class/scsi_host/hostX/em_message_type
Date: Jun, 2008
KernelVersion: v2.6.27
Contact: linux-ide@vger.kernel.org
Description:
em_message: (RW) Enclosure management support. For the LED
protocol, writes and reads correspond to the LED message format
as defined in the AHCI spec.
The user must turn sw_activity (under /sys/block/*/device/) OFF
it they wish to control the activity LED via the em_message
file.
em_message_type: (RO) Displays the current enclosure management
protocol that is being used by the driver (for eg. LED, SAF-TE,
SES-2, SGPIO etc).
What: /sys/class/scsi_host/hostX/ahci_port_cmd
What: /sys/class/scsi_host/hostX/ahci_host_caps
What: /sys/class/scsi_host/hostX/ahci_host_cap2
Date: Mar, 2010
KernelVersion: v2.6.35
Contact: linux-ide@vger.kernel.org
Description:
[to be documented]
What: /sys/class/scsi_host/hostX/ahci_host_version
Date: Mar, 2010
KernelVersion: v2.6.35
Contact: linux-ide@vger.kernel.org
Description:
(RO) Display the version of the AHCI spec implemented by the
host.
What: /sys/class/scsi_host/hostX/em_buffer
Date: Apr, 2010
KernelVersion: v2.6.35
Contact: linux-ide@vger.kernel.org
Description:
(RW) Allows access to AHCI EM (enclosure management) buffer
directly if the host supports EM.
For eg. the AHCI driver supports SGPIO EM messages but the
SATA/AHCI specs do not define the SGPIO message format of the EM
buffer. Different hardware(HW) vendors may have different
definitions. With the em_buffer attribute, this issue can be
solved by allowing HW vendors to provide userland drivers and
tools for their SGPIO initiators.
What: /sys/class/scsi_host/hostX/em_message_supported
Date: Oct, 2009
KernelVersion: v2.6.39
Contact: linux-ide@vger.kernel.org
Description:
(RO) Displays supported enclosure management message types.
Documentation/accelerators/ocxl.rst
View file @ ef389b73
......@@ -152,6 +152,11 @@ OCXL_IOCTL_IRQ_SET_FD:
Associate an event fd to an AFU interrupt so that the user process
can be notified when the AFU sends an interrupt.
OCXL_IOCTL_GET_METADATA:
Obtains configuration information from the card, such at the size of
MMIO areas, the AFU version, and the PASID for the current context.
mmap
----
......
Documentation/admin-guide/README.rst
View file @ ef389b73
......@@ -26,8 +26,8 @@ On what hardware does it run?
Although originally developed first for 32-bit x86-based PCs (386 or higher),
today Linux also runs on (at least) the Compaq Alpha AXP, Sun SPARC and
UltraSPARC, Motorola 68000, PowerPC, PowerPC64, ARM, Hitachi SuperH, Cell,
IBM S/390, MIPS, HP PA-RISC, Intel IA-64, DEC VAX, AMD x86-64, AXIS CRIS,
Xtensa, Tilera TILE, ARC and Renesas M32R architectures.
IBM S/390, MIPS, HP PA-RISC, Intel IA-64, DEC VAX, AMD x86-64 Xtensa, and
ARC architectures.
Linux is easily portable to most general-purpose 32- or 64-bit architectures
as long as they have a paged memory management unit (PMMU) and a port of the
......
Documentation/admin-guide/kernel-parameters.rst
View file @ ef389b73
......@@ -89,7 +89,6 @@ parameter is applicable::
APM Advanced Power Management support is enabled.
ARM ARM architecture is enabled.
AX25 Appropriate AX.25 support is enabled.
BLACKFIN Blackfin architecture is enabled.
CLK Common clock infrastructure is enabled.
CMA Contiguous Memory Area support is enabled.
DRM Direct Rendering Management support is enabled.
......
Documentation/admin-guide/kernel-parameters.txt
View file @ ef389b73
......@@ -1025,7 +1025,7 @@
address. The serial port must already be setup
and configured. Options are not yet supported.
earlyprintk= [X86,SH,BLACKFIN,ARM,M68k,S390]
earlyprintk= [X86,SH,ARM,M68k,S390]
earlyprintk=vga
earlyprintk=efi
earlyprintk=sclp
......@@ -1347,10 +1347,6 @@
If specified, z/VM IUCV HVC accepts connections
from listed z/VM user IDs only.
hwthread_map= [METAG] Comma-separated list of Linux cpu id to
hardware thread id mappings.
Format: <cpu>:<hwthread>
keep_bootcon [KNL]
Do not unregister boot console at start. This is only
useful for debugging when something happens in the window
......@@ -1766,6 +1762,17 @@
nohz
Disable the tick when a single task runs.
A residual 1Hz tick is offloaded to workqueues, which you
need to affine to housekeeping through the global
workqueue's affinity configured via the
/sys/devices/virtual/workqueue/cpumask sysfs file, or
by using the 'domain' flag described below.
NOTE: by default the global workqueue runs on all CPUs,
so to protect individual CPUs the 'cpumask' file has to
be configured manually after bootup.
domain
Isolate from the general SMP balancing and scheduling
algorithms. Note that performing domain isolation this way
......@@ -2237,6 +2244,15 @@
The memory region may be marked as e820 type 12 (0xc)
and is NVDIMM or ADR memory.
memmap=<size>%<offset>-<oldtype>+<newtype>
[KNL,ACPI] Convert memory within the specified region
from <oldtype> to <newtype>. If "-<oldtype>" is left
out, the whole region will be marked as <newtype>,
even if previously unavailable. If "+<newtype>" is left
out, matching memory will be removed. Types are
specified as e820 types, e.g., 1 = RAM, 2 = reserved,
3 = ACPI, 12 = PRAM.
memory_corruption_check=0/1 [X86]
Some BIOSes seem to corrupt the first 64k of
memory when doing things like suspend/resume.
......
Documentation/blackfin/00-INDEX deleted 100644 → 0
View file @ a774635d
00-INDEX
- This file
bfin-gpio-notes.txt
- Notes in developing/using bfin-gpio driver.
bfin-spi-notes.txt
- Notes for using bfin spi bus driver.
Documentation/blackfin/bfin-gpio-notes.txt deleted 100644 → 0
View file @ a774635d
/*
* File: Documentation/blackfin/bfin-gpio-notes.txt
* Based on:
* Author:
*
* Created: $Id: bfin-gpio-note.txt 2008-11-24 16:42 grafyang $
* Description: This file contains the notes in developing/using bfin-gpio.
*
*
* Rev:
*
* Modified:
* Copyright 2004-2008 Analog Devices Inc.
*
* Bugs: Enter bugs at http://blackfin.uclinux.org/
*
*/
1. Blackfin GPIO introduction
There are many GPIO pins on Blackfin. Most of these pins are muxed to
multi-functions. They can be configured as peripheral, or just as GPIO,
configured to input with interrupt enabled, or output.
For detailed information, please see "arch/blackfin/kernel/bfin_gpio.c",
or the relevant HRM.
2. Avoiding resource conflict
Followed function groups are used to avoiding resource conflict,
- Use the pin as peripheral,
int peripheral_request(unsigned short per, const char *label);
int peripheral_request_list(const unsigned short per[], const char *label);
void peripheral_free(unsigned short per);
void peripheral_free_list(const unsigned short per[]);
- Use the pin as GPIO,
int bfin_gpio_request(unsigned gpio, const char *label);
void bfin_gpio_free(unsigned gpio);
- Use the pin as GPIO interrupt,
int bfin_gpio_irq_request(unsigned gpio, const char *label);
void bfin_gpio_irq_free(unsigned gpio);
The request functions will record the function state for a certain pin,
the free functions will clear its function state.
Once a pin is requested, it can't be requested again before it is freed by
previous caller, otherwise kernel will dump stacks, and the request
function fail.
These functions are wrapped by other functions, most of the users need not
care.
3. But there are some exceptions
- Kernel permit the identical GPIO be requested both as GPIO and GPIO
interrupt.
Some drivers, like gpio-keys, need this behavior. Kernel only print out
warning messages like,
bfin-gpio: GPIO 24 is already reserved by gpio-keys: BTN0, and you are
configuring it as IRQ!
Note: Consider the case that, if there are two drivers need the
identical GPIO, one of them use it as GPIO, the other use it as
GPIO interrupt. This will really cause resource conflict. So if
there is any abnormal driver behavior, please check the bfin-gpio
warning messages.
- Kernel permit the identical GPIO be requested from the same driver twice.
Documentation/blackfin/bfin-spi-notes.txt deleted 100644 → 0
View file @ a774635d
SPI Chip Select behavior:
With the Blackfin on-chip SPI peripheral, there is some logic tied to the CPHA
bit whether the Slave Select Line is controlled by hardware (CPHA=0) or
controlled by software (CPHA=1). However, the Linux SPI bus driver assumes that
the Slave Select is always under software control and being asserted during
the entire SPI transfer. - And not just bits_per_word duration.
In most cases you can utilize SPI MODE_3 instead of MODE_0 to work-around this
behavior. If your SPI slave device in question requires SPI MODE_0 or MODE_2
timing, you can utilize the GPIO controlled SPI Slave Select option instead.
In this case, you should use GPIO based CS for all of your slaves and not just
the ones using mode 0 or 2 in order to guarantee correct CS toggling behavior.
You can even use the same pin whose peripheral role is a SSEL,
but use it as a GPIO instead.
Documentation/cris/README deleted 100644 → 0
View file @ a774635d
Linux on the CRIS architecture
==============================
This is a port of Linux to Axis Communications ETRAX 100LX,
ETRAX FS and ARTPEC-3 embedded network CPUs.
For more information about CRIS and ETRAX please see further below.
In order to compile this you need a version of gcc with support for the
ETRAX chip family. Please see this link for more information on how to
download the compiler and other tools useful when building and booting
software for the ETRAX platform:
http://developer.axis.com/wiki/doku.php?id=axis:install-howto-2_20
What is CRIS ?
--------------
CRIS is an acronym for 'Code Reduced Instruction Set'. It is the CPU
architecture in Axis Communication AB's range of embedded network CPU's,
called ETRAX.
The ETRAX 100LX chip
--------------------
For reference, please see the following link:
http://www.axis.com/products/dev_etrax_100lx/index.htm
The ETRAX 100LX is a 100 MIPS processor with 8kB cache, MMU, and a very broad
range of built-in interfaces, all with modern scatter/gather DMA.
Memory interfaces:
* SRAM
* NOR-flash/ROM
* EDO or page-mode DRAM
* SDRAM
I/O interfaces:
* one 10/100 Mbit/s ethernet controller
* four serial-ports (up to 6 Mbit/s)
* two synchronous serial-ports for multimedia codec's etc.
* USB host controller and USB slave
* ATA
* SCSI
* two parallel-ports
* two generic 8-bit ports
(not all interfaces are available at the same time due to chip pin
multiplexing)
ETRAX 100LX is CRISv10 architecture.
The ETRAX FS and ARTPEC-3 chips
-------------------------------
The ETRAX FS is a 200MHz 32-bit RISC processor with on-chip 16kB
I-cache and 16kB D-cache and with a wide range of device interfaces
including multiple high speed serial ports and an integrated USB 1.1 PHY.
The ARTPEC-3 is a variant of the ETRAX FS with additional IO-units
used by the Axis Communications network cameras.
See below link for more information:
http://www.axis.com/products/dev_etrax_fs/index.htm
ETRAX FS and ARTPEC-3 are both CRISv32 architectures.
Bootlog
-------
Just as an example, this is the debug-output from a boot of Linux 2.4 on
a board with ETRAX 100LX. The displayed BogoMIPS value is 5 times too small :)
At the end you see some user-mode programs booting like telnet and ftp daemons.
Linux version 2.4.1 (bjornw@godzilla.axis.se) (gcc version 2.96 20000427 (experimental)) #207 Wed Feb 21 15:48:15 CET 2001
ROM fs in RAM, size 1376256 bytes
Setting up paging and the MMU.
On node 0 totalpages: 2048
zone(0): 2048 pages.
zone(1): 0 pages.
zone(2): 0 pages.
Linux/CRIS port on ETRAX 100LX (c) 2001 Axis Communications AB
Kernel command line:
Calibrating delay loop... 19.91 BogoMIPS
Memory: 13872k/16384k available (587k kernel code, 2512k reserved, 44k data, 24k init)
kmem_create: Forcing size word alignment - vm_area_struct
kmem_create: Forcing size word alignment - filp
Dentry-cache hash table entries: 2048 (order: 1, 16384 bytes)
Buffer-cache hash table entries: 2048 (order: 0, 8192 bytes)
Page-cache hash table entries: 2048 (order: 0, 8192 bytes)
kmem_create: Forcing size word alignment - kiobuf
kmem_create: Forcing size word alignment - bdev_cache
Inode-cache hash table entries: 1024 (order: 0, 8192 bytes)
kmem_create: Forcing size word alignment - inode_cache
POSIX conformance testing by UNIFIX
Linux NET4.0 for Linux 2.4
Based upon Swansea University Computer Society NET3.039
Starting kswapd v1.8
kmem_create: Forcing size word alignment - file lock cache
kmem_create: Forcing size word alignment - blkdev_requests
block: queued sectors max/low 9109kB/3036kB, 64 slots per queue
ETRAX 100LX 10/100MBit ethernet v2.0 (c) 2000 Axis Communications AB
eth0 initialized
eth0: changed MAC to 00:40:8C:CD:00:00
ETRAX 100LX serial-driver $Revision: 1.7 $, (c) 2000 Axis Communications AB
ttyS0 at 0xb0000060 is a builtin UART with DMA
ttyS1 at 0xb0000068 is a builtin UART with DMA
ttyS2 at 0xb0000070 is a builtin UART with DMA
ttyS3 at 0xb0000078 is a builtin UART with DMA
Axis flash mapping: 200000 at 50000000
Axis flash: Found 1 x16 CFI device at 0x0 in 16 bit mode
Amd/Fujitsu Extended Query Table v1.0 at 0x0040
Axis flash: JEDEC Device ID is 0xC4. Assuming broken CFI table.
Axis flash: Swapping erase regions for broken CFI table.
number of CFI chips: 1
Using default partition table
I2C driver v2.2, (c) 1999-2001 Axis Communications AB
ETRAX 100LX GPIO driver v2.1, (c) 2001 Axis Communications AB
NET4: Linux TCP/IP 1.0 for NET4.0
IP Protocols: ICMP, UDP, TCP
kmem_create: Forcing size word alignment - ip_dst_cache
IP: routing cache hash table of 1024 buckets, 8Kbytes
TCP: Hash tables configured (established 2048 bind 2048)
NET4: Unix domain sockets 1.0/SMP for Linux NET4.0.
VFS: Mounted root (cramfs filesystem) readonly.
Init starts up...
Mounted none on /proc ok.
Setting up eth0 with ip 10.13.9.116 and mac 00:40:8c:18:04:60
eth0: changed MAC to 00:40:8C:18:04:60
Setting up lo with ip 127.0.0.1
Default gateway is 10.13.9.1
Hostname is bbox1
Telnetd starting, using port 23.
using /bin/sash as shell.
sftpd[15]: sftpd $Revision: 1.7 $ starting up
And here is how some /proc entries look:
17# cd /proc
17# cat cpuinfo
cpu : CRIS
cpu revision : 10
cpu model : ETRAX 100LX
cache size : 8 kB
fpu : no
mmu : yes
ethernet : 10/100 Mbps
token ring : no
scsi : yes
ata : yes
usb : yes
bogomips : 99.84
17# cat meminfo
total: used: free: shared: buffers: cached:
Mem: 7028736 925696 6103040 114688 0 229376
Swap: 0 0 0
MemTotal: 6864 kB
MemFree: 5960 kB
MemShared: 112 kB
Buffers: 0 kB
Cached: 224 kB
Active: 224 kB
Inact_dirty: 0 kB
Inact_clean: 0 kB
Inact_target: 0 kB
HighTotal: 0 kB
HighFree: 0 kB
LowTotal: 6864 kB
LowFree: 5960 kB
SwapTotal: 0 kB
SwapFree: 0 kB
17# ls -l /bin
-rwxr-xr-x 1 342 100 10356 Jan 01 00:00 ifconfig
-rwxr-xr-x 1 342 100 17548 Jan 01 00:00 init
-rwxr-xr-x 1 342 100 9488 Jan 01 00:00 route
-rwxr-xr-x 1 342 100 46036 Jan 01 00:00 sftpd
-rwxr-xr-x 1 342 100 48104 Jan 01 00:00 sh
-rwxr-xr-x 1 342 100 16252 Jan 01 00:00 telnetd
Documentation/dev-tools/kmemleak.rst
View file @ ef389b73
......@@ -8,7 +8,7 @@ with the difference that the orphan objects are not freed but only
reported via /sys/kernel/debug/kmemleak. A similar method is used by the
Valgrind tool (``memcheck --leak-check``) to detect the memory leaks in
user-space applications.
Kmemleak is supported on x86, arm, powerpc, sparc, sh, microblaze, ppc, mips, s390, metag and tile.
Kmemleak is supported on x86, arm, powerpc, sparc, sh, microblaze, ppc, mips, s390 and tile.
Usage
-----
......
Documentation/devicetree/bindings/cris/axis.txt deleted 100644 → 0
View file @ a774635d
Axis Communications AB
ARTPEC series SoC Device Tree Bindings
CRISv32 based SoCs are ETRAX FS and ARTPEC-3:
- compatible = "axis,crisv32";
Documentation/devicetree/bindings/cris/boards.txt deleted 100644 → 0
View file @ a774635d
Boards based on the CRIS SoCs:
Required root node properties:
- compatible = should be one or more of the following:
- "axis,dev88" - for Axis devboard 88 with ETRAX FS
Optional:
Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt 0 → 100644
View file @ ef389b73
Renesas R-Car LVDS Encoder
==========================
These DT bindings describe the LVDS encoder embedded in the Renesas R-Car
Gen2, R-Car Gen3 and RZ/G SoCs.
Required properties:
- compatible : Shall contain one of
- "renesas,r8a7743-lvds" for R8A7743 (RZ/G1M) compatible LVDS encoders
- "renesas,r8a7790-lvds" for R8A7790 (R-Car H2) compatible LVDS encoders
- "renesas,r8a7791-lvds" for R8A7791 (R-Car M2-W) compatible LVDS encoders
- "renesas,r8a7793-lvds" for R8A7793 (R-Car M2-N) compatible LVDS encoders
- "renesas,r8a7795-lvds" for R8A7795 (R-Car H3) compatible LVDS encoders
- "renesas,r8a7796-lvds" for R8A7796 (R-Car M3-W) compatible LVDS encoders
- "renesas,r8a77970-lvds" for R8A77970 (R-Car V3M) compatible LVDS encoders
- "renesas,r8a77995-lvds" for R8A77995 (R-Car D3) compatible LVDS encoders
- reg: Base address and length for the memory-mapped registers
- clocks: A phandle + clock-specifier pair for the functional clock
- resets: A phandle + reset specifier for the module reset
Required nodes:
The LVDS encoder has two video ports. Their connections are modelled using the
OF graph bindings specified in Documentation/devicetree/bindings/graph.txt.
- Video port 0 corresponds to the parallel RGB input
- Video port 1 corresponds to the LVDS output
Each port shall have a single endpoint.
Example:
lvds0: lvds@feb90000 {
compatible = "renesas,r8a7790-lvds";
reg = <0 0xfeb90000 0 0x1c>;
clocks = <&cpg CPG_MOD 726>;
resets = <&cpg 726>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
lvds0_in: endpoint {
remote-endpoint = <&du_out_lvds0>;
};
};
port@1 {
reg = <1>;
lvds0_out: endpoint {
};
};
};
};
Documentation/devicetree/bindings/display/bridge/ti,ths8135.txt deleted 100644 → 0
View file @ a774635d
THS8135 Video DAC
-----------------
This is the binding for Texas Instruments THS8135 Video DAC bridge.
Required properties:
- compatible: Must be "ti,ths8135"
Required nodes:
This device has two video ports. Their connections are modelled using the OF
graph bindings specified in Documentation/devicetree/bindings/graph.txt.
- Video port 0 for RGB input
- Video port 1 for VGA output
Example
-------
vga-bridge {
compatible = "ti,ths8135";
#address-cells = <1>;
#size-cells = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
vga_bridge_in: endpoint {
remote-endpoint = <&lcdc_out_vga>;
};
};
port@1 {
reg = <1>;
vga_bridge_out: endpoint {
remote-endpoint = <&vga_con_in>;
};
};
};
};
Documentation/devicetree/bindings/display/bridge/ti,ths813x.txt 0 → 100644
View file @ ef389b73
THS8134 and THS8135 Video DAC
-----------------------------
This is the binding for Texas Instruments THS8134, THS8134A, THS8134B and
THS8135 Video DAC bridges.
Required properties:
- compatible: Must be one of
"ti,ths8134"
"ti,ths8134a," "ti,ths8134"
"ti,ths8134b", "ti,ths8134"
"ti,ths8135"
Required nodes:
This device has two video ports. Their connections are modelled using the OF
graph bindings specified in Documentation/devicetree/bindings/graph.txt.
- Video port 0 for RGB input
- Video port 1 for VGA output
Example
-------
vga-bridge {
compatible = "ti,ths8135";
#address-cells = <1>;
#size-cells = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
vga_bridge_in: endpoint {
remote-endpoint = <&lcdc_out_vga>;
};
};
port@1 {
reg = <1>;
vga_bridge_out: endpoint {
remote-endpoint = <&vga_con_in>;
};
};
};
};
Documentation/devicetree/bindings/display/connector/dvi-connector.txt
View file @ ef389b73
......@@ -10,6 +10,7 @@ Optional properties:
- analog: the connector has DVI analog pins
- digital: the connector has DVI digital pins
- dual-link: the connector has pins for DVI dual-link
- hpd-gpios: HPD GPIO number
Required nodes:
- Video port for DVI input
......
Documentation/devicetree/bindings/display/etnaviv/etnaviv-drm.txt
View file @ ef389b73
Etnaviv DRM master device
=========================
The Etnaviv DRM master device is a virtual device needed to list all
Vivante GPU cores that comprise the GPU subsystem.
Required properties:
- compatible: Should be one of
"fsl,imx-gpu-subsystem"
"marvell,dove-gpu-subsystem"
- cores: Should contain a list of phandles pointing to Vivante GPU devices
example:
gpu-subsystem {
compatible = "fsl,imx-gpu-subsystem";
cores = <&gpu_2d>, <&gpu_3d>;
};
Vivante GPU core devices
========================
......@@ -32,7 +12,9 @@ Required properties:
- clocks: should contain one clock for entry in clock-names
see Documentation/devicetree/bindings/clock/clock-bindings.txt
- clock-names:
- "bus": AXI/register clock
- "bus": AXI/master interface clock
- "reg": AHB/slave interface clock
(only required if GPU can gate slave interface independently)
- "core": GPU core clock
- "shader": Shader clock (only required if GPU has feature PIPE_3D)
......
Documentation/devicetree/bindings/display/exynos/exynos_hdmi.txt
View file @ ef389b73
......@@ -16,6 +16,7 @@ Required properties:
- ddc: phandle to the hdmi ddc node
- phy: phandle to the hdmi phy node
- samsung,syscon-phandle: phandle for system controller node for PMU.
- #sound-dai-cells: should be 0.
Required properties for Exynos 4210, 4212, 5420 and 5433:
- clocks: list of clock IDs from SoC clock driver.
......
Documentation/devicetree/bindings/display/msm/dsi.txt
View file @ ef389b73
......@@ -7,8 +7,6 @@ Required properties:
- reg: Physical base address and length of the registers of controller
- reg-names: The names of register regions. The following regions are required:
* "dsi_ctrl"
- qcom,dsi-host-index: The ID of DSI controller hardware instance. This should
be 0 or 1, since we have 2 DSI controllers at most for now.
- interrupts: The interrupt signal from the DSI block.
- power-domains: Should be <&mmcc MDSS_GDSC>.
- clocks: Phandles to device clocks.
......@@ -22,6 +20,8 @@ Required properties:
* "core"
For DSIv2, we need an additional clock:
* "src"
For DSI6G v2.0 onwards, we need also need the clock:
* "byte_intf"
- assigned-clocks: Parents of "byte" and "pixel" for the given platform.
- assigned-clock-parents: The Byte clock and Pixel clock PLL outputs provided
by a DSI PHY block. See [1] for details on clock bindings.
......@@ -88,21 +88,35 @@ Required properties:
* "qcom,dsi-phy-28nm-lp"
* "qcom,dsi-phy-20nm"
* "qcom,dsi-phy-28nm-8960"
- reg: Physical base address and length of the registers of PLL, PHY and PHY
regulator
* "qcom,dsi-phy-14nm"
* "qcom,dsi-phy-10nm"
- reg: Physical base address and length of the registers of PLL, PHY. Some
revisions require the PHY regulator base address, whereas others require the
PHY lane base address. See below for each PHY revision.
- reg-names: The names of register regions. The following regions are required:
For DSI 28nm HPM/LP/8960 PHYs and 20nm PHY:
* "dsi_pll"
* "dsi_phy"
* "dsi_phy_regulator"
For DSI 14nm and 10nm PHYs:
* "dsi_pll"
* "dsi_phy"
* "dsi_phy_lane"
- clock-cells: Must be 1. The DSI PHY block acts as a clock provider, creating
2 clocks: A byte clock (index 0), and a pixel clock (index 1).
- qcom,dsi-phy-index: The ID of DSI PHY hardware instance. This should
be 0 or 1, since we have 2 DSI PHYs at most for now.
- power-domains: Should be <&mmcc MDSS_GDSC>.
- clocks: Phandles to device clocks. See [1] for details on clock bindings.
- clock-names: the following clocks are required:
* "iface"
For 28nm HPM/LP, 28nm 8960 PHYs:
- vddio-supply: phandle to vdd-io regulator device node
For 20nm PHY:
- vddio-supply: phandle to vdd-io regulator device node
- vcca-supply: phandle to vcca regulator device node
For 14nm PHY:
- vcca-supply: phandle to vcca regulator device node
For 10nm PHY:
- vdds-supply: phandle to vdds regulator device node
Optional properties:
- qcom,dsi-phy-regulator-ldo-mode: Boolean value indicating if the LDO mode PHY
......
Documentation/devicetree/bindings/display/panel/arm,versatile-tft-panel.txt 0 → 100644
View file @ ef389b73
ARM Versatile TFT Panels
These panels are connected to the daughterboards found on the
ARM Versatile reference designs.
This device node must appear as a child to a "syscon"-compatible
node.
Required properties:
- compatible: should be "arm,versatile-tft-panel"
Required subnodes:
- port: see display/panel/panel-common.txt, graph.txt
Example:
sysreg@0 {
compatible = "arm,versatile-sysreg", "syscon", "simple-mfd";
reg = <0x00000 0x1000>;
panel: display@0 {
compatible = "arm,versatile-tft-panel";
port {
panel_in: endpoint {
remote-endpoint = <&foo>;
};
};
};
};
Documentation/devicetree/bindings/display/panel/auo,g104sn02.txt 0 → 100644
View file @ ef389b73
AU Optronics Corporation 10.4" (800x600) color TFT LCD panel
Required properties:
- compatible: should be "auo,g104sn02"
- power-supply: as specified in the base binding
Optional properties:
- backlight: as specified in the base binding
- enable-gpios: as specified in the base binding
This binding is compatible with the simple-panel binding, which is specified
in simple-panel.txt in this directory.
Documentation/devicetree/bindings/display/panel/display-timing.txt
View file @ ef389b73
......@@ -80,6 +80,11 @@ The parameters are defined as:
| | v | | |
+----------+-------------------------------------+----------+-------+
Note: In addition to being used as subnode(s) of display-timings, the timing
subnode may also be used on its own. This is appropriate if only one mode
need be conveyed. In this case, the node should be named 'panel-timing'.
Example:
display-timings {
......
Documentation/devicetree/bindings/display/panel/koe,tx31d200vm0baa.txt 0 → 100644
View file @ ef389b73
Kaohsiung Opto-Electronics. TX31D200VM0BAA 12.3" HSXGA LVDS panel
This binding is compatible with the simple-panel binding, which is specified
in simple-panel.txt in this directory.
Required properties:
- compatible: should be "koe,tx31d200vm0baa"
Optional properties:
- backlight: phandle of the backlight device attached to the panel
Optional nodes:
- Video port for LVDS panel input.
Example:
panel {
compatible = "koe,tx31d200vm0baa";
backlight = <&backlight_lvds>;
port {
panel_in: endpoint {
remote-endpoint = <&lvds0_out>;
};
};
};
Documentation/devicetree/bindings/display/panel/orisetech,otm8009a.txt
View file @ ef389b73
......@@ -9,6 +9,7 @@ Required properties:
Optional properties:
- reset-gpios: a GPIO spec for the reset pin (active low).
- power-supply: phandle of the regulator that provides the supply voltage.
Example:
&dsi {
......@@ -17,5 +18,6 @@ Example:
compatible = "orisetech,otm8009a";
reg = <0>;
reset-gpios = <&gpioh 7 GPIO_ACTIVE_LOW>;
power-supply = <&v1v8>;
};
};
Documentation/devicetree/bindings/display/panel/raydium,rm68200.txt 0 → 100644
View file @ ef389b73
Raydium Semiconductor Corporation RM68200 5.5" 720p MIPI-DSI TFT LCD panel
The Raydium Semiconductor Corporation RM68200 is a 5.5" 720x1280 TFT LCD
panel connected using a MIPI-DSI video interface.
Required properties:
- compatible: "raydium,rm68200"
- reg: the virtual channel number of a DSI peripheral
Optional properties:
- reset-gpios: a GPIO spec for the reset pin (active low).
- power-supply: phandle of the regulator that provides the supply voltage.
- backlight: phandle of the backlight device attached to the panel.
Example:
&dsi {
...
panel@0 {
compatible = "raydium,rm68200";
reg = <0>;
reset-gpios = <&gpiof 15 GPIO_ACTIVE_LOW>;
power-supply = <&v1v8>;
backlight = <&pwm_backlight>;
};
};
Documentation/devicetree/bindings/display/panel/simple-panel.txt
View file @ ef389b73
Simple display panel
====================
panel node
----------
Required properties:
- power-supply: See panel-common.txt
......
Documentation/devicetree/bindings/display/renesas,du.txt
View file @ ef389b73
......@@ -13,13 +13,10 @@ Required Properties:
- "renesas,du-r8a7794" for R8A7794 (R-Car E2) compatible DU
- "renesas,du-r8a7795" for R8A7795 (R-Car H3) compatible DU
- "renesas,du-r8a7796" for R8A7796 (R-Car M3-W) compatible DU
- "renesas,du-r8a77970" for R8A77970 (R-Car V3M) compatible DU
- "renesas,du-r8a77995" for R8A77995 (R-Car D3) compatible DU
- reg: A list of base address and length of each memory resource, one for
each entry in the reg-names property.
- reg-names: Name of the memory resources. The DU requires one memory
resource for the DU core (named "du") and one memory resource for each
LVDS encoder (named "lvds.x" with "x" being the LVDS controller numerical
index).
- reg: the memory-mapped I/O registers base address and length
- interrupt-parent: phandle of the parent interrupt controller.
- interrupts: Interrupt specifiers for the DU interrupts.
......@@ -29,14 +26,13 @@ Required Properties:
- clock-names: Name of the clocks. This property is model-dependent.
- R8A7779 uses a single functional clock. The clock doesn't need to be
named.
- All other DU instances use one functional clock per channel and one
clock per LVDS encoder (if available). The functional clocks must be
named "du.x" with "x" being the channel numerical index. The LVDS clocks
must be named "lvds.x" with "x" being the LVDS encoder numerical index.
- In addition to the functional and encoder clocks, all DU versions also
support externally supplied pixel clocks. Those clocks are optional.
When supplied they must be named "dclkin.x" with "x" being the input
clock numerical index.
- All other DU instances use one functional clock per channel The
functional clocks must be named "du.x" with "x" being the channel
numerical index.
- In addition to the functional clocks, all DU versions also support
externally supplied pixel clocks. Those clocks are optional. When
supplied they must be named "dclkin.x" with "x" being the input clock
numerical index.
- vsps: A list of phandle and channel index tuples to the VSPs that handle
the memory interfaces for the DU channels. The phandle identifies the VSP
......@@ -63,15 +59,15 @@ corresponding to each DU output.
R8A7794 (R-Car E2) DPAD 0 DPAD 1 - -
R8A7795 (R-Car H3) DPAD 0 HDMI 0 HDMI 1 LVDS 0
R8A7796 (R-Car M3-W) DPAD 0 HDMI 0 LVDS 0 -
R8A77970 (R-Car V3M) DPAD 0 LVDS 0 - -
R8A77995 (R-Car D3) DPAD 0 LVDS 0 LVDS 1 -
Example: R8A7795 (R-Car H3) ES2.0 DU
du: display@feb00000 {
compatible = "renesas,du-r8a7795";
reg = <0 0xfeb00000 0 0x80000>,
<0 0xfeb90000 0 0x14>;
reg-names = "du", "lvds.0";
reg = <0 0xfeb00000 0 0x80000>;
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
......@@ -79,9 +75,8 @@ Example: R8A7795 (R-Car H3) ES2.0 DU
clocks = <&cpg CPG_MOD 724>,
<&cpg CPG_MOD 723>,
<&cpg CPG_MOD 722>,
<&cpg CPG_MOD 721>,
<&cpg CPG_MOD 727>;
clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0";
<&cpg CPG_MOD 721>;
clock-names = "du.0", "du.1", "du.2", "du.3";
vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>, <&vspd0 1>;
ports {
......
Documentation/devicetree/bindings/display/rockchip/cdn-dp-rockchip.txt 0 → 100644
View file @ ef389b73
Rockchip RK3399 specific extensions to the cdn Display Port
================================
Required properties:
- compatible: must be "rockchip,rk3399-cdn-dp"
- reg: physical base address of the controller and length
- clocks: from common clock binding: handle to dp clock.
- clock-names: from common clock binding:
Required elements: "core-clk" "pclk" "spdif" "grf"
- resets : a list of phandle + reset specifier pairs
- reset-names : string of reset names
Required elements: "apb", "core", "dptx", "spdif"
- power-domains : power-domain property defined with a phandle
to respective power domain.
- assigned-clocks: main clock, should be <&cru SCLK_DP_CORE>
- assigned-clock-rates : the DP core clk frequency, shall be: 100000000
- rockchip,grf: this soc should set GRF regs, so need get grf here.
- ports: contain a port nodes with endpoint definitions as defined in
Documentation/devicetree/bindings/media/video-interfaces.txt.
contained 2 endpoints, connecting to the output of vop.
- phys: from general PHY binding: the phandle for the PHY device.
- extcon: extcon specifier for the Power Delivery
- #sound-dai-cells = it must be 1 if your system is using 2 DAIs: I2S, SPDIF
-------------------------------------------------------------------------------
Example:
cdn_dp: dp@fec00000 {
compatible = "rockchip,rk3399-cdn-dp";
reg = <0x0 0xfec00000 0x0 0x100000>;
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru SCLK_DP_CORE>, <&cru PCLK_DP_CTRL>,
<&cru SCLK_SPDIF_REC_DPTX>, <&cru PCLK_VIO_GRF>;
clock-names = "core-clk", "pclk", "spdif", "grf";
assigned-clocks = <&cru SCLK_DP_CORE>;
assigned-clock-rates = <100000000>;
power-domains = <&power RK3399_PD_HDCP>;
phys = <&tcphy0_dp>, <&tcphy1_dp>;
resets = <&cru SRST_DPTX_SPDIF_REC>;
reset-names = "spdif";
extcon = <&fusb0>, <&fusb1>;
rockchip,grf = <&grf>;
#address-cells = <1>;
#size-cells = <0>;
#sound-dai-cells = <1>;
ports {
#address-cells = <1>;
#size-cells = <0>;
dp_in: port {
#address-cells = <1>;
#size-cells = <0>;
dp_in_vopb: endpoint@0 {
reg = <0>;
remote-endpoint = <&vopb_out_dp>;
};
dp_in_vopl: endpoint@1 {
reg = <1>;
remote-endpoint = <&vopl_out_dp>;
};
};
};
};
Documentation/devicetree/bindings/display/st,stm32-ltdc.txt
View file @ ef389b73
......@@ -98,7 +98,7 @@ Example 2: DSI panel
compatible = "st,stm32-dsi";
reg = <0x40016c00 0x800>;
clocks = <&rcc 1 CLK_F469_DSI>, <&clk_hse>;
clock-names = "ref", "pclk";
clock-names = "pclk", "ref";
resets = <&rcc STM32F4_APB2_RESET(DSI)>;
reset-names = "apb";
......
Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
View file @ ef389b73
......@@ -64,6 +64,56 @@ Required properties:
first port should be the input endpoint. The second should be the
output, usually to an HDMI connector.
DWC HDMI TX Encoder
-------------------
The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
with Allwinner's own PHY IP. It supports audio and video outputs and CEC.
These DT bindings follow the Synopsys DWC HDMI TX bindings defined in
Documentation/devicetree/bindings/display/bridge/dw_hdmi.txt with the
following device-specific properties.
Required properties:
- compatible: value must be one of:
* "allwinner,sun8i-a83t-dw-hdmi"
- reg: base address and size of memory-mapped region
- reg-io-width: See dw_hdmi.txt. Shall be 1.
- interrupts: HDMI interrupt number
- clocks: phandles to the clocks feeding the HDMI encoder
* iahb: the HDMI bus clock
* isfr: the HDMI register clock
* tmds: TMDS clock
- clock-names: the clock names mentioned above
- resets: phandle to the reset controller
- reset-names: must be "ctrl"
- phys: phandle to the DWC HDMI PHY
- phy-names: must be "phy"
- ports: A ports node with endpoint definitions as defined in
Documentation/devicetree/bindings/media/video-interfaces.txt. The
first port should be the input endpoint. The second should be the
output, usually to an HDMI connector.
DWC HDMI PHY
------------
Required properties:
- compatible: value must be one of:
* allwinner,sun8i-a83t-hdmi-phy
* allwinner,sun8i-h3-hdmi-phy
- reg: base address and size of memory-mapped region
- clocks: phandles to the clocks feeding the HDMI PHY
* bus: the HDMI PHY interface clock
* mod: the HDMI PHY module clock
- clock-names: the clock names mentioned above
- resets: phandle to the reset controller driving the PHY
- reset-names: must be "phy"
H3 HDMI PHY requires additional clock:
- pll-0: parent of phy clock
TV Encoder
----------
......@@ -94,24 +144,29 @@ Required properties:
* allwinner,sun7i-a20-tcon
* allwinner,sun8i-a33-tcon
* allwinner,sun8i-a83t-tcon-lcd
* allwinner,sun8i-a83t-tcon-tv
* allwinner,sun8i-v3s-tcon
* allwinner,sun9i-a80-tcon-lcd
* allwinner,sun9i-a80-tcon-tv
- reg: base address and size of memory-mapped region
- interrupts: interrupt associated to this IP
- clocks: phandles to the clocks feeding the TCON. Three are needed:
- clocks: phandles to the clocks feeding the TCON.
- 'ahb': the interface clocks
- 'tcon-ch0': The clock driving the TCON channel 0
- 'tcon-ch0': The clock driving the TCON channel 0, if supported
- resets: phandles to the reset controllers driving the encoder
- "lcd": the reset line for the TCON channel 0
- "lcd": the reset line for the TCON
- "edp": the reset line for the eDP block (A80 only)
- clock-names: the clock names mentioned above
- reset-names: the reset names mentioned above
- clock-output-names: Name of the pixel clock created
- clock-output-names: Name of the pixel clock created, if TCON supports
channel 0.
- ports: A ports node with endpoint definitions as defined in
Documentation/devicetree/bindings/media/video-interfaces.txt. The
first port should be the input endpoint, the second one the output
The output may have multiple endpoints. The TCON has two channels,
The output may have multiple endpoints. TCON can have 1 or 2 channels,
usually with the first channel being used for the panels interfaces
(RGB, LVDS, etc.), and the second being used for the outputs that
require another controller (TV Encoder, HDMI, etc.). The endpoints
......@@ -119,11 +174,13 @@ Required properties:
channel the endpoint is associated to. If that property is not
present, the endpoint number will be used as the channel number.
On SoCs other than the A33 and V3s, there is one more clock required:
For TCONs with channel 0, there is one more clock required:
- 'tcon-ch0': The clock driving the TCON channel 0
For TCONs with channel 1, there is one more clock required:
- 'tcon-ch1': The clock driving the TCON channel 1
On SoCs that support LVDS (all SoCs but the A13, H3, H5 and V3s), you
need one more reset line:
When TCON support LVDS (all TCONs except TV TCON on A83T and those found
in A13, H3, H5 and V3s SoCs), you need one more reset line:
- 'lvds': The reset line driving the LVDS logic
And on the A23, A31, A31s and A33, you need one more clock line:
......@@ -134,7 +191,7 @@ DRC
---
The DRC (Dynamic Range Controller), found in the latest Allwinner SoCs
(A31, A23, A33), allows to dynamically adjust pixel
(A31, A23, A33, A80), allows to dynamically adjust pixel
brightness/contrast based on histogram measurements for LCD content
adaptive backlight control.
......@@ -144,6 +201,7 @@ Required properties:
* allwinner,sun6i-a31-drc
* allwinner,sun6i-a31s-drc
* allwinner,sun8i-a33-drc
* allwinner,sun9i-a80-drc
- reg: base address and size of the memory-mapped region.
- interrupts: interrupt associated to this IP
- clocks: phandles to the clocks feeding the DRC
......@@ -170,6 +228,7 @@ Required properties:
* allwinner,sun6i-a31-display-backend
* allwinner,sun7i-a20-display-backend
* allwinner,sun8i-a33-display-backend
* allwinner,sun9i-a80-display-backend
- reg: base address and size of the memory-mapped region.
- interrupts: interrupt associated to this IP
- clocks: phandles to the clocks feeding the frontend and backend
......@@ -191,6 +250,28 @@ On the A33, some additional properties are required:
- resets and reset-names need to have a phandle to the SAT bus
resets, whose name will be "sat"
DEU
---
The DEU (Detail Enhancement Unit), found in the Allwinner A80 SoC,
can sharpen the display content in both luma and chroma channels.
Required properties:
- compatible: value must be one of:
* allwinner,sun9i-a80-deu
- reg: base address and size of the memory-mapped region.
- interrupts: interrupt associated to this IP
- clocks: phandles to the clocks feeding the DEU
* ahb: the DEU interface clock
* mod: the DEU module clock
* ram: the DEU DRAM clock
- clock-names: the clock names mentioned above
- resets: phandles to the reset line driving the DEU
- ports: A ports node with endpoint definitions as defined in
Documentation/devicetree/bindings/media/video-interfaces.txt. The
first port should be the input endpoints, the second one the outputs
Display Engine Frontend
-----------------------
......@@ -204,6 +285,7 @@ Required properties:
* allwinner,sun6i-a31-display-frontend
* allwinner,sun7i-a20-display-frontend
* allwinner,sun8i-a33-display-frontend
* allwinner,sun9i-a80-display-frontend
- reg: base address and size of the memory-mapped region.
- interrupts: interrupt associated to this IP
- clocks: phandles to the clocks feeding the frontend and backend
......@@ -226,6 +308,8 @@ supported.
Required properties:
- compatible: value must be one of:
* allwinner,sun8i-a83t-de2-mixer-0
* allwinner,sun8i-a83t-de2-mixer-1
* allwinner,sun8i-h3-de2-mixer-0
* allwinner,sun8i-v3s-de2-mixer
- reg: base address and size of the memory-mapped region.
- clocks: phandles to the clocks feeding the mixer
......@@ -256,7 +340,9 @@ Required properties:
* allwinner,sun7i-a20-display-engine
* allwinner,sun8i-a33-display-engine
* allwinner,sun8i-a83t-display-engine
* allwinner,sun8i-h3-display-engine
* allwinner,sun8i-v3s-display-engine
* allwinner,sun9i-a80-display-engine
- allwinner,pipelines: list of phandle to the display engine
frontends (DE 1.0) or mixers (DE 2.0) available.
......
Documentation/devicetree/bindings/dma/mv-xor-v2.txt
View file @ ef389b73
......@@ -11,7 +11,11 @@ Required properties:
interrupts.
Optional properties:
- clocks: Optional reference to the clock used by the XOR engine.
- clocks: Optional reference to the clocks used by the XOR engine.
- clock-names: mandatory if there is a second clock, in this case the
name must be "core" for the first clock and "reg" for the second
one
Example:
......
Documentation/devicetree/bindings/gpio/gpio-etraxfs.txt deleted 100644 → 0
View file @ a774635d
Axis ETRAX FS General I/O controller bindings
Required properties:
- compatible: one of:
- "axis,etraxfs-gio"
- "axis,artpec3-gio"
- reg: Physical base address and length of the controller's registers.
- #gpio-cells: Should be 3
- The first cell is the gpio offset number.
- The second cell is reserved and is currently unused.
- The third cell is the port number (hex).
- gpio-controller: Marks the device node as a GPIO controller.
Example:
gio: gpio@b001a000 {
compatible = "axis,etraxfs-gio";
reg = <0xb001a000 0x1000>;
gpio-controller;
#gpio-cells = <3>;
};
Documentation/devicetree/bindings/iio/adc/sigma-delta-modulator.txt
View file @ ef389b73
......@@ -3,11 +3,11 @@ Device-Tree bindings for sigma delta modulator
Required properties:
- compatible: should be "ads1201", "sd-modulator". "sd-modulator" can be use
as a generic SD modulator if modulator not specified in compatible list.
- #io-channel-cells = <1>: See the IIO bindings section "IIO consumers".
- #io-channel-cells = <0>: See the IIO bindings section "IIO consumers".
Example node:
ads1202: adc@0 {
compatible = "sd-modulator";
#io-channel-cells = <1>;
#io-channel-cells = <0>;
};
Documentation/devicetree/bindings/interrupt-controller/andestech,ativic32.txt 0 → 100644
View file @ ef389b73
* Andestech Internal Vector Interrupt Controller
The Internal Vector Interrupt Controller (IVIC) is a basic interrupt controller
suitable for a simpler SoC platform not requiring a more sophisticated and
bigger External Vector Interrupt Controller.
Main node required properties:
- compatible : should at least contain "andestech,ativic32".
- interrupt-controller : Identifies the node as an interrupt controller
- #interrupt-cells: 1 cells and refer to interrupt-controller/interrupts
Examples:
intc: interrupt-controller {
compatible = "andestech,ativic32";
#interrupt-cells = <1>;
interrupt-controller;
};
Documentation/devicetree/bindings/interrupt-controller/axis,crisv32-intc.txt deleted 100644 → 0
View file @ a774635d
* CRISv32 Interrupt Controller
Interrupt controller for the CRISv32 SoCs.
Main node required properties:
- compatible : should be:
"axis,crisv32-intc"
- interrupt-controller : Identifies the node as an interrupt controller
- #interrupt-cells : Specifies the number of cells needed to encode an
interrupt source. The type shall be a <u32> and the value shall be 1.
- reg: physical base address and size of the intc registers map.
Example:
intc: interrupt-controller {
compatible = "axis,crisv32-intc";
reg = <0xb001c000 0x1000>;
interrupt-controller;
#interrupt-cells = <1>;
};
Documentation/devicetree/bindings/jailhouse.txt 0 → 100644
View file @ ef389b73
Jailhouse non-root cell device tree bindings
--------------------------------------------
When running in a non-root Jailhouse cell (partition), the device tree of this
platform shall have a top-level "hypervisor" node with the following
properties:
- compatible = "jailhouse,cell"
Documentation/devicetree/bindings/metag/meta.txt deleted 100644 → 0
View file @ a774635d
* Meta Processor Binding
This binding specifies what properties must be available in the device tree
representation of a Meta Processor Core, which is the root node in the tree.
Required properties:
- compatible: Specifies the compatibility list for the Meta processor.
The type shall be <string> and the value shall include "img,meta".
Optional properties:
- clocks: Clock consumer specifiers as described in
Documentation/devicetree/bindings/clock/clock-bindings.txt
- clock-names: Clock consumer names as described in
Documentation/devicetree/bindings/clock/clock-bindings.txt.
Clocks are identified by name. Valid clocks are:
- "core": The Meta core clock from which the Meta timers are derived.
* Examples
/ {
compatible = "toumaz,tz1090", "img,meta";
clocks = <&meta_core_clk>;
clock-names = "core";
};
Documentation/devicetree/bindings/nds32/andestech-boards 0 → 100644
View file @ ef389b73
Andestech(nds32) AE3XX Platform
-----------------------------------------------------------------------------
The AE3XX prototype demonstrates the AE3XX example platform on the FPGA. It
is composed of one Andestech(nds32) processor and AE3XX.
Required properties (in root node):
- compatible = "andestech,ae3xx";
Example:
/dts-v1/;
/ {
compatible = "andestech,ae3xx";
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&intc>;
};
Andestech(nds32) AG101P Platform
-----------------------------------------------------------------------------
AG101P is a generic SoC Platform IP that works with any of Andestech(nds32)
processors to provide a cost-effective and high performance solution for
majority of embedded systems in variety of application domains. Users may
simply attach their IP on one of the system buses together with certain glue
logics to complete a SoC solution for a specific application. With
comprehensive simulation and design environments, users may evaluate the
system performance of their applications and track bugs of their designs
efficiently. The optional hardware development platform further provides real
system environment for early prototyping and software/hardware co-development.
Required properties (in root node):
compatible = "andestech,ag101p";
Example:
/dts-v1/;
/ {
compatible = "andestech,ag101p";
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&intc>;
};
Documentation/devicetree/bindings/nds32/atl2c.txt 0 → 100644
View file @ ef389b73
* Andestech L2 cache Controller
The level-2 cache controller plays an important role in reducing memory latency
for high performance systems, such as thoese designs with AndesCore processors.
Level-2 cache controller in general enhances overall system performance
signigicantly and the system power consumption might be reduced as well by
reducing DRAM accesses.
This binding specifies what properties must be available in the device tree
representation of an Andestech L2 cache controller.
Required properties:
- compatible:
Usage: required
Value type: <string>
Definition: "andestech,atl2c"
- reg : Physical base address and size of cache controller's memory mapped
- cache-unified : Specifies the cache is a unified cache.
- cache-level : Should be set to 2 for a level 2 cache.
* Example
cache-controller@e0500000 {
compatible = "andestech,atl2c";
reg = <0xe0500000 0x1000>;
cache-unified;
cache-level = <2>;
};
Documentation/devicetree/bindings/nds32/cpus.txt 0 → 100644
View file @ ef389b73
* Andestech Processor Binding
This binding specifies what properties must be available in the device tree
representation of a Andestech Processor Core, which is the root node in the
tree.
Required properties:
- compatible:
Usage: required
Value type: <string>
Definition: Should be "andestech,<core_name>", "andestech,nds32v3" as fallback.
Must contain "andestech,nds32v3" as the most generic value, in addition to
one of the following identifiers for a particular CPU core:
"andestech,n13"
"andestech,n15"
"andestech,d15"
"andestech,n10"
"andestech,d10"
- device_type
Usage: required
Value type: <string>
Definition: must be "cpu"
- reg: Contains CPU index.
- clock-frequency: Contains the clock frequency for CPU, in Hz.
* Examples
/ {
cpus {
cpu@0 {
device_type = "cpu";
compatible = "andestech,n13", "andestech,nds32v3";
reg = <0x0>;
clock-frequency = <60000000>
};
};
};
Documentation/devicetree/bindings/net/dsa/marvell.txt
View file @ ef389b73
......@@ -50,14 +50,15 @@ Example:
compatible = "marvell,mv88e6085";
reg = <0>;
reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
};
mdio {
#address-cells = <1>;
#size-cells = <0>;
switch1phy0: switch1phy0@0 {
reg = <0>;
interrupt-parent = <&switch0>;
interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
mdio {
#address-cells = <1>;
#size-cells = <0>;
switch1phy0: switch1phy0@0 {
reg = <0>;
interrupt-parent = <&switch0>;
interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
};
};
};
};
......@@ -74,23 +75,24 @@ Example:
compatible = "marvell,mv88e6390";
reg = <0>;
reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
};
mdio {
#address-cells = <1>;
#size-cells = <0>;
switch1phy0: switch1phy0@0 {
reg = <0>;
interrupt-parent = <&switch0>;
interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
mdio {
#address-cells = <1>;
#size-cells = <0>;
switch1phy0: switch1phy0@0 {
reg = <0>;
interrupt-parent = <&switch0>;
interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
};
};
};
mdio1 {
compatible = "marvell,mv88e6xxx-mdio-external";
#address-cells = <1>;
#size-cells = <0>;
switch1phy9: switch1phy0@9 {
reg = <9>;
mdio1 {
compatible = "marvell,mv88e6xxx-mdio-external";
#address-cells = <1>;
#size-cells = <0>;
switch1phy9: switch1phy0@9 {
reg = <9>;
};
};
};
};
Documentation/devicetree/bindings/net/renesas,ravb.txt
View file @ ef389b73
......@@ -27,7 +27,11 @@ Required properties:
SoC-specific version corresponding to the platform first followed by
the generic version.
- reg: offset and length of (1) the register block and (2) the stream buffer.
- reg: Offset and length of (1) the register block and (2) the stream buffer.
The region for the register block is mandatory.
The region for the stream buffer is optional, as it is only present on
R-Car Gen2 and RZ/G1 SoCs, and on R-Car H3 (R8A7795), M3-W (R8A7796),
and M3-N (R8A77965).
- interrupts: A list of interrupt-specifiers, one for each entry in
interrupt-names.
If interrupt-names is not present, an interrupt specifier
......
Documentation/devicetree/bindings/serial/axis,etraxfs-uart.txt deleted 100644 → 0
View file @ a774635d
ETRAX FS UART
Required properties:
- compatible : "axis,etraxfs-uart"
- reg: offset and length of the register set for the device.
- interrupts: device interrupt
Optional properties:
- {dtr,dsr,rng,dcd}-gpios: specify a GPIO for DTR/DSR/RI/DCD
line respectively.
Example:
serial@b00260000 {
compatible = "axis,etraxfs-uart";
reg = <0xb0026000 0x1000>;
interrupts = <68>;
dtr-gpios = <&sysgpio 0 GPIO_ACTIVE_LOW>;
dsr-gpios = <&sysgpio 1 GPIO_ACTIVE_LOW>;
rng-gpios = <&sysgpio 2 GPIO_ACTIVE_LOW>;
dcd-gpios = <&sysgpio 3 GPIO_ACTIVE_LOW>;
};
Documentation/devicetree/bindings/timer/andestech,atcpit100-timer.txt 0 → 100644
View file @ ef389b73
Andestech ATCPIT100 timer
------------------------------------------------------------------
ATCPIT100 is a generic IP block from Andes Technology, embedded in
Andestech AE3XX platforms and other designs.
This timer is a set of compact multi-function timers, which can be
used as pulse width modulators (PWM) as well as simple timers.
It supports up to 4 PIT channels. Each PIT channel is a
multi-function timer and provide the following usage scenarios:
One 32-bit timer
Two 16-bit timers
Four 8-bit timers
One 16-bit PWM
One 16-bit timer and one 8-bit PWM
Two 8-bit timer and one 8-bit PWM
Required properties:
- compatible : Should be "andestech,atcpit100"
- reg : Address and length of the register set
- interrupts : Reference to the timer interrupt
- clocks : a clock to provide the tick rate for "andestech,atcpit100"
- clock-names : should be "PCLK" for the peripheral clock source.
Examples:
timer0: timer@f0400000 {
compatible = "andestech,atcpit100";
reg = <0xf0400000 0x1000>;
interrupts = <2>;
clocks = <&apb>;
clock-names = "PCLK";
};
Documentation/devicetree/bindings/usb/dwc2.txt
View file @ ef389b73
......@@ -19,7 +19,7 @@ Required properties:
configured in FS mode;
- "st,stm32f4x9-hsotg": The DWC2 USB HS controller instance in STM32F4x9 SoCs
configured in HS mode;
- "st,stm32f7xx-hsotg": The DWC2 USB HS controller instance in STM32F7xx SoCs
- "st,stm32f7-hsotg": The DWC2 USB HS controller instance in STM32F7 SoCs
configured in HS mode;
- reg : Should contain 1 register range (address and length)
- interrupts : Should contain 1 interrupt
......
Documentation/devicetree/bindings/usb/renesas_usb3.txt
View file @ ef389b73
......@@ -4,6 +4,7 @@ Required properties:
- compatible: Must contain one of the following:
- "renesas,r8a7795-usb3-peri"
- "renesas,r8a7796-usb3-peri"
- "renesas,r8a77965-usb3-peri"
- "renesas,rcar-gen3-usb3-peri" for a generic R-Car Gen3 compatible
device
......
Documentation/devicetree/bindings/usb/renesas_usbhs.txt
View file @ ef389b73
......@@ -12,6 +12,7 @@ Required properties:
- "renesas,usbhs-r8a7794" for r8a7794 (R-Car E2) compatible device
- "renesas,usbhs-r8a7795" for r8a7795 (R-Car H3) compatible device
- "renesas,usbhs-r8a7796" for r8a7796 (R-Car M3-W) compatible device
- "renesas,usbhs-r8a77965" for r8a77965 (R-Car M3-N) compatible device
- "renesas,usbhs-r8a77995" for r8a77995 (R-Car D3) compatible device
- "renesas,usbhs-r7s72100" for r7s72100 (RZ/A1) compatible device
- "renesas,rcar-gen2-usbhs" for R-Car Gen2 or RZ/G1 compatible devices
......
Documentation/devicetree/bindings/usb/usb-xhci.txt
View file @ ef389b73
......@@ -13,6 +13,7 @@ Required properties:
- "renesas,xhci-r8a7793" for r8a7793 SoC
- "renesas,xhci-r8a7795" for r8a7795 SoC
- "renesas,xhci-r8a7796" for r8a7796 SoC
- "renesas,xhci-r8a77965" for r8a77965 SoC
- "renesas,rcar-gen2-xhci" for a generic R-Car Gen2 or RZ/G1 compatible
device
- "renesas,rcar-gen3-xhci" for a generic R-Car Gen3 compatible device
......
Documentation/devicetree/bindings/vendor-prefixes.txt
View file @ ef389b73
......@@ -104,6 +104,7 @@ eeti eGalax_eMPIA Technology Inc
elan Elan Microelectronic Corp.
embest Shenzhen Embest Technology Co., Ltd.
emmicro EM Microelectronic
emtrion emtrion GmbH
energymicro Silicon Laboratories (formerly Energy Micro AS)
engicam Engicam S.r.l.
epcos EPCOS AG
......
Documentation/devicetree/bindings/x86/ce4100.txt
View file @ ef389b73
......@@ -7,17 +7,36 @@ Many of the "generic" devices like HPET or IO APIC have the ce4100
name in their compatible property because they first appeared in this
SoC.
The CPU node
------------
cpu@0 {
device_type = "cpu";
compatible = "intel,ce4100";
reg = <0>;
lapic = <&lapic0>;
The CPU nodes
-------------
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
compatible = "intel,ce4100";
reg = <0x00>;
};
cpu@2 {
device_type = "cpu";
compatible = "intel,ce4100";
reg = <0x02>;
};
};
The reg property describes the CPU number. The lapic property points to
the local APIC timer.
A "cpu" node describes one logical processor (hardware thread).
Required properties:
- device_type
Device type, must be "cpu".
- reg
Local APIC ID, the unique number assigned to each processor by
system hardware.
The SoC node
------------
......
Documentation/devicetree/overlay-notes.txt
View file @ ef389b73
......@@ -87,8 +87,8 @@ Overlay in-kernel API
The API is quite easy to use.
1. Call of_overlay_apply() to create and apply an overlay changeset. The return
value is an error or a cookie identifying this overlay.
1. Call of_overlay_fdt_apply() to create and apply an overlay changeset. The
return value is an error or a cookie identifying this overlay.
2. Call of_overlay_remove() to remove and cleanup the overlay changeset
previously created via the call to of_overlay_apply(). Removal of an overlay
......
Documentation/driver-api/usb/writing_musb_glue_layer.rst
View file @ ef389b73
......@@ -718,6 +718,3 @@ http://www.maximintegrated.com/app-notes/index.mvp/id/1822
Texas Instruments USB Configuration Wiki Page:
http://processors.wiki.ti.com/index.php/Usbgeneralpage
Analog Devices Blackfin MUSB Configuration:
http://docs.blackfin.uclinux.org/doku.php?id=linux-kernel:drivers:musb
Documentation/features/core/BPF-JIT/arch-support.txt
View file @ ef389b73
......@@ -10,28 +10,20 @@
| arc: | TODO |
| arm: | ok |
| arm64: | ok |
| blackfin: | TODO |
| c6x: | TODO |
| cris: | TODO |
| frv: | TODO |
| h8300: | TODO |
| hexagon: | TODO |
| ia64: | TODO |
| m32r: | TODO |
| m68k: | TODO |
| metag: | TODO |
| microblaze: | TODO |
| mips: | ok |
| mn10300: | TODO |
| nios2: | TODO |
| openrisc: | TODO |
| parisc: | TODO |
| powerpc: | ok |
| s390: | ok |
| score: | TODO |
| sh: | TODO |
| sparc: | ok |
| tile: | TODO |
| um: | TODO |
| unicore32: | TODO |
| x86: | ok |
......
Documentation/features/core/generic-idle-thread/arch-support.txt
View file @ ef389b73
......@@ -10,28 +10,20 @@
| arc: | ok |
| arm: | ok |
| arm64: | ok |
| blackfin: | ok |
| c6x: | TODO |
| cris: | TODO |
| frv: | TODO |
| h8300: | TODO |
| hexagon: | ok |
| ia64: | ok |
| m32r: | TODO |
| m68k: | TODO |
| metag: | ok |
| microblaze: | TODO |
| mips: | ok |
| mn10300: | TODO |
| nios2: | TODO |
| openrisc: | TODO |
| parisc: | ok |
| powerpc: | ok |
| s390: | ok |
| score: | TODO |
| sh: | ok |
| sparc: | ok |
| tile: | TODO |
| um: | TODO |
| unicore32: | TODO |
| x86: | ok |
......
Documentation/features/core/jump-labels/arch-support.txt
View file @ ef389b73
......@@ -10,28 +10,20 @@
| arc: | TODO |
| arm: | ok |
| arm64: | ok |
| blackfin: | TODO |
| c6x: | TODO |
| cris: | TODO |
| frv: | TODO |
| h8300: | TODO |
| hexagon: | TODO |
| ia64: | TODO |
| m32r: | TODO |
| m68k: | TODO |
| metag: | TODO |
| microblaze: | TODO |
| mips: | ok |
| mn10300: | TODO |
| nios2: | TODO |
| openrisc: | TODO |
| parisc: | TODO |
| powerpc: | ok |
| s390: | ok |
| score: | TODO |
| sh: | TODO |
| sparc: | ok |
| tile: | TODO |
| um: | TODO |
| unicore32: | TODO |
| x86: | ok |
......
Documentation/features/core/tracehook/arch-support.txt
View file @ ef389b73
......@@ -10,28 +10,20 @@
| arc: | ok |
| arm: | ok |
| arm64: | ok |
| blackfin: | ok |
| c6x: | ok |
| cris: | TODO |
| frv: | ok |
| h8300: | TODO |
| hexagon: | ok |
| ia64: | ok |
| m32r: | TODO |
| m68k: | TODO |
| metag: | ok |
| microblaze: | TODO |
| mips: | ok |
| mn10300: | ok |
| nios2: | ok |
| openrisc: | ok |
| parisc: | ok |
| powerpc: | ok |
| s390: | ok |
| score: | TODO |
| sh: | ok |
| sparc: | ok |
| tile: | ok |
| um: | TODO |
| unicore32: | TODO |
| x86: | ok |
......
Documentation/features/debug/KASAN/arch-support.txt
View file @ ef389b73
......@@ -10,28 +10,20 @@
| arc: | TODO |
| arm: | TODO |
| arm64: | ok |
| blackfin: | TODO |
| c6x: | TODO |
| cris: | TODO |
| frv: | TODO |
| h8300: | TODO |
| hexagon: | TODO |
| ia64: | TODO |
| m32r: | TODO |
| m68k: | TODO |
| metag: | TODO |
| microblaze: | TODO |
| mips: | TODO |
| mn10300: | TODO |
| nios2: | TODO |
| openrisc: | TODO |
| parisc: | TODO |
| powerpc: | TODO |
| s390: | TODO |
| score: | TODO |
| sh: | TODO |
| sparc: | TODO |
| tile: | TODO |
| um: | TODO |
| unicore32: | TODO |
| x86: | ok | 64-bit only
......
Documentation/features/debug/gcov-profile-all/arch-support.txt
View file @ ef389b73
......@@ -10,28 +10,20 @@
| arc: | TODO |
| arm: | ok |
| arm64: | ok |
| blackfin: | TODO |
| c6x: | TODO |
| cris: | TODO |
| frv: | TODO |
| h8300: | TODO |
| hexagon: | TODO |
| ia64: | TODO |
| m32r: | TODO |
| m68k: | TODO |
| metag: | TODO |
| microblaze: | ok |
| mips: | TODO |
| mn10300: | TODO |
| nios2: | TODO |
| openrisc: | TODO |
| parisc: | TODO |
| powerpc: | ok |
| s390: | ok |
| score: | TODO |
| sh: | ok |
| sparc: | TODO |
| tile: | TODO |
| um: | TODO |
| unicore32: | TODO |
| x86: | ok |
......
Documentation/features/debug/kgdb/arch-support.txt
View file @ ef389b73
......@@ -10,28 +10,20 @@
| arc: | ok |
| arm: | ok |
| arm64: | ok |
| blackfin: | ok |
| c6x: | TODO |
| cris: | TODO |
| frv: | TODO |
| h8300: | TODO |
| hexagon: | ok |
| ia64: | TODO |
| m32r: | TODO |
| m68k: | TODO |
| metag: | TODO |
| microblaze: | ok |
| mips: | ok |
| mn10300: | ok |
| nios2: | ok |
| openrisc: | TODO |
| parisc: | TODO |
| powerpc: | ok |
| s390: | TODO |
| score: | TODO |
| sh: | ok |
| sparc: | ok |
| tile: | ok |
| um: | TODO |
| unicore32: | TODO |
| x86: | ok |
......
Documentation/features/debug/kprobes-on-ftrace/arch-support.txt
View file @ ef389b73
......@@ -10,28 +10,20 @@
| arc: | TODO |
| arm: | TODO |
| arm64: | TODO |
| blackfin: | TODO |
| c6x: | TODO |
| cris: | TODO |
| frv: | TODO |
| h8300: | TODO |
| hexagon: | TODO |
| ia64: | TODO |
| m32r: | TODO |
| m68k: | TODO |
| metag: | TODO |
| microblaze: | TODO |
| mips: | TODO |
| mn10300: | TODO |
| nios2: | TODO |
| openrisc: | TODO |
| parisc: | TODO |
| powerpc: | ok |
| s390: | TODO |
| score: | TODO |
| sh: | TODO |
| sparc: | TODO |
| tile: | TODO |
| um: | TODO |
| unicore32: | TODO |
| x86: | ok |
......
Documentation/features/debug/kprobes/arch-support.txt
View file @ ef389b73
......@@ -10,28 +10,20 @@
| arc: | ok |
| arm: | ok |
| arm64: | TODO |
| blackfin: | TODO |
| c6x: | TODO |
| cris: | TODO |
| frv: | TODO |
| h8300: | TODO |
| hexagon: | TODO |
| ia64: | ok |
| m32r: | TODO |
| m68k: | TODO |
| metag: | TODO |
| microblaze: | TODO |
| mips: | ok |
| mn10300: | TODO |
| nios2: | TODO |
| openrisc: | TODO |
| parisc: | TODO |
| powerpc: | ok |
| s390: | ok |
| score: | TODO |
| sh: | ok |
| sparc: | ok |
| tile: | ok |
| um: | TODO |
| unicore32: | TODO |
| x86: | ok |
......
Documentation/features/debug/kretprobes/arch-support.txt
View file @ ef389b73
......@@ -10,28 +10,20 @@
| arc: | ok |
| arm: | ok |
| arm64: | TODO |
| blackfin: | TODO |
| c6x: | TODO |
| cris: | TODO |
| frv: | TODO |
| h8300: | TODO |
| hexagon: | TODO |
| ia64: | ok |
| m32r: | TODO |
| m68k: | TODO |
| metag: | TODO |
| microblaze: | TODO |
| mips: | ok |
| mn10300: | TODO |
| nios2: | TODO |
| openrisc: | TODO |
| parisc: | TODO |
| powerpc: | ok |
| s390: | ok |
| score: | TODO |
| sh: | ok |
| sparc: | ok |
| tile: | ok |
| um: | TODO |
| unicore32: | TODO |
| x86: | ok |
......
Documentation/features/debug/optprobes/arch-support.txt
View file @ ef389b73
......@@ -10,28 +10,20 @@
| arc: | TODO |
| arm: | ok |
| arm64: | TODO |
| blackfin: | TODO |
| c6x: | TODO |
| cris: | TODO |
| frv: | TODO |
| h8300: | TODO |
| hexagon: | TODO |
| ia64: | TODO |
| m32r: | TODO |
| m68k: | TODO |
| metag: | TODO |
| microblaze: | TODO |
| mips: | TODO |
| mn10300: | TODO |
| nios2: | TODO |
| openrisc: | TODO |
| parisc: | TODO |
| powerpc: | TODO |
| s390: | TODO |
| score: | TODO |
| sh: | TODO |
| sparc: | TODO |
| tile: | ok |
| um: | TODO |
| unicore32: | TODO |
| x86: | ok |
......
Documentation/features/debug/stackprotector/arch-support.txt
View file @ ef389b73
......@@ -10,28 +10,20 @@
| arc: | TODO |
| arm: | ok |
| arm64: | ok |
| blackfin: | TODO |
| c6x: | TODO |
| cris: | TODO |
| frv: | TODO |
| h8300: | TODO |
| hexagon: | TODO |
| ia64: | TODO |
| m32r: | TODO |
| m68k: | TODO |
| metag: | TODO |
| microblaze: | TODO |
| mips: | ok |
| mn10300: | TODO |
| nios2: | TODO |
| openrisc: | TODO |
| parisc: | TODO |
| powerpc: | TODO |
| s390: | TODO |
| score: | TODO |
| sh: | ok |
| sparc: | TODO |
| tile: | TODO |
| um: | TODO |
| unicore32: | TODO |
| x86: | ok |
......
Documentation/features/debug/uprobes/arch-support.txt
View file @ ef389b73
......@@ -10,28 +10,20 @@
| arc: | TODO |
| arm: | ok |
| arm64: | TODO |
| blackfin: | TODO |
| c6x: | TODO |
| cris: | TODO |
| frv: | TODO |
| h8300: | TODO |
| hexagon: | TODO |
| ia64: | TODO |
| m32r: | TODO |
| m68k: | TODO |
| metag: | TODO |
| microblaze: | TODO |
| mips: | ok |
| mn10300: | TODO |
| nios2: | TODO |
| openrisc: | TODO |
| parisc: | TODO |
| powerpc: | ok |
| s390: | ok |
| score: | TODO |
| sh: | TODO |
| sparc: | TODO |
| tile: | TODO |
| um: | TODO |
| unicore32: | TODO |
| x86: | ok |
......
Documentation/features/debug/user-ret-profiler/arch-support.txt
View file @ ef389b73
......@@ -10,28 +10,20 @@
| arc: | TODO |
| arm: | TODO |
| arm64: | TODO |
| blackfin: | TODO |
| c6x: | TODO |
| cris: | TODO |
| frv: | TODO |
| h8300: | TODO |
| hexagon: | TODO |
| ia64: | TODO |
| m32r: | TODO |
| m68k: | TODO |
| metag: | TODO |
| microblaze: | TODO |
| mips: | TODO |
| mn10300: | TODO |
| nios2: | TODO |
| openrisc: | TODO |
| parisc: | TODO |
| powerpc: | TODO |
| s390: | TODO |
| score: | TODO |
| sh: | TODO |
| sparc: | TODO |
| tile: | ok |
| um: | TODO |
| unicore32: | TODO |
| x86: | ok |
......
Documentation/features/io/dma-api-debug/arch-support.txt
View file @ ef389b73
......@@ -10,28 +10,20 @@
| arc: | TODO |
| arm: | ok |
| arm64: | ok |
| blackfin: | TODO |
| c6x: | ok |
| cris: | TODO |
| frv: | TODO |
| h8300: | TODO |
| hexagon: | TODO |
| ia64: | ok |
| m32r: | TODO |
| m68k: | TODO |
| metag: | TODO |
| microblaze: | ok |
| mips: | ok |
| mn10300: | TODO |
| nios2: | TODO |
| openrisc: | TODO |
| parisc: | TODO |
| powerpc: | ok |
| s390: | ok |
| score: | TODO |
| sh: | ok |
| sparc: | ok |
| tile: | ok |
| um: | TODO |
| unicore32: | TODO |
| x86: | ok |
......
Documentation/features/io/dma-contiguous/arch-support.txt
View file @ ef389b73
......@@ -10,28 +10,20 @@
| arc: | TODO |
| arm: | ok |
| arm64: | ok |
| blackfin: | TODO |
| c6x: | TODO |
| cris: | TODO |
| frv: | TODO |
| h8300: | TODO |
| hexagon: | TODO |
| ia64: | TODO |
| m32r: | TODO |
| m68k: | TODO |
| metag: | TODO |
| microblaze: | TODO |
| mips: | ok |
| mn10300: | TODO |
| nios2: | TODO |
| openrisc: | TODO |
| parisc: | TODO |
| powerpc: | TODO |
| s390: | TODO |
| score: | TODO |
| sh: | TODO |
| sparc: | TODO |
| tile: | TODO |
| um: | TODO |
| unicore32: | TODO |
| x86: | ok |
......
Documentation/features/io/sg-chain/arch-support.txt
View file @ ef389b73
......@@ -10,28 +10,20 @@
| arc: | ok |
| arm: | ok |
| arm64: | ok |
| blackfin: | TODO |
| c6x: | TODO |
| cris: | TODO |
| frv: | TODO |
| h8300: | TODO |
| hexagon: | TODO |
| ia64: | ok |
| m32r: | TODO |
| m68k: | TODO |
| metag: | TODO |
| microblaze: | TODO |
| mips: | TODO |
| mn10300: | TODO |
| nios2: | TODO |
| openrisc: | TODO |
| parisc: | TODO |
| powerpc: | ok |
| s390: | ok |
| score: | TODO |
| sh: | TODO |
| sparc: | ok |
| tile: | TODO |
| um: | TODO |
| unicore32: | TODO |
| x86: | ok |
......
Documentation/features/lib/strncasecmp/arch-support.txt
View file @ ef389b73
......@@ -10,28 +10,20 @@
| arc: | TODO |
| arm: | TODO |
| arm64: | TODO |
| blackfin: | TODO |
| c6x: | TODO |
| cris: | TODO |
| frv: | TODO |
| h8300: | TODO |
| hexagon: | TODO |
| ia64: | TODO |
| m32r: | TODO |
| m68k: | TODO |
| metag: | TODO |
| microblaze: | TODO |
| mips: | TODO |
| mn10300: | TODO |
| nios2: | TODO |
| openrisc: | TODO |
| parisc: | TODO |
| powerpc: | TODO |
| s390: | TODO |
| score: | TODO |
| sh: | TODO |
| sparc: | TODO |
| tile: | TODO |
| um: | TODO |
| unicore32: | TODO |
| x86: | TODO |
......
Documentation/features/list-arch.sh
View file @ ef389b73
......@@ -17,7 +17,7 @@ for F in */*/arch-support.txt; do
N=$(grep -h "^# Feature name:" $F | cut -c25-)
C=$(grep -h "^# Kconfig:" $F | cut -c25-)
D=$(grep -h "^# description:" $F | cut -c25-)
S=$(grep -hw $ARCH $F | cut -d\| -f3)
S=$(grep -hv "^#" $F | grep -w $ARCH | cut -d\| -f3)
printf "%10s/%-22s:%s| %35s # %s\n" "$SUBSYS" "$N" "$S" "$C" "$D"
done
......
Documentation/features/locking/cmpxchg-local/arch-support.txt
View file @ ef389b73
......@@ -10,28 +10,20 @@
| arc: | TODO |
| arm: | TODO |
| arm64: | TODO |
| blackfin: | TODO |
| c6x: | TODO |
| cris: | TODO |
| frv: | TODO |
| h8300: | TODO |
| hexagon: | TODO |
| ia64: | TODO |
| m32r: | TODO |
| m68k: | TODO |
| metag: | TODO |
| microblaze: | TODO |
| mips: | TODO |
| mn10300: | TODO |
| nios2: | TODO |
| openrisc: | TODO |
| parisc: | TODO |
| powerpc: | TODO |
| s390: | ok |
| score: | TODO |
| sh: | TODO |
| sparc: | TODO |
| tile: | TODO |
| um: | TODO |
| unicore32: | TODO |
| x86: | ok |
......
Documentation/features/locking/lockdep/arch-support.txt
View file @ ef389b73
......@@ -10,28 +10,20 @@
| arc: | ok |
| arm: | ok |
| arm64: | ok |
| blackfin: | ok |
| c6x: | TODO |
| cris: | TODO |
| frv: | TODO |
| h8300: | TODO |
| hexagon: | ok |
| ia64: | TODO |
| m32r: | TODO |
| m68k: | TODO |
| metag: | ok |
| microblaze: | ok |
| mips: | ok |
| mn10300: | TODO |
| nios2: | TODO |
| openrisc: | TODO |
| parisc: | TODO |
| powerpc: | ok |
| s390: | ok |
| score: | ok |
| sh: | ok |
| sparc: | ok |
| tile: | ok |
| um: | ok |
| unicore32: | ok |
| x86: | ok |
......
Documentation/features/locking/queued-rwlocks/arch-support.txt
View file @ ef389b73
......@@ -10,28 +10,20 @@
| arc: | TODO |
| arm: | TODO |
| arm64: | TODO |
| blackfin: | TODO |
| c6x: | TODO |
| cris: | TODO |
| frv: | TODO |
| h8300: | TODO |
| hexagon: | TODO |
| ia64: | TODO |
| m32r: | TODO |
| m68k: | TODO |
| metag: | TODO |
| microblaze: | TODO |
| mips: | TODO |
| mn10300: | TODO |
| nios2: | TODO |
| openrisc: | TODO |
| parisc: | TODO |
| powerpc: | TODO |
| s390: | TODO |
| score: | TODO |
| sh: | TODO |
| sparc: | TODO |
| tile: | TODO |
| um: | TODO |
| unicore32: | TODO |
| x86: | ok |
......
Documentation/features/locking/queued-spinlocks/arch-support.txt
View file @ ef389b73
......@@ -10,28 +10,20 @@
| arc: | TODO |
| arm: | TODO |
| arm64: | TODO |
| blackfin: | TODO |
| c6x: | TODO |
| cris: | TODO |
| frv: | TODO |
| h8300: | TODO |
| hexagon: | TODO |
| ia64: | TODO |
| m32r: | TODO |
| m68k: | TODO |
| metag: | TODO |
| microblaze: | TODO |
| mips: | TODO |
| mn10300: | TODO |
| nios2: | TODO |
| openrisc: | TODO |
| parisc: | TODO |
| powerpc: | TODO |
| s390: | TODO |
| score: | TODO |
| sh: | TODO |
| sparc: | TODO |
| tile: | TODO |
| um: | TODO |
| unicore32: | TODO |
| x86: | ok |
......
Documentation/features/locking/rwsem-optimized/arch-support.txt
View file @ ef389b73
......@@ -10,28 +10,20 @@
| arc: | TODO |
| arm: | TODO |
| arm64: | TODO |
| blackfin: | TODO |
| c6x: | TODO |
| cris: | TODO |
| frv: | TODO |
| h8300: | TODO |
| hexagon: | TODO |
| ia64: | ok |
| m32r: | TODO |
| m68k: | TODO |
| metag: | TODO |
| microblaze: | TODO |
| mips: | TODO |
| mn10300: | TODO |
| nios2: | TODO |
| openrisc: | TODO |
| parisc: | TODO |
| powerpc: | TODO |
| s390: | ok |
| score: | TODO |
| sh: | ok |
| sparc: | ok |
| tile: | TODO |
| um: | TODO |
| unicore32: | TODO |
| x86: | ok |
......
Documentation/features/perf/kprobes-event/arch-support.txt
View file @ ef389b73
......@@ -10,28 +10,20 @@
| arc: | TODO |
| arm: | ok |
| arm64: | TODO |
| blackfin: | TODO |
| c6x: | TODO |
| cris: | TODO |
| frv: | TODO |
| h8300: | TODO |
| hexagon: | ok |
| ia64: | TODO |
| m32r: | TODO |
| m68k: | TODO |
| metag: | TODO |
| microblaze: | TODO |
| mips: | ok |
| mn10300: | TODO |
| nios2: | TODO |
| openrisc: | TODO |
| parisc: | TODO |
| powerpc: | ok |
| s390: | ok |
| score: | TODO |
| sh: | ok |
| sparc: | TODO |
| tile: | ok |
| um: | TODO |
| unicore32: | TODO |
| x86: | ok |
......
Documentation/features/perf/perf-regs/arch-support.txt
View file @ ef389b73
......@@ -10,28 +10,20 @@
| arc: | TODO |
| arm: | ok |
| arm64: | ok |
| blackfin: | TODO |
| c6x: | TODO |
| cris: | TODO |
| frv: | TODO |
| h8300: | TODO |
| hexagon: | TODO |
| ia64: | TODO |
| m32r: | TODO |
| m68k: | TODO |
| metag: | TODO |
| microblaze: | TODO |
| mips: | TODO |
| mn10300: | TODO |
| nios2: | TODO |
| openrisc: | TODO |
| parisc: | TODO |
| powerpc: | ok |
| s390: | TODO |
| score: | TODO |
| sh: | TODO |
| sparc: | TODO |
| tile: | TODO |
| um: | TODO |
| unicore32: | TODO |
| x86: | ok |
......
Documentation/features/perf/perf-stackdump/arch-support.txt
View file @ ef389b73
......@@ -10,28 +10,20 @@
| arc: | TODO |
| arm: | ok |
| arm64: | ok |
| blackfin: | TODO |
| c6x: | TODO |
| cris: | TODO |
| frv: | TODO |
| h8300: | TODO |
| hexagon: | TODO |
| ia64: | TODO |
| m32r: | TODO |
| m68k: | TODO |
| metag: | TODO |
| microblaze: | TODO |
| mips: | TODO |
| mn10300: | TODO |
| nios2: | TODO |
| openrisc: | TODO |
| parisc: | TODO |
| powerpc: | ok |
| s390: | TODO |
| score: | TODO |
| sh: | TODO |
| sparc: | TODO |
| tile: | TODO |
| um: | TODO |
| unicore32: | TODO |
| x86: | ok |
......
Documentation/features/sched/membarrier-sync-core/arch-support.txt
View file @ ef389b73
......@@ -33,28 +33,20 @@
| arc: | TODO |
| arm: | TODO |
| arm64: | ok |
| blackfin: | TODO |
| c6x: | TODO |
| cris: | TODO |
| frv: | TODO |
| h8300: | TODO |
| hexagon: | TODO |
| ia64: | TODO |
| m32r: | TODO |
| m68k: | TODO |
| metag: | TODO |
| microblaze: | TODO |
| mips: | TODO |
| mn10300: | TODO |
| nios2: | TODO |
| openrisc: | TODO |
| parisc: | TODO |
| powerpc: | TODO |
| s390: | TODO |
| score: | TODO |
| sh: | TODO |
| sparc: | TODO |
| tile: | TODO |
| um: | TODO |
| unicore32: | TODO |
| x86: | ok |
......
Documentation/features/sched/numa-balancing/arch-support.txt
View file @ ef389b73
......@@ -10,28 +10,20 @@
| arc: | .. |
| arm: | .. |
| arm64: | .. |
| blackfin: | .. |
| c6x: | .. |
| cris: | .. |
| frv: | .. |
| h8300: | .. |
| hexagon: | .. |
| ia64: | TODO |
| m32r: | .. |
| m68k: | .. |
| metag: | .. |
| microblaze: | .. |
| mips: | TODO |
| mn10300: | .. |
| nios2: | .. |
| openrisc: | .. |
| parisc: | .. |
| powerpc: | ok |
| s390: | .. |
| score: | .. |
| sh: | .. |
| sparc: | TODO |
| tile: | TODO |
| um: | .. |
| unicore32: | .. |
| x86: | ok |
......
Documentation/features/seccomp/seccomp-filter/arch-support.txt
View file @ ef389b73
......@@ -10,28 +10,20 @@
| arc: | TODO |
| arm: | ok |
| arm64: | ok |
| blackfin: | TODO |
| c6x: | TODO |
| cris: | TODO |
| frv: | TODO |
| h8300: | TODO |
| hexagon: | TODO |
| ia64: | TODO |
| m32r: | TODO |
| m68k: | TODO |
| metag: | TODO |
| microblaze: | TODO |
| mips: | ok |
| mn10300: | TODO |
| nios2: | TODO |
| openrisc: | TODO |
| parisc: | TODO |
| powerpc: | TODO |
| s390: | ok |
| score: | TODO |
| sh: | TODO |
| sparc: | TODO |
| tile: | ok |
| um: | ok |
| unicore32: | TODO |
| x86: | ok |
......
Documentation/features/time/arch-tick-broadcast/arch-support.txt
View file @ ef389b73
......@@ -10,28 +10,20 @@
| arc: | TODO |
| arm: | ok |
| arm64: | ok |
| blackfin: | TODO |
| c6x: | TODO |
| cris: | TODO |
| frv: | TODO |
| h8300: | TODO |
| hexagon: | TODO |
| ia64: | TODO |
| m32r: | TODO |
| m68k: | TODO |
| metag: | TODO |
| microblaze: | TODO |
| mips: | ok |
| mn10300: | TODO |
| nios2: | TODO |
| openrisc: | TODO |
| parisc: | TODO |
| powerpc: | ok |
| s390: | TODO |
| score: | TODO |
| sh: | TODO |
| sparc: | TODO |
| tile: | TODO |
| um: | TODO |
| unicore32: | TODO |
| x86: | TODO |
......
Documentation/features/time/clockevents/arch-support.txt
View file @ ef389b73
......@@ -10,28 +10,20 @@
| arc: | ok |
| arm: | ok |
| arm64: | ok |
| blackfin: | ok |
| c6x: | ok |
| cris: | ok |
| frv: | TODO |
| h8300: | ok |
| hexagon: | ok |
| ia64: | TODO |
| m32r: | TODO |
| m68k: | ok |
| metag: | ok |
| microblaze: | ok |
| mips: | ok |
| mn10300: | ok |
| nios2: | ok |
| openrisc: | ok |
| parisc: | TODO |
| powerpc: | ok |
| s390: | ok |
| score: | ok |
| sh: | ok |
| sparc: | ok |
| tile: | ok |
| um: | ok |
| unicore32: | ok |
| x86: | ok |
......
Documentation/features/time/context-tracking/arch-support.txt
View file @ ef389b73
......@@ -10,28 +10,20 @@
| arc: | TODO |
| arm: | ok |
| arm64: | ok |
| blackfin: | TODO |
| c6x: | TODO |
| cris: | TODO |
| frv: | TODO |
| h8300: | TODO |
| hexagon: | TODO |
| ia64: | TODO |
| m32r: | TODO |
| m68k: | TODO |
| metag: | TODO |
| microblaze: | TODO |
| mips: | ok |
| mn10300: | TODO |
| nios2: | TODO |
| openrisc: | TODO |
| parisc: | TODO |
| powerpc: | ok |
| s390: | TODO |
| score: | TODO |
| sh: | TODO |
| sparc: | ok |
| tile: | ok |
| um: | TODO |
| unicore32: | TODO |
| x86: | ok |
......
Documentation/features/time/irq-time-acct/arch-support.txt
View file @ ef389b73
......@@ -10,28 +10,20 @@
| arc: | TODO |
| arm: | ok |
| arm64: | ok |
| blackfin: | TODO |
| c6x: | TODO |
| cris: | TODO |
| frv: | TODO |
| h8300: | TODO |
| hexagon: | TODO |
| ia64: | .. |
| m32r: | TODO |
| m68k: | TODO |
| metag: | TODO |
| microblaze: | TODO |
| mips: | ok |
| mn10300: | TODO |
| nios2: | TODO |
| openrisc: | TODO |
| parisc: | .. |
| powerpc: | .. |
| s390: | .. |
| score: | TODO |
| sh: | TODO |
| sparc: | .. |
| tile: | .. |
| um: | TODO |
| unicore32: | TODO |
| x86: | ok |
......
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......@@ -10,28 +10,20 @@
| arc: | ok |
| arm: | TODO |
| arm64: | ok |
| blackfin: | TODO |
| c6x: | ok |
| cris: | TODO |
| frv: | ok |
| h8300: | ok |
| hexagon: | ok |
| ia64: | ok |
| m32r: | TODO |
| m68k: | TODO |
| metag: | ok |
| microblaze: | ok |
| mips: | ok |
| mn10300: | ok |
| nios2: | ok |
| openrisc: | ok |
| parisc: | ok |
| powerpc: | ok |
| s390: | ok |
| score: | ok |
| sh: | ok |
| sparc: | ok |
| tile: | ok |
| um: | ok |
| unicore32: | ok |
| x86: | ok |
......
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......@@ -10,28 +10,20 @@
| arc: | TODO |
| arm: | ok |
| arm64: | ok |
| blackfin: | TODO |
| c6x: | TODO |
| cris: | TODO |
| frv: | TODO |
| h8300: | TODO |
| hexagon: | TODO |
| ia64: | ok |
| m32r: | TODO |
| m68k: | TODO |
| metag: | TODO |
| microblaze: | TODO |
| mips: | ok |
| mn10300: | TODO |
| nios2: | TODO |
| openrisc: | TODO |
| parisc: | ok |
| powerpc: | ok |
| s390: | ok |
| score: | TODO |
| sh: | TODO |
| sparc: | ok |
| tile: | ok |
| um: | TODO |
| unicore32: | TODO |
| x86: | ok |
......
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......@@ -10,28 +10,20 @@
| arc: | TODO |
| arm: | ok |
| arm64: | ok |
| blackfin: | TODO |
| c6x: | TODO |
| cris: | TODO |
| frv: | TODO |
| h8300: | TODO |
| hexagon: | TODO |
| ia64: | TODO |
| m32r: | TODO |
| m68k: | TODO |
| metag: | TODO |
| microblaze: | TODO |
| mips: | ok |
| mn10300: | TODO |
| nios2: | TODO |
| openrisc: | TODO |
| parisc: | TODO |
| powerpc: | ok |
| s390: | ok |
| score: | TODO |
| sh: | TODO |
| sparc: | TODO |
| tile: | TODO |
| um: | TODO |
| unicore32: | TODO |
| x86: | ok |
......
Documentation/features/vm/PG_uncached/arch-support.txt
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......@@ -10,28 +10,20 @@
| arc: | TODO |
| arm: | TODO |
| arm64: | TODO |
| blackfin: | TODO |
| c6x: | TODO |
| cris: | TODO |
| frv: | TODO |
| h8300: | TODO |
| hexagon: | TODO |
| ia64: | ok |
| m32r: | TODO |
| m68k: | TODO |
| metag: | TODO |
| microblaze: | TODO |
| mips: | TODO |
| mn10300: | TODO |
| nios2: | TODO |
| openrisc: | TODO |
| parisc: | TODO |
| powerpc: | TODO |
| s390: | TODO |
| score: | TODO |
| sh: | TODO |
| sparc: | TODO |
| tile: | TODO |
| um: | TODO |
| unicore32: | TODO |
| x86: | ok |
......
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| arc: | ok |
| arm: | ok |
| arm64: | ok |
| blackfin: | .. |
| c6x: | .. |
| cris: | .. |
| frv: | .. |
| h8300: | .. |
| hexagon: | .. |
| ia64: | TODO |
| m32r: | .. |
| m68k: | .. |
| metag: | TODO |
| microblaze: | .. |
| mips: | ok |
| mn10300: | .. |
| nios2: | .. |
| openrisc: | .. |
| parisc: | TODO |
| powerpc: | ok |
| s390: | ok |
| score: | .. |
| sh: | .. |
| sparc: | ok |
| tile: | TODO |
| um: | .. |
| unicore32: | .. |
| x86: | ok |
......
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| arc: | TODO |
| arm: | TODO |
| arm64: | TODO |
| blackfin: | TODO |
| c6x: | .. |
| cris: | .. |
| frv: | .. |
| h8300: | .. |
| hexagon: | TODO |
| ia64: | TODO |
| m32r: | TODO |
| m68k: | .. |
| metag: | TODO |
| microblaze: | .. |
| mips: | TODO |
| mn10300: | TODO |
| nios2: | .. |
| openrisc: | .. |
| parisc: | TODO |
| powerpc: | TODO |
| s390: | TODO |
| score: | .. |
| sh: | TODO |
| sparc: | TODO |
| tile: | TODO |
| um: | .. |
| unicore32: | .. |
| x86: | ok |
......
Documentation/features/vm/huge-vmap/arch-support.txt
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| arc: | TODO |
| arm: | TODO |
| arm64: | ok |
| blackfin: | TODO |
| c6x: | TODO |
| cris: | TODO |
| frv: | TODO |
| h8300: | TODO |
| hexagon: | TODO |
| ia64: | TODO |
| m32r: | TODO |
| m68k: | TODO |
| metag: | TODO |
| microblaze: | TODO |
| mips: | TODO |
| mn10300: | TODO |
| nios2: | TODO |
| openrisc: | TODO |
| parisc: | TODO |
| powerpc: | TODO |
| s390: | TODO |
| score: | TODO |
| sh: | TODO |
| sparc: | TODO |
| tile: | TODO |
| um: | TODO |
| unicore32: | TODO |
| x86: | ok |
......
Documentation/features/vm/ioremap_prot/arch-support.txt
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| arc: | ok |
| arm: | TODO |
| arm64: | TODO |
| blackfin: | TODO |
| c6x: | TODO |
| cris: | TODO |
| frv: | TODO |
| h8300: | TODO |
| hexagon: | TODO |
| ia64: | TODO |
| m32r: | TODO |
| m68k: | TODO |
| metag: | TODO |
| microblaze: | TODO |
| mips: | TODO |
| mn10300: | TODO |
| nios2: | TODO |
| openrisc: | TODO |
| parisc: | TODO |
| powerpc: | ok |
| s390: | TODO |
| score: | TODO |
| sh: | ok |
| sparc: | TODO |
| tile: | ok |
| um: | TODO |
| unicore32: | TODO |
| x86: | ok |
......
Documentation/features/vm/numa-memblock/arch-support.txt
View file @ ef389b73
......@@ -10,28 +10,20 @@
| arc: | .. |
| arm: | .. |
| arm64: | .. |
| blackfin: | .. |
| c6x: | .. |
| cris: | .. |
| frv: | .. |
| h8300: | .. |
| hexagon: | .. |
| ia64: | ok |
| m32r: | TODO |
| m68k: | .. |
| metag: | ok |
| microblaze: | ok |
| mips: | ok |
| mn10300: | TODO |
| nios2: | .. |
| openrisc: | .. |
| parisc: | .. |
| powerpc: | ok |
| s390: | ok |
| score: | ok |
| sh: | ok |
| sparc: | ok |
| tile: | TODO |
| um: | .. |
| unicore32: | .. |
| x86: | ok |
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