Commit f4e0331f authored by H Hartley Sweeten's avatar H Hartley Sweeten Committed by Greg Kroah-Hartman

staging: comedi: ni_tio: export and fix ni_tio_set_bits()

Move the inline function from the header and export it instead.

Fix the checkpatch.pl issue:
WARNING: Prefer 'unsigned int' to bare use of 'unsigned'

The 'unsigned' vars can safely be changed to 'unsigned int'.

This allows moving ni_tio_set_bits_transient() into the driver and
making it static.

Fix the checkpatch.pl issue:
CHECK: Avoid crashing the kernel - try using WARN_ON & recovery code
       rather than BUG() or BUG_ON()

The BUG_ON() is overkill. All the drivers that call this function pass
'register_index' values that are valid. Just check the 'register_index'
before updating the software copy and writing the register.
Signed-off-by: default avatarH Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: default avatarIan Abbott <abbotti@mev.co.uk>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 85bfafa8
......@@ -228,6 +228,43 @@ static uint64_t ni_tio_clock_period_ps(const struct ni_gpct *counter,
return clock_period_ps;
}
static void ni_tio_set_bits_transient(struct ni_gpct *counter,
enum ni_gpct_register reg,
unsigned int mask, unsigned int value,
unsigned int transient)
{
struct ni_gpct_device *counter_dev = counter->counter_dev;
unsigned long flags;
if (reg < NITIO_NUM_REGS) {
spin_lock_irqsave(&counter_dev->regs_lock, flags);
counter_dev->regs[reg] &= ~mask;
counter_dev->regs[reg] |= (value & mask);
write_register(counter, counter_dev->regs[reg] | transient,
reg);
mmiowb();
spin_unlock_irqrestore(&counter_dev->regs_lock, flags);
}
}
/**
* ni_tio_set_bits() - Safely write a counter register.
* @counter: struct ni_gpct counter.
* @reg: the register to write.
* @mask: the bits to change.
* @value: the new bits value.
*
* Used to write to, and update the software copy, a register whose bits may
* be twiddled in interrupt context, or whose software copy may be read in
* interrupt context.
*/
void ni_tio_set_bits(struct ni_gpct *counter, enum ni_gpct_register reg,
unsigned int mask, unsigned int value)
{
ni_tio_set_bits_transient(counter, reg, mask, value, 0x0);
}
EXPORT_SYMBOL_GPL(ni_tio_set_bits);
/**
* ni_tio_get_soft_copy() - Safely read the software copy of a counter register.
* @counter: struct ni_gpct counter.
......
......@@ -191,39 +191,8 @@ static inline int ni_tio_counting_mode_registers_present(const struct
return 0;
}
static inline void ni_tio_set_bits_transient(struct ni_gpct *counter,
enum ni_gpct_register
register_index, unsigned bit_mask,
unsigned bit_values,
unsigned transient_bit_values)
{
struct ni_gpct_device *counter_dev = counter->counter_dev;
unsigned long flags;
BUG_ON(register_index >= NITIO_NUM_REGS);
spin_lock_irqsave(&counter_dev->regs_lock, flags);
counter_dev->regs[register_index] &= ~bit_mask;
counter_dev->regs[register_index] |= (bit_values & bit_mask);
write_register(counter,
counter_dev->regs[register_index] | transient_bit_values,
register_index);
mmiowb();
spin_unlock_irqrestore(&counter_dev->regs_lock, flags);
}
/*
* ni_tio_set_bits( ) is for safely writing to registers whose bits may be
* twiddled in interrupt context, or whose software copy may be read in
* interrupt context.
*/
static inline void ni_tio_set_bits(struct ni_gpct *counter,
enum ni_gpct_register register_index,
unsigned bit_mask, unsigned bit_values)
{
ni_tio_set_bits_transient(counter, register_index, bit_mask, bit_values,
0x0);
}
void ni_tio_set_bits(struct ni_gpct *, enum ni_gpct_register reg,
unsigned int mask, unsigned int value);
unsigned int ni_tio_get_soft_copy(const struct ni_gpct *,
enum ni_gpct_register reg);
......
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