Commit f516e368 authored by Rongjun Ying's avatar Rongjun Ying Committed by Mark Brown

ASoC: sirf: Add SiRF internal audio codec driver

SiRF internal audio codec is integrated in SiRF atlas6 and prima2 SoC.
Features include:
1. Stereo DAC and ADC with 16-bit resolution amd 48KHz sample rate
2. Support headphone and/or speaker output
3. Integrate headphone and speaker output amp
4. Support LINE and MIC input
5. Support single ended and differential input mode
Signed-off-by: default avatarRongjun Ying <rongjun.ying@csr.com>
--v5:
1. Drop all inlines.
2. Reordering the Kconfig and Makefile
3. Remove the sirf_audio_codec_reg_bits struct, use the new controls instead it.
4. Add some SND_SOC_DAPM_OUT_DRV instead of HP and SPK enable driver
5. Add audio codec clock supply instead of adc event callback
6. Fixed playback and capture can't concurrent work bug.

--
 .../devicetree/bindings/sound/sirf-audio-codec.txt |   17 +
 sound/soc/codecs/Kconfig                           |    5 +
 sound/soc/codecs/Makefile                          |    1 +
 sound/soc/codecs/sirf-audio-codec.c                |  533 ++++++++++++++++++++
 sound/soc/codecs/sirf-audio-codec.h                |   75 +++
 5 files changed, 631 insertions(+), 0 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/sound/sirf-audio-codec.txt
 create mode 100644 sound/soc/codecs/sirf-audio-codec.c
 create mode 100644 sound/soc/codecs/sirf-audio-codec.h
Signed-off-by: default avatarMark Brown <broonie@linaro.org>
parent 38dbfb59
SiRF internal audio CODEC
Required properties:
- compatible : "sirf,atlas6-audio-codec" or "sirf,prima2-audio-codec"
- reg : the register address of the device.
- clocks: the clock of SiRF internal audio codec
Example:
audiocodec: audiocodec@b0040000 {
compatible = "sirf,atlas6-audio-codec";
reg = <0xb0040000 0x10000>;
clocks = <&clks 27>;
};
......@@ -63,6 +63,7 @@ config SND_SOC_ALL_CODECS
select SND_SOC_RT5640 if I2C
select SND_SOC_SGTL5000 if I2C
select SND_SOC_SI476X if MFD_SI476X_CORE
select SND_SOC_SIRF_AUDIO_CODEC
select SND_SOC_SN95031 if INTEL_SCU_IPC
select SND_SOC_SPDIF
select SND_SOC_SSM2518 if I2C
......@@ -330,6 +331,10 @@ config SND_SOC_SIGMADSP
tristate
select CRC32
config SND_SOC_SIRF_AUDIO_CODEC
tristate "SiRF SoC internal audio codec"
select REGMAP_MMIO
config SND_SOC_SN95031
tristate
......
......@@ -53,6 +53,7 @@ snd-soc-alc5623-objs := alc5623.o
snd-soc-alc5632-objs := alc5632.o
snd-soc-sigmadsp-objs := sigmadsp.o
snd-soc-si476x-objs := si476x.o
snd-soc-sirf-audio-codec-objs := sirf-audio-codec.o
snd-soc-sn95031-objs := sn95031.o
snd-soc-spdif-tx-objs := spdif_transmitter.o
snd-soc-spdif-rx-objs := spdif_receiver.o
......
This diff is collapsed.
/*
* SiRF inner codec controllers define
*
* Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
*
* Licensed under GPLv2 or later.
*/
#ifndef _SIRF_AUDIO_CODEC_H
#define _SIRF_AUDIO_CODEC_H
#define AUDIO_IC_CODEC_PWR (0x00E0)
#define AUDIO_IC_CODEC_CTRL0 (0x00E4)
#define AUDIO_IC_CODEC_CTRL1 (0x00E8)
#define AUDIO_IC_CODEC_CTRL2 (0x00EC)
#define AUDIO_IC_CODEC_CTRL3 (0x00F0)
#define MICBIASEN (1 << 3)
#define IC_RDACEN (1 << 0)
#define IC_LDACEN (1 << 1)
#define IC_HSREN (1 << 2)
#define IC_HSLEN (1 << 3)
#define IC_SPEN (1 << 4)
#define IC_CPEN (1 << 5)
#define IC_HPRSELR (1 << 6)
#define IC_HPLSELR (1 << 7)
#define IC_HPRSELL (1 << 8)
#define IC_HPLSELL (1 << 9)
#define IC_SPSELR (1 << 10)
#define IC_SPSELL (1 << 11)
#define IC_MONOR (1 << 12)
#define IC_MONOL (1 << 13)
#define IC_RXOSRSEL (1 << 28)
#define IC_CPFREQ (1 << 29)
#define IC_HSINVEN (1 << 30)
#define IC_MICINREN (1 << 0)
#define IC_MICINLEN (1 << 1)
#define IC_MICIN1SEL (1 << 2)
#define IC_MICIN2SEL (1 << 3)
#define IC_MICDIFSEL (1 << 4)
#define IC_LINEIN1SEL (1 << 5)
#define IC_LINEIN2SEL (1 << 6)
#define IC_RADCEN (1 << 7)
#define IC_LADCEN (1 << 8)
#define IC_ALM (1 << 9)
#define IC_DIGMICEN (1 << 22)
#define IC_DIGMICFREQ (1 << 23)
#define IC_ADC14B_12 (1 << 24)
#define IC_FIRDAC_HSL_EN (1 << 25)
#define IC_FIRDAC_HSR_EN (1 << 26)
#define IC_FIRDAC_LOUT_EN (1 << 27)
#define IC_POR (1 << 28)
#define IC_CODEC_CLK_EN (1 << 29)
#define IC_HP_3DB_BOOST (1 << 30)
#define IC_ADC_LEFT_GAIN_SHIFT 16
#define IC_ADC_RIGHT_GAIN_SHIFT 10
#define IC_ADC_GAIN_MASK 0x3F
#define IC_MIC_MAX_GAIN 0x39
#define IC_RXPGAR_MASK 0x3F
#define IC_RXPGAR_SHIFT 14
#define IC_RXPGAL_MASK 0x3F
#define IC_RXPGAL_SHIFT 21
#define IC_RXPGAR 0x7B
#define IC_RXPGAL 0x7B
#endif /*__SIRF_AUDIO_CODEC_H*/
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