Commit f53e3c53 authored by Lucas Weaver's avatar Lucas Weaver Committed by Tony Lindgren

ARM: dts: DRA7: Add PMU nodes

DRA74x and DRA72x family of processors vary slightly in the number
of CPUs. So, add different instances of PMU for each of these processor
groups. Further, since the interrupts bypass crossbar and are directly
connected to GIC, mark the dts nodes with relevant information.

Tested with perf utility.
Reviewed-by: default avatarFelipe Balbi <balbi@ti.com>
Signed-off-by: default avatarLucas Weaver <l-weaver@ti.com>
Signed-off-by: default avatarNishanth Menon <nm@ti.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent be9d32e8
......@@ -22,4 +22,9 @@ cpu0: cpu@0 {
reg = <0>;
};
};
pmu {
compatible = "arm,cortex-a15-pmu";
interrupts = <GIC_SPI DIRECT_IRQ(131) IRQ_TYPE_LEVEL_HIGH>;
};
};
......@@ -38,4 +38,10 @@ cpu@1 {
reg = <1>;
};
};
pmu {
compatible = "arm,cortex-a15-pmu";
interrupts = <GIC_SPI DIRECT_IRQ(131) IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI DIRECT_IRQ(132) IRQ_TYPE_LEVEL_HIGH>;
};
};
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment