Commit f5439764 authored by H Hartley Sweeten's avatar H Hartley Sweeten Committed by Greg Kroah-Hartman

staging: comedi: rtd520: remove RtdDma0Control macro

This macro uses the 'devpriv' macro which relies on a local variable
having a specific name. Plus it's just a wrapper around a simple
'writeb'. Remove the macro.
Signed-off-by: default avatarH Hartley Sweeten <hsweeten@visionengravers.com>
Cc: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 879dabbc
......@@ -406,10 +406,6 @@ struct rtdPrivate {
/* Macros to access registers */
/* Set control for DMA 0 (write only, shadow?) */
#define RtdDma0Control(dev, n) \
writeb(devpriv->dma0Control = (n), devpriv->lcfg+LCFG_DMACSR0)
/* Get status for DMA 0 */
#define RtdDma0Status(dev) \
readb(devpriv->lcfg+LCFG_DMACSR0)
......@@ -861,19 +857,19 @@ static irqreturn_t rtd_interrupt(int irq, /* interrupt number (ignored) */
DPRINTK
("rtd520: comedi read buffer overflow (DMA) with %ld to go!\n",
devpriv->aiCount);
RtdDma0Control(dev,
(devpriv->dma0Control &
~PLX_DMA_START_BIT)
| PLX_CLEAR_DMA_INTR_BIT);
devpriv->dma0Control &= ~PLX_DMA_START_BIT;
devpriv->dma0Control |= PLX_CLEAR_DMA_INTR_BIT;
writeb(devpriv->dma0Control,
devpriv->lcfg + LCFG_DMACSR0);
goto abortTransfer;
}
/*DPRINTK ("rtd520: DMA transfer: %ld to go, istatus %x\n",
devpriv->aiCount, istatus); */
RtdDma0Control(dev,
(devpriv->
dma0Control & ~PLX_DMA_START_BIT)
| PLX_CLEAR_DMA_INTR_BIT);
devpriv->dma0Control &= ~PLX_DMA_START_BIT;
devpriv->dma0Control |= PLX_CLEAR_DMA_INTR_BIT;
writeb(devpriv->dma0Control,
devpriv->lcfg + LCFG_DMACSR0);
if (0 == devpriv->aiCount) { /* counted down */
DPRINTK("rtd520: Samples Done (DMA).\n");
goto transferDone;
......@@ -1239,8 +1235,11 @@ static int rtd_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
devpriv->lcfg + LCFG_ITCSR);
abort_dma(dev, 0);
devpriv->flags &= ~DMA0_ACTIVE;
if (readl(devpriv->lcfg + LCFG_ITCSR) & ICS_DMA0_A)
RtdDma0Control(dev, PLX_CLEAR_DMA_INTR_BIT);
if (readl(devpriv->lcfg + LCFG_ITCSR) & ICS_DMA0_A) {
devpriv->dma0Control = PLX_CLEAR_DMA_INTR_BIT;
writeb(devpriv->dma0Control,
devpriv->lcfg + LCFG_DMACSR0);
}
}
writel(0, devpriv->las0 + LAS0_DMA0_RESET);
#endif /* USE_DMA */
......@@ -1406,8 +1405,12 @@ static int rtd_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
writel(readl(devpriv->lcfg + LCFG_ITCSR) | ICS_DMA0_E,
devpriv->lcfg + LCFG_ITCSR);
/* Must be 2 steps. See PLX app note about "Starting a DMA transfer" */
RtdDma0Control(dev, PLX_DMA_EN_BIT); /* enable DMA (clear INTR?) */
RtdDma0Control(dev, PLX_DMA_EN_BIT | PLX_DMA_START_BIT); /*start DMA */
devpriv->dma0Control = PLX_DMA_EN_BIT;
writeb(devpriv->dma0Control,
devpriv->lcfg + LCFG_DMACSR0);
devpriv->dma0Control |= PLX_DMA_START_BIT;
writeb(devpriv->dma0Control,
devpriv->lcfg + LCFG_DMACSR0);
DPRINTK("rtd520: Using DMA0 transfers. plxInt %x RtdInt %x\n",
readl(devpriv->lcfg + LCFG_ITCSR), devpriv->intMask);
#else /* USE_DMA */
......@@ -1968,7 +1971,9 @@ static void rtd_detach(struct comedi_device *dev)
/* Shut down any board ops by resetting it */
#ifdef USE_DMA
if (devpriv->lcfg) {
RtdDma0Control(dev, 0); /* disable DMA */
devpriv->dma0Control = 0;
writeb(devpriv->dma0Control,
devpriv->lcfg + LCFG_DMACSR0);
RtdDma1Control(dev, 0); /* disable DMA */
writel(ICS_PIE | ICS_PLIE, devpriv->lcfg + LCFG_ITCSR);
}
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment