Commit f78afb35 authored by Michael Chan's avatar Michael Chan Committed by David S. Miller

bnx2x, cnic, bnx2i, bnx2fc: Fix bnx2i and bnx2fc regressions.

commit b9871bcf
    bnx2x: VF RSS support - PF side

changed the configuration of the doorbell HW and it broke iSCSI and FCoE.
We fix this by making compatible changes to the doorbell address in bnx2i
and bnx2fc.  For the userspace driver, we need to pass a modified CID
so that the existing userspace driver will calculate the correct doorbell
address and continue to work.
Signed-off-by: default avatarAriel Elior <ariele@broadcom.com>
Signed-off-by: default avatarEddie Wai <eddie.wai@broadcom.com>
Signed-off-by: default avatarMichael Chan <mchan@broadcom.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 4bdc9447
...@@ -246,8 +246,37 @@ enum { ...@@ -246,8 +246,37 @@ enum {
BNX2X_MAX_CNIC_ETH_CL_ID_IDX, BNX2X_MAX_CNIC_ETH_CL_ID_IDX,
}; };
#define BNX2X_CNIC_START_ETH_CID(bp) (BNX2X_NUM_NON_CNIC_QUEUES(bp) *\ /* use a value high enough to be above all the PFs, which has least significant
* nibble as 8, so when cnic needs to come up with a CID for UIO to use to
* calculate doorbell address according to old doorbell configuration scheme
* (db_msg_sz 1 << 7 * cid + 0x40 DPM offset) it can come up with a valid number
* We must avoid coming up with cid 8 for iscsi since according to this method
* the designated UIO cid will come out 0 and it has a special handling for that
* case which doesn't suit us. Therefore will will cieling to closes cid which
* has least signigifcant nibble 8 and if it is 8 we will move forward to 0x18.
*/
#define BNX2X_1st_NON_L2_ETH_CID(bp) (BNX2X_NUM_NON_CNIC_QUEUES(bp) * \
(bp)->max_cos) (bp)->max_cos)
/* amount of cids traversed by UIO's DPM addition to doorbell */
#define UIO_DPM 8
/* roundup to DPM offset */
#define UIO_ROUNDUP(bp) (roundup(BNX2X_1st_NON_L2_ETH_CID(bp), \
UIO_DPM))
/* offset to nearest value which has lsb nibble matching DPM */
#define UIO_CID_OFFSET(bp) ((UIO_ROUNDUP(bp) + UIO_DPM) % \
(UIO_DPM * 2))
/* add offset to rounded-up cid to get a value which could be used with UIO */
#define UIO_DPM_ALIGN(bp) (UIO_ROUNDUP(bp) + UIO_CID_OFFSET(bp))
/* but wait - avoid UIO special case for cid 0 */
#define UIO_DPM_CID0_OFFSET(bp) ((UIO_DPM * 2) * \
(UIO_DPM_ALIGN(bp) == UIO_DPM))
/* Properly DPM aligned CID dajusted to cid 0 secal case */
#define BNX2X_CNIC_START_ETH_CID(bp) (UIO_DPM_ALIGN(bp) + \
(UIO_DPM_CID0_OFFSET(bp)))
/* how many cids were wasted - need this value for cid allocation */
#define UIO_CID_PAD(bp) (BNX2X_CNIC_START_ETH_CID(bp) - \
BNX2X_1st_NON_L2_ETH_CID(bp))
/* iSCSI L2 */ /* iSCSI L2 */
#define BNX2X_ISCSI_ETH_CID(bp) (BNX2X_CNIC_START_ETH_CID(bp)) #define BNX2X_ISCSI_ETH_CID(bp) (BNX2X_CNIC_START_ETH_CID(bp))
/* FCoE L2 */ /* FCoE L2 */
...@@ -1680,10 +1709,11 @@ struct bnx2x { ...@@ -1680,10 +1709,11 @@ struct bnx2x {
* Maximum CID count that might be required by the bnx2x: * Maximum CID count that might be required by the bnx2x:
* Max RSS * Max_Tx_Multi_Cos + FCoE + iSCSI * Max RSS * Max_Tx_Multi_Cos + FCoE + iSCSI
*/ */
#define BNX2X_L2_CID_COUNT(bp) (BNX2X_NUM_ETH_QUEUES(bp) * BNX2X_MULTI_TX_COS \ #define BNX2X_L2_CID_COUNT(bp) (BNX2X_NUM_ETH_QUEUES(bp) * BNX2X_MULTI_TX_COS \
+ 2 * CNIC_SUPPORT(bp)) + CNIC_SUPPORT(bp) * (2 + UIO_CID_PAD(bp)))
#define BNX2X_L2_MAX_CID(bp) (BNX2X_MAX_RSS_COUNT(bp) * BNX2X_MULTI_TX_COS \ #define BNX2X_L2_MAX_CID(bp) (BNX2X_MAX_RSS_COUNT(bp) * BNX2X_MULTI_TX_COS \
+ 2 * CNIC_SUPPORT(bp)) + CNIC_SUPPORT(bp) * (2 + UIO_CID_PAD(bp)))
#define L2_ILT_LINES(bp) (DIV_ROUND_UP(BNX2X_L2_CID_COUNT(bp),\ #define L2_ILT_LINES(bp) (DIV_ROUND_UP(BNX2X_L2_CID_COUNT(bp),\
ILT_PAGE_CIDS)) ILT_PAGE_CIDS))
......
...@@ -13632,6 +13632,10 @@ void bnx2x_setup_cnic_info(struct bnx2x *bp) ...@@ -13632,6 +13632,10 @@ void bnx2x_setup_cnic_info(struct bnx2x *bp)
cp->fcoe_init_cid = BNX2X_FCOE_ETH_CID(bp); cp->fcoe_init_cid = BNX2X_FCOE_ETH_CID(bp);
cp->iscsi_l2_cid = BNX2X_ISCSI_ETH_CID(bp); cp->iscsi_l2_cid = BNX2X_ISCSI_ETH_CID(bp);
DP(NETIF_MSG_IFUP, "BNX2X_1st_NON_L2_ETH_CID(bp) %x, cp->starting_cid %x, cp->fcoe_init_cid %x, cp->iscsi_l2_cid %x\n",
BNX2X_1st_NON_L2_ETH_CID(bp), cp->starting_cid, cp->fcoe_init_cid,
cp->iscsi_l2_cid);
if (NO_ISCSI_OOO(bp)) if (NO_ISCSI_OOO(bp))
cp->drv_state |= CNIC_DRV_STATE_NO_ISCSI_OOO; cp->drv_state |= CNIC_DRV_STATE_NO_ISCSI_OOO;
} }
......
...@@ -5217,7 +5217,8 @@ static void cnic_init_rings(struct cnic_dev *dev) ...@@ -5217,7 +5217,8 @@ static void cnic_init_rings(struct cnic_dev *dev)
"iSCSI CLIENT_SETUP did not complete\n"); "iSCSI CLIENT_SETUP did not complete\n");
cnic_spq_completion(dev, DRV_CTL_RET_L2_SPQ_CREDIT_CMD, 1); cnic_spq_completion(dev, DRV_CTL_RET_L2_SPQ_CREDIT_CMD, 1);
cnic_ring_ctl(dev, cid, cli, 1); cnic_ring_ctl(dev, cid, cli, 1);
*cid_ptr = cid; *cid_ptr = cid >> 4;
*(cid_ptr + 1) = cid * bp->db_size;
} }
} }
......
...@@ -105,7 +105,7 @@ ...@@ -105,7 +105,7 @@
#define BNX2FC_RQ_WQE_SIZE (BNX2FC_RQ_BUF_SZ) #define BNX2FC_RQ_WQE_SIZE (BNX2FC_RQ_BUF_SZ)
#define BNX2FC_XFERQ_WQE_SIZE (sizeof(struct fcoe_xfrqe)) #define BNX2FC_XFERQ_WQE_SIZE (sizeof(struct fcoe_xfrqe))
#define BNX2FC_CONFQ_WQE_SIZE (sizeof(struct fcoe_confqe)) #define BNX2FC_CONFQ_WQE_SIZE (sizeof(struct fcoe_confqe))
#define BNX2FC_5771X_DB_PAGE_SIZE 128 #define BNX2X_DB_SHIFT 3
#define BNX2FC_TASK_SIZE 128 #define BNX2FC_TASK_SIZE 128
#define BNX2FC_TASKS_PER_PAGE (PAGE_SIZE/BNX2FC_TASK_SIZE) #define BNX2FC_TASKS_PER_PAGE (PAGE_SIZE/BNX2FC_TASK_SIZE)
......
...@@ -1421,8 +1421,7 @@ int bnx2fc_map_doorbell(struct bnx2fc_rport *tgt) ...@@ -1421,8 +1421,7 @@ int bnx2fc_map_doorbell(struct bnx2fc_rport *tgt)
reg_base = pci_resource_start(hba->pcidev, reg_base = pci_resource_start(hba->pcidev,
BNX2X_DOORBELL_PCI_BAR); BNX2X_DOORBELL_PCI_BAR);
reg_off = BNX2FC_5771X_DB_PAGE_SIZE * reg_off = (1 << BNX2X_DB_SHIFT) * (context_id & 0x1FFFF);
(context_id & 0x1FFFF) + DPM_TRIGER_TYPE;
tgt->ctx_base = ioremap_nocache(reg_base + reg_off, 4); tgt->ctx_base = ioremap_nocache(reg_base + reg_off, 4);
if (!tgt->ctx_base) if (!tgt->ctx_base)
return -ENOMEM; return -ENOMEM;
......
...@@ -64,7 +64,7 @@ ...@@ -64,7 +64,7 @@
#define MAX_PAGES_PER_CTRL_STRUCT_POOL 8 #define MAX_PAGES_PER_CTRL_STRUCT_POOL 8
#define BNX2I_RESERVED_SLOW_PATH_CMD_SLOTS 4 #define BNX2I_RESERVED_SLOW_PATH_CMD_SLOTS 4
#define BNX2I_5771X_DBELL_PAGE_SIZE 128 #define BNX2X_DB_SHIFT 3
/* 5706/08 hardware has limit on maximum buffer size per BD it can handle */ /* 5706/08 hardware has limit on maximum buffer size per BD it can handle */
#define MAX_BD_LENGTH 65535 #define MAX_BD_LENGTH 65535
......
...@@ -2738,8 +2738,7 @@ int bnx2i_map_ep_dbell_regs(struct bnx2i_endpoint *ep) ...@@ -2738,8 +2738,7 @@ int bnx2i_map_ep_dbell_regs(struct bnx2i_endpoint *ep)
if (test_bit(BNX2I_NX2_DEV_57710, &ep->hba->cnic_dev_type)) { if (test_bit(BNX2I_NX2_DEV_57710, &ep->hba->cnic_dev_type)) {
reg_base = pci_resource_start(ep->hba->pcidev, reg_base = pci_resource_start(ep->hba->pcidev,
BNX2X_DOORBELL_PCI_BAR); BNX2X_DOORBELL_PCI_BAR);
reg_off = BNX2I_5771X_DBELL_PAGE_SIZE * (cid_num & 0x1FFFF) + reg_off = (1 << BNX2X_DB_SHIFT) * (cid_num & 0x1FFFF);
DPM_TRIGER_TYPE;
ep->qp.ctx_base = ioremap_nocache(reg_base + reg_off, 4); ep->qp.ctx_base = ioremap_nocache(reg_base + reg_off, 4);
goto arm_cq; goto arm_cq;
} }
......
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