Commit f80a3bb2 authored by Catalin Marinas's avatar Catalin Marinas Committed by Russell King

[ARM] 5318/1: Swap the PRRR and NMRR values in proc-v7.S

A typo caused these values to be swapped leading to incorrect memory
type attributes.
Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 085eefb5
...@@ -180,8 +180,8 @@ __v7_setup: ...@@ -180,8 +180,8 @@ __v7_setup:
mov r10, #0x1f @ domains 0, 1 = manager mov r10, #0x1f @ domains 0, 1 = manager
mcr p15, 0, r10, c3, c0, 0 @ load domain access register mcr p15, 0, r10, c3, c0, 0 @ load domain access register
#endif #endif
ldr r5, =0x40e040e0 ldr r5, =0xff0aa1a8
ldr r6, =0xff0aa1a8 ldr r6, =0x40e040e0
mcr p15, 0, r5, c10, c2, 0 @ write PRRR mcr p15, 0, r5, c10, c2, 0 @ write PRRR
mcr p15, 0, r6, c10, c2, 1 @ write NMRR mcr p15, 0, r6, c10, c2, 1 @ write NMRR
adr r5, v7_crval adr r5, v7_crval
......
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