Commit f88e0ecc authored by Wey-Yi Guy's avatar Wey-Yi Guy

iwlagn: add PAN to tx flush

When issue tx flush, also consider PAN
Signed-off-by: default avatarWey-Yi Guy <wey-yi.w.guy@intel.com>
parent c68744fb
...@@ -1530,8 +1530,15 @@ int iwlagn_txfifo_flush(struct iwl_priv *priv, u16 flush_control) ...@@ -1530,8 +1530,15 @@ int iwlagn_txfifo_flush(struct iwl_priv *priv, u16 flush_control)
might_sleep(); might_sleep();
memset(&flush_cmd, 0, sizeof(flush_cmd)); memset(&flush_cmd, 0, sizeof(flush_cmd));
flush_cmd.fifo_control = IWL_TX_FIFO_VO_MSK | IWL_TX_FIFO_VI_MSK | flush_cmd.fifo_control = IWL_SCD_VO_MSK | IWL_SCD_VI_MSK |
IWL_TX_FIFO_BE_MSK | IWL_TX_FIFO_BK_MSK; IWL_SCD_BE_MSK | IWL_SCD_BK_MSK |
IWL_SCD_MGMT_MSK;
if (priv->valid_contexts != BIT(IWL_RXON_CTX_BSS))
flush_cmd.fifo_control |= IWL_PAN_SCD_VO_MSK |
IWL_PAN_SCD_VI_MSK | IWL_PAN_SCD_BE_MSK |
IWL_PAN_SCD_BK_MSK | IWL_PAN_SCD_MGMT_MSK |
IWL_PAN_SCD_MULTICAST_MSK;
if (priv->cfg->sku & EEPROM_SKU_CAP_11N_ENABLE) if (priv->cfg->sku & EEPROM_SKU_CAP_11N_ENABLE)
flush_cmd.fifo_control |= IWL_AGG_TX_QUEUE_MSK; flush_cmd.fifo_control |= IWL_AGG_TX_QUEUE_MSK;
......
...@@ -972,10 +972,22 @@ struct iwl_rem_sta_cmd { ...@@ -972,10 +972,22 @@ struct iwl_rem_sta_cmd {
u8 reserved2[2]; u8 reserved2[2];
} __packed; } __packed;
#define IWL_TX_FIFO_BK_MSK cpu_to_le32(BIT(0))
#define IWL_TX_FIFO_BE_MSK cpu_to_le32(BIT(1)) /* WiFi queues mask */
#define IWL_TX_FIFO_VI_MSK cpu_to_le32(BIT(2)) #define IWL_SCD_BK_MSK cpu_to_le32(BIT(0))
#define IWL_TX_FIFO_VO_MSK cpu_to_le32(BIT(3)) #define IWL_SCD_BE_MSK cpu_to_le32(BIT(1))
#define IWL_SCD_VI_MSK cpu_to_le32(BIT(2))
#define IWL_SCD_VO_MSK cpu_to_le32(BIT(3))
#define IWL_SCD_MGMT_MSK cpu_to_le32(BIT(3))
/* PAN queues mask */
#define IWL_PAN_SCD_BK_MSK cpu_to_le32(BIT(4))
#define IWL_PAN_SCD_BE_MSK cpu_to_le32(BIT(5))
#define IWL_PAN_SCD_VI_MSK cpu_to_le32(BIT(6))
#define IWL_PAN_SCD_VO_MSK cpu_to_le32(BIT(7))
#define IWL_PAN_SCD_MGMT_MSK cpu_to_le32(BIT(7))
#define IWL_PAN_SCD_MULTICAST_MSK cpu_to_le32(BIT(8))
#define IWL_AGG_TX_QUEUE_MSK cpu_to_le32(0xffc00) #define IWL_AGG_TX_QUEUE_MSK cpu_to_le32(0xffc00)
#define IWL_DROP_SINGLE 0 #define IWL_DROP_SINGLE 0
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment