[PATCH] MIPS Update
From: Ralf Baechle <ralf@linux-mips.org> MIPS update: - Further conversion of MIPS kernel configuration to reverse dependencies. - Support for the PMC-Sierra Yosemite evaluation board. - Merge arch/mips/mm-32 and arch/mips/mm-32 into arch/mips/mm. - Partial support for the R8000 now that I finally have clearance for the documentation previously covered by NDA. - Make distclean fixes. - Regenerate default configuration files against latest Kconfig files. - Fix handling of data bus errors in modules. - Make R4000 bug probing more bullet proof. - Rewrite semaphore code folloing the PPC implementation to no longer manipulate 2 32-bit quantities atomically using 64-bit instructions. Occasionally this did cause problems due to struct semaphore not having sufficient alignment. - Make sys_pipe() code bullet proof against gcc 3.5 over-optimization. - Fix possibly exploitable bug in IRIX compatibility statvfs(2). - Make sched_clock() an outline function. - Support for the MIPS 24K and 25K processors. - Make functions static that aren't needed anywhere else. - Factor out some more generic MIPS SMP code. - Factor out common part of the GT-64240 code. - Ocelot C now uses the generic MV-64340 interrupt handler code. - Factor out common board support code - More cleanup and bug fixes for the NEC VR41xx code. - Start cleanup of hazard handling as required for MIPS32/64 V2 processors. - Enforce minimal kmalloc alignment of 8 byte so 64-bit registers can be stored into fields without exceptions. - Speeling and warning fixes. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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arch/mips/pci/fixup-mpc30x.c
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arch/mips/pci/pci-yosemite.c
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include/asm-mips/gt64240.h
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