Commit fbf0e134 authored by Linus Torvalds's avatar Linus Torvalds

Merge branch 'upstream-fixes' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/libata-dev

parents b7fd1edd a2c91a88
...@@ -497,7 +497,7 @@ config SCSI_ATA_PIIX ...@@ -497,7 +497,7 @@ config SCSI_ATA_PIIX
If unsure, say N. If unsure, say N.
config SCSI_SATA_MV config SCSI_SATA_MV
tristate "Marvell SATA support" tristate "Marvell SATA support (HIGHLY EXPERIMENTAL)"
depends on SCSI_SATA && PCI && EXPERIMENTAL depends on SCSI_SATA && PCI && EXPERIMENTAL
help help
This option enables support for the Marvell Serial ATA family. This option enables support for the Marvell Serial ATA family.
......
...@@ -48,7 +48,7 @@ ...@@ -48,7 +48,7 @@
#include <asm/io.h> #include <asm/io.h>
#define DRV_NAME "ahci" #define DRV_NAME "ahci"
#define DRV_VERSION "1.01" #define DRV_VERSION "1.2"
enum { enum {
...@@ -558,23 +558,25 @@ static void ahci_qc_prep(struct ata_queued_cmd *qc) ...@@ -558,23 +558,25 @@ static void ahci_qc_prep(struct ata_queued_cmd *qc)
pp->cmd_slot[0].opts |= cpu_to_le32(n_elem << 16); pp->cmd_slot[0].opts |= cpu_to_le32(n_elem << 16);
} }
static void ahci_intr_error(struct ata_port *ap, u32 irq_stat) static void ahci_restart_port(struct ata_port *ap, u32 irq_stat)
{ {
void __iomem *mmio = ap->host_set->mmio_base; void __iomem *mmio = ap->host_set->mmio_base;
void __iomem *port_mmio = ahci_port_base(mmio, ap->port_no); void __iomem *port_mmio = ahci_port_base(mmio, ap->port_no);
u32 tmp; u32 tmp;
int work; int work;
printk(KERN_WARNING "ata%u: port reset, " if ((ap->device[0].class != ATA_DEV_ATAPI) ||
"p_is %x is %x pis %x cmd %x tf %x ss %x se %x\n", ((irq_stat & PORT_IRQ_TF_ERR) == 0))
ap->id, printk(KERN_WARNING "ata%u: port reset, "
irq_stat, "p_is %x is %x pis %x cmd %x tf %x ss %x se %x\n",
readl(mmio + HOST_IRQ_STAT), ap->id,
readl(port_mmio + PORT_IRQ_STAT), irq_stat,
readl(port_mmio + PORT_CMD), readl(mmio + HOST_IRQ_STAT),
readl(port_mmio + PORT_TFDATA), readl(port_mmio + PORT_IRQ_STAT),
readl(port_mmio + PORT_SCR_STAT), readl(port_mmio + PORT_CMD),
readl(port_mmio + PORT_SCR_ERR)); readl(port_mmio + PORT_TFDATA),
readl(port_mmio + PORT_SCR_STAT),
readl(port_mmio + PORT_SCR_ERR));
/* stop DMA */ /* stop DMA */
tmp = readl(port_mmio + PORT_CMD); tmp = readl(port_mmio + PORT_CMD);
...@@ -632,7 +634,7 @@ static void ahci_eng_timeout(struct ata_port *ap) ...@@ -632,7 +634,7 @@ static void ahci_eng_timeout(struct ata_port *ap)
printk(KERN_ERR "ata%u: BUG: timeout without command\n", printk(KERN_ERR "ata%u: BUG: timeout without command\n",
ap->id); ap->id);
} else { } else {
ahci_intr_error(ap, readl(port_mmio + PORT_IRQ_STAT)); ahci_restart_port(ap, readl(port_mmio + PORT_IRQ_STAT));
/* hack alert! We cannot use the supplied completion /* hack alert! We cannot use the supplied completion
* function from inside the ->eh_strategy_handler() thread. * function from inside the ->eh_strategy_handler() thread.
...@@ -677,7 +679,7 @@ static inline int ahci_host_intr(struct ata_port *ap, struct ata_queued_cmd *qc) ...@@ -677,7 +679,7 @@ static inline int ahci_host_intr(struct ata_port *ap, struct ata_queued_cmd *qc)
err_mask = AC_ERR_HOST_BUS; err_mask = AC_ERR_HOST_BUS;
/* command processing has stopped due to error; restart */ /* command processing has stopped due to error; restart */
ahci_intr_error(ap, status); ahci_restart_port(ap, status);
if (qc) if (qc)
ata_qc_complete(qc, err_mask); ata_qc_complete(qc, err_mask);
......
...@@ -50,7 +50,7 @@ ...@@ -50,7 +50,7 @@
#include <linux/libata.h> #include <linux/libata.h>
#define DRV_NAME "ata_piix" #define DRV_NAME "ata_piix"
#define DRV_VERSION "1.04" #define DRV_VERSION "1.05"
enum { enum {
PIIX_IOCFG = 0x54, /* IDE I/O configuration register */ PIIX_IOCFG = 0x54, /* IDE I/O configuration register */
......
...@@ -1046,6 +1046,30 @@ static unsigned int ata_pio_modes(const struct ata_device *adev) ...@@ -1046,6 +1046,30 @@ static unsigned int ata_pio_modes(const struct ata_device *adev)
return modes; return modes;
} }
static int ata_qc_wait_err(struct ata_queued_cmd *qc,
struct completion *wait)
{
int rc = 0;
if (wait_for_completion_timeout(wait, 30 * HZ) < 1) {
/* timeout handling */
unsigned int err_mask = ac_err_mask(ata_chk_status(qc->ap));
if (!err_mask) {
printk(KERN_WARNING "ata%u: slow completion (cmd %x)\n",
qc->ap->id, qc->tf.command);
} else {
printk(KERN_WARNING "ata%u: qc timeout (cmd %x)\n",
qc->ap->id, qc->tf.command);
rc = -EIO;
}
ata_qc_complete(qc, err_mask);
}
return rc;
}
/** /**
* ata_dev_identify - obtain IDENTIFY x DEVICE page * ata_dev_identify - obtain IDENTIFY x DEVICE page
* @ap: port on which device we wish to probe resides * @ap: port on which device we wish to probe resides
...@@ -1125,7 +1149,7 @@ static void ata_dev_identify(struct ata_port *ap, unsigned int device) ...@@ -1125,7 +1149,7 @@ static void ata_dev_identify(struct ata_port *ap, unsigned int device)
if (rc) if (rc)
goto err_out; goto err_out;
else else
wait_for_completion(&wait); ata_qc_wait_err(qc, &wait);
spin_lock_irqsave(&ap->host_set->lock, flags); spin_lock_irqsave(&ap->host_set->lock, flags);
ap->ops->tf_read(ap, &qc->tf); ap->ops->tf_read(ap, &qc->tf);
...@@ -1570,11 +1594,13 @@ int ata_timing_compute(struct ata_device *adev, unsigned short speed, ...@@ -1570,11 +1594,13 @@ int ata_timing_compute(struct ata_device *adev, unsigned short speed,
/* /*
* Find the mode. * Find the mode.
*/ */
if (!(s = ata_timing_find_mode(speed))) if (!(s = ata_timing_find_mode(speed)))
return -EINVAL; return -EINVAL;
memcpy(t, s, sizeof(*s));
/* /*
* If the drive is an EIDE drive, it can tell us it needs extended * If the drive is an EIDE drive, it can tell us it needs extended
* PIO/MW_DMA cycle timing. * PIO/MW_DMA cycle timing.
...@@ -1595,7 +1621,7 @@ int ata_timing_compute(struct ata_device *adev, unsigned short speed, ...@@ -1595,7 +1621,7 @@ int ata_timing_compute(struct ata_device *adev, unsigned short speed,
* Convert the timing to bus clock counts. * Convert the timing to bus clock counts.
*/ */
ata_timing_quantize(s, t, T, UT); ata_timing_quantize(t, t, T, UT);
/* /*
* Even in DMA/UDMA modes we still use PIO access for IDENTIFY, S.M.A.R.T * Even in DMA/UDMA modes we still use PIO access for IDENTIFY, S.M.A.R.T
...@@ -2267,7 +2293,7 @@ static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev) ...@@ -2267,7 +2293,7 @@ static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev)
if (rc) if (rc)
ata_port_disable(ap); ata_port_disable(ap);
else else
wait_for_completion(&wait); ata_qc_wait_err(qc, &wait);
DPRINTK("EXIT\n"); DPRINTK("EXIT\n");
} }
...@@ -2315,7 +2341,7 @@ static void ata_dev_reread_id(struct ata_port *ap, struct ata_device *dev) ...@@ -2315,7 +2341,7 @@ static void ata_dev_reread_id(struct ata_port *ap, struct ata_device *dev)
if (rc) if (rc)
goto err_out; goto err_out;
wait_for_completion(&wait); ata_qc_wait_err(qc, &wait);
swap_buf_le16(dev->id, ATA_ID_WORDS); swap_buf_le16(dev->id, ATA_ID_WORDS);
...@@ -2371,7 +2397,7 @@ static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev) ...@@ -2371,7 +2397,7 @@ static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev)
if (rc) if (rc)
ata_port_disable(ap); ata_port_disable(ap);
else else
wait_for_completion(&wait); ata_qc_wait_err(qc, &wait);
DPRINTK("EXIT\n"); DPRINTK("EXIT\n");
} }
......
...@@ -29,7 +29,7 @@ ...@@ -29,7 +29,7 @@
#define __LIBATA_H__ #define __LIBATA_H__
#define DRV_NAME "libata" #define DRV_NAME "libata"
#define DRV_VERSION "1.12" /* must be exactly four chars */ #define DRV_VERSION "1.20" /* must be exactly four chars */
struct ata_scsi_args { struct ata_scsi_args {
u16 *id; u16 *id;
......
This diff is collapsed.
...@@ -46,7 +46,7 @@ ...@@ -46,7 +46,7 @@
#include "sata_promise.h" #include "sata_promise.h"
#define DRV_NAME "sata_promise" #define DRV_NAME "sata_promise"
#define DRV_VERSION "1.02" #define DRV_VERSION "1.03"
enum { enum {
......
...@@ -41,7 +41,7 @@ ...@@ -41,7 +41,7 @@
#include <linux/libata.h> #include <linux/libata.h>
#define DRV_NAME "sata_qstor" #define DRV_NAME "sata_qstor"
#define DRV_VERSION "0.04" #define DRV_VERSION "0.05"
enum { enum {
QS_PORTS = 4, QS_PORTS = 4,
......
...@@ -139,6 +139,7 @@ enum { ...@@ -139,6 +139,7 @@ enum {
PORT_CS_DEV_RST = (1 << 1), /* device reset */ PORT_CS_DEV_RST = (1 << 1), /* device reset */
PORT_CS_INIT = (1 << 2), /* port initialize */ PORT_CS_INIT = (1 << 2), /* port initialize */
PORT_CS_IRQ_WOC = (1 << 3), /* interrupt write one to clear */ PORT_CS_IRQ_WOC = (1 << 3), /* interrupt write one to clear */
PORT_CS_CDB16 = (1 << 5), /* 0=12b cdb, 1=16b cdb */
PORT_CS_RESUME = (1 << 6), /* port resume */ PORT_CS_RESUME = (1 << 6), /* port resume */
PORT_CS_32BIT_ACTV = (1 << 10), /* 32-bit activation */ PORT_CS_32BIT_ACTV = (1 << 10), /* 32-bit activation */
PORT_CS_PM_EN = (1 << 13), /* port multiplier enable */ PORT_CS_PM_EN = (1 << 13), /* port multiplier enable */
...@@ -188,11 +189,29 @@ enum { ...@@ -188,11 +189,29 @@ enum {
PORT_CERR_XFR_PCIPERR = 35, /* PSD ecode 11 - PCI prity err during transfer */ PORT_CERR_XFR_PCIPERR = 35, /* PSD ecode 11 - PCI prity err during transfer */
PORT_CERR_SENDSERVICE = 36, /* FIS received while sending service */ PORT_CERR_SENDSERVICE = 36, /* FIS received while sending service */
/* bits of PRB control field */
PRB_CTRL_PROTOCOL = (1 << 0), /* override def. ATA protocol */
PRB_CTRL_PACKET_READ = (1 << 4), /* PACKET cmd read */
PRB_CTRL_PACKET_WRITE = (1 << 5), /* PACKET cmd write */
PRB_CTRL_NIEN = (1 << 6), /* Mask completion irq */
PRB_CTRL_SRST = (1 << 7), /* Soft reset request (ign BSY?) */
/* PRB protocol field */
PRB_PROT_PACKET = (1 << 0),
PRB_PROT_TCQ = (1 << 1),
PRB_PROT_NCQ = (1 << 2),
PRB_PROT_READ = (1 << 3),
PRB_PROT_WRITE = (1 << 4),
PRB_PROT_TRANSPARENT = (1 << 5),
/* /*
* Other constants * Other constants
*/ */
SGE_TRM = (1 << 31), /* Last SGE in chain */ SGE_TRM = (1 << 31), /* Last SGE in chain */
PRB_SOFT_RST = (1 << 7), /* Soft reset request (ign BSY?) */ SGE_LNK = (1 << 30), /* linked list
Points to SGT, not SGE */
SGE_DRD = (1 << 29), /* discard data read (/dev/null)
data address ignored */
/* board id */ /* board id */
BID_SIL3124 = 0, BID_SIL3124 = 0,
......
...@@ -54,7 +54,7 @@ ...@@ -54,7 +54,7 @@
#endif /* CONFIG_PPC_OF */ #endif /* CONFIG_PPC_OF */
#define DRV_NAME "sata_svw" #define DRV_NAME "sata_svw"
#define DRV_VERSION "1.06" #define DRV_VERSION "1.07"
/* Taskfile registers offsets */ /* Taskfile registers offsets */
#define K2_SATA_TF_CMD_OFFSET 0x00 #define K2_SATA_TF_CMD_OFFSET 0x00
......
...@@ -46,7 +46,7 @@ ...@@ -46,7 +46,7 @@
#include "sata_promise.h" #include "sata_promise.h"
#define DRV_NAME "sata_sx4" #define DRV_NAME "sata_sx4"
#define DRV_VERSION "0.7" #define DRV_VERSION "0.8"
enum { enum {
......
...@@ -47,7 +47,7 @@ ...@@ -47,7 +47,7 @@
#include <linux/libata.h> #include <linux/libata.h>
#define DRV_NAME "sata_vsc" #define DRV_NAME "sata_vsc"
#define DRV_VERSION "1.0" #define DRV_VERSION "1.1"
/* Interrupt register offsets (from chip base address) */ /* Interrupt register offsets (from chip base address) */
#define VSC_SATA_INT_STAT_OFFSET 0x00 #define VSC_SATA_INT_STAT_OFFSET 0x00
......
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