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Commit fc050410 authored by Anton Blanchard's avatar Anton Blanchard
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ppc64: updates from Rochester

parent 587f0576
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Showing with 157 additions and 134 deletions
arch/ppc64/kernel/chrp_setup.c
View file @ fc050410
......@@ -80,7 +80,7 @@ extern void iSeries_pcibios_fixup(void);
extern void pSeries_get_rtc_time(struct rtc_time *rtc_time);
extern int pSeries_set_rtc_time(struct rtc_time *rtc_time);
void pSeries_calibrate_decr(void);
static void fwnmi_init(void);
void fwnmi_init(void);
extern void SystemReset_FWNMI(void), MachineCheck_FWNMI(void); /* from head.S */
int fwnmi_active; /* TRUE if an FWNMI handler is present */
......@@ -184,7 +184,7 @@ chrp_init2(void)
* the firmware supports this feature.
*
*/
static void __init fwnmi_init(void)
void __init fwnmi_init(void)
{
long ret;
int ibm_nmi_register = rtas_token("ibm,nmi-register");
......
arch/ppc64/kernel/iSeries_pci.c
View file @ fc050410
......@@ -510,7 +510,7 @@ int iSeries_Scan_Bridge_Slot(HvBusNumber Bus, struct HvCallPci_BridgeInfo* Bridg
/* I/0 Memory copy MUST use mmio commands on iSeries */
/* To do; For performance, include the hv call directly */
/************************************************************************/
void* iSeries_memset(void* dest, char c, size_t Count)
void* iSeries_memset_io(void* dest, char c, size_t Count)
{
u8 ByteValue = c;
long NumberOfBytes = Count;
......
arch/ppc64/kernel/iSeries_setup.c
View file @ fc050410
/*
*
*
* Copyright (c) 2000 Mike Corrigan <mikejc@us.ibm.com>
* Copyright (c) 1999-2000 Grant Erickson <grant@lcse.umn.edu>
*
......
arch/ppc64/kernel/pSeries_lpar.c
View file @ fc050410
......@@ -34,91 +34,7 @@
#include <asm/naca.h>
#include <asm/tlbflush.h>
#include <asm/tlb.h>
/* Status return values */
#define H_Success 0
#define H_Busy 1 /* Hardware busy -- retry later */
#define H_Hardware -1 /* Hardware error */
#define H_Function -2 /* Function not supported */
#define H_Privilege -3 /* Caller not privileged */
#define H_Parameter -4 /* Parameter invalid, out-of-range or conflicting */
#define H_Bad_Mode -5 /* Illegal msr value */
#define H_PTEG_Full -6 /* PTEG is full */
#define H_Not_Found -7 /* PTE was not found" */
#define H_Reserved_DABR -8 /* DABR address is reserved by the hypervisor on this processor" */
/* Flags */
#define H_LARGE_PAGE (1UL<<(63-16))
#define H_EXACT (1UL<<(63-24)) /* Use exact PTE or return H_PTEG_FULL */
#define H_R_XLATE (1UL<<(63-25)) /* include a valid logical page num in the pte if the valid bit is set */
#define H_READ_4 (1UL<<(63-26)) /* Return 4 PTEs */
#define H_AVPN (1UL<<(63-32)) /* An avpn is provided as a sanity test */
#define H_ANDCOND (1UL<<(63-33))
#define H_ICACHE_INVALIDATE (1UL<<(63-40)) /* icbi, etc. (ignored for IO pages) */
#define H_ICACHE_SYNCHRONIZE (1UL<<(63-41)) /* dcbst, icbi, etc (ignored for IO pages */
#define H_ZERO_PAGE (1UL<<(63-48)) /* zero the page before mapping (ignored for IO pages) */
#define H_COPY_PAGE (1UL<<(63-49))
#define H_N (1UL<<(63-61))
#define H_PP1 (1UL<<(63-62))
#define H_PP2 (1UL<<(63-63))
/* pSeries hypervisor opcodes */
#define H_REMOVE 0x04
#define H_ENTER 0x08
#define H_READ 0x0c
#define H_CLEAR_MOD 0x10
#define H_CLEAR_REF 0x14
#define H_PROTECT 0x18
#define H_GET_TCE 0x1c
#define H_PUT_TCE 0x20
#define H_SET_SPRG0 0x24
#define H_SET_DABR 0x28
#define H_PAGE_INIT 0x2c
#define H_SET_ASR 0x30
#define H_ASR_ON 0x34
#define H_ASR_OFF 0x38
#define H_LOGICAL_CI_LOAD 0x3c
#define H_LOGICAL_CI_STORE 0x40
#define H_LOGICAL_CACHE_LOAD 0x44
#define H_LOGICAL_CACHE_STORE 0x48
#define H_LOGICAL_ICBI 0x4c
#define H_LOGICAL_DCBF 0x50
#define H_GET_TERM_CHAR 0x54
#define H_PUT_TERM_CHAR 0x58
#define H_REAL_TO_LOGICAL 0x5c
#define H_HYPERVISOR_DATA 0x60
#define H_EOI 0x64
#define H_CPPR 0x68
#define H_IPI 0x6c
#define H_IPOLL 0x70
#define H_XIRR 0x74
#define HSC ".long 0x44000022\n"
#define H_ENTER_r3 "li 3, 0x08\n"
/* plpar_hcall() -- Generic call interface using above opcodes
*
* The actual call interface is a hypervisor call instruction with
* the opcode in R3 and input args in R4-R7.
* Status is returned in R3 with variable output values in R4-R11.
* Only H_PTE_READ with H_READ_4 uses R6-R11 so we ignore it for now
* and return only two out args which MUST ALWAYS BE PROVIDED.
*/
long plpar_hcall(unsigned long opcode,
unsigned long arg1,
unsigned long arg2,
unsigned long arg3,
unsigned long arg4,
unsigned long *out1,
unsigned long *out2,
unsigned long *out3);
/* Same as plpar_hcall but for those opcodes that return no values
* other than status. Slightly more efficient.
*/
long plpar_hcall_norets(unsigned long opcode, ...);
#include <asm/hvcall.h>
long plpar_pte_enter(unsigned long flags,
......@@ -408,7 +324,7 @@ void pSeriesLP_init_early(void)
* Leave all the interfaces NULL.
*/
if (naca->serialPortAddr) {
if (0 /*naca->serialPortAddr */) {
void *comport = (void *)__ioremap(naca->serialPortAddr, 16, _PAGE_NO_CACHE);
udbg_init_uart(comport);
ppc_md.udbg_putc = udbg_putc;
......
arch/ppc64/kernel/rtas.c
View file @ fc050410
......@@ -106,17 +106,12 @@ call_rtas_display_status(char c)
enter_rtas((void *)__pa((unsigned long)rtas));
}
#if 0
#define DEBUG_RTAS
#endif
int
rtas_token(const char *service)
{
int *tokp;
if (rtas.dev == NULL) {
#ifdef DEBUG_RTAS
udbg_printf("\tNo rtas device in device-tree...\n");
#endif /* DEBUG_RTAS */
PPCDBG(PPCDBG_RTAS,"\tNo rtas device in device-tree...\n");
return RTAS_UNKNOWN_SERVICE;
}
tokp = (int *) get_property(rtas.dev, service, NULL);
......@@ -132,13 +127,11 @@ rtas_call(int token, int nargs, int nret,
unsigned long s;
struct rtas_args *rtas_args = &(get_paca()->xRtas);
#ifdef DEBUG_RTAS
udbg_printf("Entering rtas_call\n");
udbg_printf("\ttoken = 0x%x\n", token);
udbg_printf("\tnargs = %d\n", nargs);
udbg_printf("\tnret = %d\n", nret);
udbg_printf("\t&outputs = 0x%lx\n", outputs);
#endif /* DEBUG_RTAS */
PPCDBG(PPCDBG_RTAS, "Entering rtas_call\n");
PPCDBG(PPCDBG_RTAS, "\ttoken = 0x%x\n", token);
PPCDBG(PPCDBG_RTAS, "\tnargs = %d\n", nargs);
PPCDBG(PPCDBG_RTAS, "\tnret = %d\n", nret);
PPCDBG(PPCDBG_RTAS, "\t&outputs = 0x%lx\n", outputs);
if (token == RTAS_UNKNOWN_SERVICE)
return -1;
......@@ -149,9 +142,7 @@ rtas_call(int token, int nargs, int nret,
va_start(list, outputs);
for (i = 0; i < nargs; ++i) {
rtas_args->args[i] = (rtas_arg_t)LONG_LSW(va_arg(list, ulong));
#ifdef DEBUG_RTAS
udbg_printf("\tnarg[%d] = 0x%lx\n", i, rtas_args->args[i]);
#endif /* DEBUG_RTAS */
PPCDBG(PPCDBG_RTAS, "\tnarg[%d] = 0x%lx\n", i, rtas_args->args[i]);
}
va_end(list);
......@@ -163,22 +154,19 @@ rtas_call(int token, int nargs, int nret,
#else
spin_lock_irqsave(&rtas.lock, s);
#endif
#ifdef DEBUG_RTAS
udbg_printf("\tentering rtas with 0x%lx\n", (void *)__pa((unsigned long)rtas_args));
#endif /* DEBUG_RTAS */
PPCDBG(PPCDBG_RTAS, "\tentering rtas with 0x%lx\n",
(void *)__pa((unsigned long)rtas_args));
enter_rtas((void *)__pa((unsigned long)rtas_args));
#ifdef DEBUG_RTAS
udbg_printf("\treturned from rtas ...\n");
#endif /* DEBUG_RTAS */
PPCDBG(PPCDBG_RTAS, "\treturned from rtas ...\n");
#if 0 /* Gotta do something different here, use global lock for now... */
spin_unlock_irqrestore(&rtas_args->lock, s);
#else
spin_unlock_irqrestore(&rtas.lock, s);
#endif
#ifdef DEBUG_RTAS
ifppcdebug(PPCDBG_RTAS) {
for(i=0; i < nret ;i++)
udbg_printf("\tnret[%d] = 0x%lx\n", i, (ulong)rtas_args->rets[i]);
#endif /* DEBUG_RTAS */
}
if (nret > 1 && outputs != NULL)
for (i = 0; i < nret-1; ++i)
......
include/asm-ppc64/eeh.h
View file @ fc050410
......@@ -149,4 +149,38 @@ static inline void eeh_memcpy_toio(void *dest, void *src, unsigned long n) {
memcpy(vdest, src, n);
}
static inline void eeh_insb(volatile u8 *addr, void *buf, int n) {
volatile u8 *vaddr = (volatile u8 *)IO_TOKEN_TO_ADDR(addr);
_insb(vaddr, buf, n);
/* ToDo: look for ff's in buf[n] */
}
static inline void eeh_outsb(volatile u8 *addr, const void *buf, int n) {
volatile u8 *vaddr = (volatile u8 *)IO_TOKEN_TO_ADDR(addr);
_outsb(vaddr, buf, n);
}
static inline void eeh_insw_ns(volatile u16 *addr, void *buf, int n) {
volatile u16 *vaddr = (volatile u16 *)IO_TOKEN_TO_ADDR(addr);
_insw_ns(vaddr, buf, n);
/* ToDo: look for ffff's in buf[n] */
}
static inline void eeh_outsw_ns(volatile u16 *addr, const void *buf, int n) {
volatile u16 *vaddr = (volatile u16 *)IO_TOKEN_TO_ADDR(addr);
_outsw_ns(vaddr, buf, n);
}
static inline void eeh_insl_ns(volatile u32 *addr, void *buf, int n) {
volatile u32 *vaddr = (volatile u32 *)IO_TOKEN_TO_ADDR(addr);
_insl_ns(vaddr, buf, n);
/* ToDo: look for ffffffff's in buf[n] */
}
static inline void eeh_outsl_ns(volatile u32 *addr, const void *buf, int n) {
volatile u32 *vaddr = (volatile u32 *)IO_TOKEN_TO_ADDR(addr);
_outsl_ns(vaddr, buf, n);
}
#endif /* _EEH_H */
include/asm-ppc64/hvcall.h 0 → 100644
View file @ fc050410
#define H_Success 0
#define H_Busy 1 /* Hardware busy -- retry later */
#define H_Hardware -1 /* Hardware error */
#define H_Function -2 /* Function not supported */
#define H_Privilege -3 /* Caller not privileged */
#define H_Parameter -4 /* Parameter invalid, out-of-range or conflicting */
#define H_Bad_Mode -5 /* Illegal msr value */
#define H_PTEG_Full -6 /* PTEG is full */
#define H_Not_Found -7 /* PTE was not found" */
#define H_Reserved_DABR -8 /* DABR address is reserved by the hypervisor on this processor" */
/* Flags */
#define H_LARGE_PAGE (1UL<<(63-16))
#define H_EXACT (1UL<<(63-24)) /* Use exact PTE or return H_PTEG_FULL */
#define H_R_XLATE (1UL<<(63-25)) /* include a valid logical page num in the pte if the valid bit is set */
#define H_READ_4 (1UL<<(63-26)) /* Return 4 PTEs */
#define H_AVPN (1UL<<(63-32)) /* An avpn is provided as a sanity test */
#define H_ANDCOND (1UL<<(63-33))
#define H_ICACHE_INVALIDATE (1UL<<(63-40)) /* icbi, etc. (ignored for IO pages) */
#define H_ICACHE_SYNCHRONIZE (1UL<<(63-41)) /* dcbst, icbi, etc (ignored for IO pages */
#define H_ZERO_PAGE (1UL<<(63-48)) /* zero the page before mapping (ignored for IO pages) */
#define H_COPY_PAGE (1UL<<(63-49))
#define H_N (1UL<<(63-61))
#define H_PP1 (1UL<<(63-62))
#define H_PP2 (1UL<<(63-63))
/* pSeries hypervisor opcodes */
#define H_REMOVE 0x04
#define H_ENTER 0x08
#define H_READ 0x0c
#define H_CLEAR_MOD 0x10
#define H_CLEAR_REF 0x14
#define H_PROTECT 0x18
#define H_GET_TCE 0x1c
#define H_PUT_TCE 0x20
#define H_SET_SPRG0 0x24
#define H_SET_DABR 0x28
#define H_PAGE_INIT 0x2c
#define H_SET_ASR 0x30
#define H_ASR_ON 0x34
#define H_ASR_OFF 0x38
#define H_LOGICAL_CI_LOAD 0x3c
#define H_LOGICAL_CI_STORE 0x40
#define H_LOGICAL_CACHE_LOAD 0x44
#define H_LOGICAL_CACHE_STORE 0x48
#define H_LOGICAL_ICBI 0x4c
#define H_LOGICAL_DCBF 0x50
#define H_GET_TERM_CHAR 0x54
#define H_PUT_TERM_CHAR 0x58
#define H_REAL_TO_LOGICAL 0x5c
#define H_HYPERVISOR_DATA 0x60
#define H_EOI 0x64
#define H_CPPR 0x68
#define H_IPI 0x6c
#define H_IPOLL 0x70
#define H_XIRR 0x74
#define HSC ".long 0x44000022\n"
#define H_ENTER_r3 "li 3, 0x08\n"
/* plpar_hcall() -- Generic call interface using above opcodes
*
* The actual call interface is a hypervisor call instruction with
* the opcode in R3 and input args in R4-R7.
* Status is returned in R3 with variable output values in R4-R11.
* Only H_PTE_READ with H_READ_4 uses R6-R11 so we ignore it for now
* and return only two out args which MUST ALWAYS BE PROVIDED.
*/
long plpar_hcall(unsigned long opcode,
unsigned long arg1,
unsigned long arg2,
unsigned long arg3,
unsigned long arg4,
unsigned long *out1,
unsigned long *out2,
unsigned long *out3);
/* Same as plpar_hcall but for those opcodes that return no values
* other than status. Slightly more efficient.
*/
long plpar_hcall_norets(unsigned long opcode, ...);
include/asm-ppc64/io.h
View file @ fc050410
......@@ -40,7 +40,7 @@ extern int have_print;
#define writeb(data, addr) iSeries_Write_Byte(data,((void*)(addr)))
#define writew(data, addr) iSeries_Write_Word(data,((void*)(addr)))
#define writel(data, addr) iSeries_Write_Long(data,((void*)(addr)))
#define memset_io(a,b,c) iSeries_memset((void *)(a),(b),(c))
#define memset_io(a,b,c) iSeries_memset_io((void *)(a),(b),(c))
#define memcpy_fromio(a,b,c) iSeries_memcpy_fromio((void *)(a), (void *)(b), (c))
#define memcpy_toio(a,b,c) iSeries_memcpy_toio((void *)(a), (void *)(b), (c))
#define inb(addr) readb(((unsigned long)(addr)))
......@@ -66,6 +66,18 @@ extern int have_print;
#define outw(val, port) _outw(val, (unsigned long)port)
#define inl(port) _inl((unsigned long)port)
#define outl(val, port) _outl(val, (unsigned long)port)
/*
* The insw/outsw/insl/outsl macros don't do byte-swapping.
* They are only used in practice for transferring buffers which
* are arrays of bytes, and byte-swapping is not appropriate in
* that case. - paulus */
#define insb(port, buf, ns) eeh_insb((u8 *)(port), (buf), (ns))
#define outsb(port, buf, ns) eeh_outsb((u8 *)(port), (buf), (ns))
#define insw(port, buf, ns) eeh_insw_ns((u16 *)(port), (buf), (ns))
#define outsw(port, buf, ns) eeh_outsw_ns((u16 *)(port), (buf), (ns))
#define insl(port, buf, nl) eeh_insl_ns((u32 *)(port), (buf), (nl))
#define outsl(port, buf, nl) eeh_outsl_ns((u32 *)(port), (buf), (nl))
#endif
......@@ -80,18 +92,6 @@ extern int have_print;
#define inl_p(port) inl(port)
#define outl_p(val, port) (udelay(1), outl((val, (port)))
/*
* The insw/outsw/insl/outsl macros don't do byte-swapping.
* They are only used in practice for transferring buffers which
* are arrays of bytes, and byte-swapping is not appropriate in
* that case. - paulus */
#define _IOMAP_VADDR(port) (IS_MAPPED_VADDR(port) ? (port) : (port)+_IO_BASE)
#define insb(port, buf, ns) _insb((u8 *)(_IOMAP_VADDR(port)), (buf), (ns))
#define outsb(port, buf, ns) _outsb((u8 *)(_IOMAP_VADDR(port)), (buf), (ns))
#define insw(port, buf, ns) _insw_ns((u16 *)(_IOMAP_VADDR(port)), (buf), (ns))
#define outsw(port, buf, ns) _outsw_ns((u16 *)(_IOMAP_VADDR(port)), (buf), (ns))
#define insl(port, buf, nl) _insl_ns((u32 *)(_IOMAP_VADDR(port)), (buf), (nl))
#define outsl(port, buf, nl) _outsl_ns((u32 *)(_IOMAP_VADDR(port)), (buf), (nl))
extern void _insb(volatile u8 *port, void *buf, int ns);
extern void _outsb(volatile u8 *port, const void *buf, int ns);
......@@ -109,10 +109,10 @@ extern void _outsl_ns(volatile u32 *port, const void *buf, int nl);
* Neither do the standard versions now, these are just here
* for older code.
*/
#define insw_ns(port, buf, ns) _insw_ns((u16 *)(_IOMAP_VADDR(port)), (buf), (ns))
#define outsw_ns(port, buf, ns) _outsw_ns((u16 *)(_IOMAP_VADDR(port)), (buf), (ns))
#define insl_ns(port, buf, nl) _insl_ns((u32 *)(_IOMAP_VADDR(port)), (buf), (nl))
#define outsl_ns(port, buf, nl) _outsl_ns((u32 *)(_IOMAP_VADDR(port)), (buf), (nl))
#define insw_ns(port, buf, ns) insw(port, buf, ns)
#define outsw_ns(port, buf, ns) outsw(port, buf, ns)
#define insl_ns(port, buf, nl) insl(port, buf, nl)
#define outsl_ns(port, buf, nl) outsl(port, buf, nl)
#define IO_SPACE_LIMIT ~(0UL)
......
include/asm-ppc64/mmu.h
View file @ fc050410
......@@ -115,7 +115,7 @@ typedef struct {
typedef struct {
unsigned long pp0: 1; /* Page protection bit 0 */
unsigned long : 1; /* Reserved */
unsigned long ts: 1; /* Tag set bit */
unsigned long rpn: 50; /* Real page number */
unsigned long : 2; /* Reserved */
unsigned long ac: 1; /* Address compare */
......
include/asm-ppc64/ppcdebug.h
View file @ fc050410
......@@ -51,6 +51,8 @@
#define PPCDBG_SMP PPCDBG_BITVAL(19)
#define PPCDBG_BOOT PPCDBG_BITVAL(20)
#define PPCDBG_BUSWALK PPCDBG_BITVAL(21)
#define PPCDBG_PROM PPCDBG_BITVAL(22)
#define PPCDBG_RTAS PPCDBG_BITVAL(23)
#define PPCDBG_HTABSTRESS PPCDBG_BITVAL(62)
#define PPCDBG_HTABSIZE PPCDBG_BITVAL(63)
#define PPCDBG_NONE (0UL)
......@@ -74,7 +76,8 @@ char *trace_names[PPCDBG_NUM_FLAGS] = {
"signal", "signal_xmon",
"binfmt32", "binfmt64", "binfmt_xmon", "binfmt_32addr",
"alignfixup", "tceinit", "tce", "phb_init",
"smp", "boot", "buswalk"
"smp", "boot", "buswalk", "prom",
"rtas"
};
#else
extern char *trace_names[64];
......
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