[ARM] Miscellaneous updates

- Fix missed cli()/sti() conversions.
- Fix SA1100 sleep code.
- Update small_page.c for changes to struct page.
- Clean up assabet/neponset initialisation.
- Clean up compiler warnings in iop310 build.
- Add missed bits from previous xscale cset.

arch/arm/config.in

@@ -153,18 +153,15 @@ if [ "$CONFIG_ARCH_EP7211" = "y" -o \
 fi
 endmenu
 
-if [ "$CONFIG_ARCH_IOP310" = "y" ]; then
-   mainmenu_option next_comment
-   comment 'IOP310 Implementation Options'
-   choice 'IOP310 System Type' \
-   	"IQ80310	CONFIG_ARCH_IQ80310" IQ80310
-   comment 'IOP310 Chipset Features'
-   bool 'Support Intel 80312 Application Accelerator Unit (EXPERIMENTAL)' CONFIG_IOP310_AAU
-   bool 'Support Intel 80312 DMA (EXPERIMENTAL)' CONFIG_IOP310_DMA
-   bool 'Support Intel 80312 Messaging Unit (EXPERIMENTAL)' CONFIG_IOP310_MU
-   bool 'Support Intel 80312 Performance Monitor (EXPERIMENTAL)' CONFIG_IOP310_PMON
-   endmenu
-fi
+mainmenu_option next_comment
+comment 'IOP310 Implementation Options'
+dep_bool '  IQ80310' CONFIG_ARCH_IQ80310 $CONFIG_ARCH_IOP310
+comment 'IOP310 Chipset Features'
+dep_bool 'Support Intel 80312 Application Accelerator Unit (EXPERIMENTAL)' CONFIG_IOP310_AAU $CONFIG_ARCH_IOP310 $CONFIG_EXPERIMENTAL
+dep_bool 'Support Intel 80312 DMA (EXPERIMENTAL)' CONFIG_IOP310_DMA $CONFIG_ARCH_IOP310 $CONFIG_EXPERIMENTAL
+dep_bool 'Support Intel 80312 Messaging Unit (EXPERIMENTAL)' CONFIG_IOP310_MU $CONFIG_ARCH_IOP310 $CONFIG_EXPERIMENTAL
+dep_bool 'Support Intel 80312 Performance Monitor (EXPERIMENTAL)' CONFIG_IOP310_PMON $CONFIG_ARCH_IOP310 $CONFIG_EXPERIMENTAL
+endmenu
 
 # Definitions to make life easier
 if [ "$CONFIG_ARCH_ARCA5K" = "y" -o \

arch/arm/mach-arc/small_page.c

@@ -50,7 +50,7 @@
  */
 
 struct order {
-	struct page *queue;
+	struct list_head queue;
 	unsigned int mask;		/* (1 << shift) - 1		*/
 	unsigned int shift;		/* (1 << shift) size of page	*/
 	unsigned int block_mask;	/* nr_blocks - 1		*/
@@ -60,10 +60,10 @@ struct order {
 
 static struct order orders[] = {
 #if PAGE_SIZE == 4096
-	{ NULL, 2047, 11,  1, 0x00000003 }
+	{ LIST_HEAD_INIT(orders[0].queue), 2047, 11,  1, 0x00000003 }
 #elif PAGE_SIZE == 32768
-	{ NULL, 2047, 11, 15, 0x0000ffff },
-	{ NULL, 8191, 13,  3, 0x0000000f }
+	{ LIST_HEAD_INIT(orders[0].queue), 2047, 11, 15, 0x0000ffff },
+	{ LIST_HEAD_INIT(orders[1].queue), 8191, 13,  3, 0x0000000f }
 #else
 #error unsupported page size
 #endif
@@ -75,70 +75,49 @@ static struct order orders[] = {
 
 static spinlock_t small_page_lock = SPIN_LOCK_UNLOCKED;
 
-static void add_page_to_queue(struct page *page, struct page **p)
-{
-#ifdef PEDANTIC
-	if (page->pprev_hash)
-		PAGE_BUG(page);
-#endif
-	page->next_hash = *p;
-	if (*p)
-		(*p)->pprev_hash = &page->next_hash;
-	*p = page;
-	page->pprev_hash = p;
-}
-
-static void remove_page_from_queue(struct page *page)
-{
-	if (page->pprev_hash) {
-		if (page->next_hash)
-			page->next_hash->pprev_hash = page->pprev_hash;
-		*page->pprev_hash = page->next_hash;
-		page->pprev_hash = NULL;
-	}
-}
-
 static unsigned long __get_small_page(int priority, struct order *order)
 {
 	unsigned long flags;
 	struct page *page;
 	int offset;
 
-	if (!order->queue)
-		goto need_new_page;
+	do {
+		spin_lock_irqsave(&small_page_lock, flags);
+
+		if (list_empty(&order->queue))
+			goto need_new_page;
 
-	spin_lock_irqsave(&small_page_lock, flags);
-	page = order->queue;
+		page = list_entry(order->queue.next, struct page, list);
 again:
 #ifdef PEDANTIC
-	if (USED_MAP(page) & ~order->all_used)
-		PAGE_BUG(page);
+		if (USED_MAP(page) & ~order->all_used)
+			PAGE_BUG(page);
 #endif
-	offset = ffz(USED_MAP(page));
-	SET_USED(page, offset);
-	if (USED_MAP(page) == order->all_used)
-		remove_page_from_queue(page);
-	spin_unlock_irqrestore(&small_page_lock, flags);
+		offset = ffz(USED_MAP(page));
+		SET_USED(page, offset);
+		if (USED_MAP(page) == order->all_used)
+			list_del_init(&page->list);
+		spin_unlock_irqrestore(&small_page_lock, flags);
 
-	return (unsigned long) page_address(page) + (offset << order->shift);
+		return (unsigned long) page_address(page) + (offset << order->shift);
 
 need_new_page:
-	page = alloc_page(priority);
-
-	spin_lock_irqsave(&small_page_lock, flags);
-	if (!order->queue) {
-		if (!page)
-			goto no_page;
-		SetPageReserved(page);
-		USED_MAP(page) = 0;
-		cli();
-		add_page_to_queue(page, &order->queue);
-	} else {
+		spin_unlock_irqrestore(&small_page_lock, flags);
+		page = alloc_page(priority);
+		spin_lock_irqsave(&small_page_lock, flags);
+
+		if (list_empty(&order->queue)) {
+			if (!page)
+				goto no_page;
+			SetPageReserved(page);
+			USED_MAP(page) = 0;
+			list_add(&page->list, &order->queue);
+			goto again;
+		}
+
+		spin_unlock_irqrestore(&small_page_lock, flags);
 		__free_page(page);
-		cli();
-		page = order->queue;
-	}
-	goto again;
+	} while (1);
 
 no_page:
 	spin_unlock_irqrestore(&small_page_lock, flags);
@@ -173,7 +152,7 @@ static void __free_small_page(unsigned long spage, struct order *order)
 		spin_lock_irqsave(&small_page_lock, flags);
 
 		if (USED_MAP(page) == order->all_used)
-			add_page_to_queue(page, &order->queue);
+			list_add(&page->list, &order->queue);
 
 		if (!TEST_AND_CLEAR_USED(page, spage))
 			goto already_free;
@@ -189,7 +168,7 @@ static void __free_small_page(unsigned long spage, struct order *order)
 	/*
 	 * unlink the page from the small page queue and free it
 	 */
-	remove_page_from_queue(page);
+	list_del_init(&page->list);
 	spin_unlock_irqrestore(&small_page_lock, flags);
 	ClearPageReserved(page);
 	__free_page(page);

arch/arm/mach-iop310/iq80310-pci.c

@@ -25,10 +25,11 @@
  * format for those systems that do not already have PCI
  * interrupts properly routed.  We assume 1 <= pin <= 4
  */
-#define PCI_IRQ_TABLE_LOOKUP(minid,maxid)			 \
-({ int _ctl_ = -1;						 \
-   if (idsel >= minid && idsel <= maxid && pin >= 1 && pin <= 4) \
-      _ctl_ = pci_irq_table[idsel - minid][pin-1];		 \
+#define PCI_IRQ_TABLE_LOOKUP(minid,maxid)	\
+({ int _ctl_ = -1;				\
+   unsigned int _idsel = idsel - minid;		\
+   if (_idsel <= maxid)				\
+      _ctl_ = pci_irq_table[_idsel][pin-1];	\
    _ctl_; })
 
 #define INTA	IRQ_IQ80310_INTA
@@ -64,6 +65,8 @@ iq80310_pri_map_irq(struct pci_dev *dev, u8 idsel, u8 pin)
 {
 	irq_table *pci_irq_table;
 
+	BUG_ON(pin < 1 || pin > 4);
+
 	if (!system_rev) {
 		pci_irq_table = pci_pri_d_irq_table;
 	} else {
@@ -99,6 +102,8 @@ iq80310_sec_map_irq(struct pci_dev *dev, u8 idsel, u8 pin)
 {
 	irq_table *pci_irq_table;
 
+	BUG_ON(pin < 1 || pin > 4);
+
 	if (!system_rev) {
 		pci_irq_table = pci_sec_d_irq_table;
 	} else {

arch/arm/mach-sa1100/assabet.c

@@ -88,9 +88,21 @@ static int __init assabet_init(void)
 		return -EINVAL;
 
 	/*
-	 * Set the IRQ edges
+	 * Ensure that these pins are set as outputs and are driving
+	 * logic 0.  This ensures that we won't inadvertently toggle
+	 * the WS latch in the CPLD, and we don't float causing
+	 * excessive power drain.  --rmk
 	 */
-	set_irq_type(IRQ_GPIO23, IRQT_RISING);	/* UCB1300 */
+	GPDR |= GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
+	GPCR = GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
+
+	/*
+	 * Set up registers for sleep mode.
+	 */
+	PWER = PWER_GPIO0;
+	PGSR = 0;
+	PCFR = 0;
+	PSDR = 0;
 
 	sa1100fb_lcd_power = assabet_lcd_power;
 	sa1100fb_backlight_power = assabet_backlight_power;
@@ -254,13 +266,19 @@ static struct map_desc assabet_io_desc[] __initdata = {
 
 static void __init assabet_map_io(void)
 {
-	extern void neponset_map_io(void);
-
 	sa1100_map_io();
 	iotable_init(assabet_io_desc, ARRAY_SIZE(assabet_io_desc));
 
+	/*
+	 * Set SUS bit in SDCR0 so serial port 1 functions.
+	 * Its called GPCLKR0 in my SA1110 manual.
+	 */
+	Ser1SDCR0 |= SDCR0_SUS;
+
 	if (machine_has_neponset()) {
 #ifdef CONFIG_ASSABET_NEPONSET
+		extern void neponset_map_io(void);
+
 		/*
 		 * We map Neponset registers even if it isn't present since
 		 * many drivers will try to probe their stuff (and fail).
@@ -279,33 +297,11 @@ static void __init assabet_map_io(void)
 		 */
 		sa1100_register_uart(0, 3);
 		sa1100_register_uart(2, 1);
-		/*
-		 * Set SUS bit in SDCR0 so serial port 1 functions.
-		 * Its called GPCLKR0 in my SA1110 manual.
-		 */
-		Ser1SDCR0 |= SDCR0_SUS;
 	} else {
 		sa1100_register_uart_fns(&assabet_port_fns);
 		sa1100_register_uart(0, 1);	/* com port */
 		sa1100_register_uart(2, 3);	/* radio module */
 	}
-
-	/*
-	 * Ensure that these pins are set as outputs and are driving
-	 * logic 0.  This ensures that we won't inadvertently toggle
-	 * the WS latch in the CPLD, and we don't float causing
-	 * excessive power drain.  --rmk
-	 */
-	GPDR |= GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
-	GPCR = GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
-
-	/*
-	 * Set up registers for sleep mode.
-	 */
-	PWER = PWER_GPIO0;
-	PGSR = 0;
-	PCFR = 0;
-	PSDR = 0;
 }
 
 

arch/arm/mach-sa1100/irq.c

@@ -58,7 +58,7 @@ static int sa1100_gpio_type(unsigned int irq, unsigned int type)
 	if (type == IRQT_PROBE) {
 		if ((GPIO_IRQ_rising_edge | GPIO_IRQ_falling_edge) & mask)
 			return 0;
-		type == __IRQT_RISEDGE | __IRQT_FALEDGE;
+		type = __IRQT_RISEDGE | __IRQT_FALEDGE;
 	}
 
 	if (type & __IRQT_RISEDGE) {

arch/arm/mach-sa1100/pm.c

@@ -73,7 +73,7 @@ int pm_do_suspend(void)
 {
 	unsigned long sleep_save[SLEEP_SAVE_SIZE];
 
-	cli();
+	local_irq_disable();
 
 	leds_event(led_stop);
 
@@ -157,7 +157,7 @@ int pm_do_suspend(void)
 
 	leds_event(led_start);
 
-	sti();
+	local_irq_enable();
 
 	/*
 	 * Restore the CPU frequency settings.

arch/arm/mach-sa1100/shannon.c

@@ -13,6 +13,7 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/mach/serial_sa1100.h>
+#include <asm/arch/shannon.h>
 
 #include "generic.h"
 
@@ -23,13 +24,16 @@ static void __init shannon_map_io(void)
 
 	sa1100_register_uart(0, 3);
 	sa1100_register_uart(1, 1);
+
 	Ser1SDCR0 |= SDCR0_SUS;
 	GAFR |= (GPIO_UART_TXD | GPIO_UART_RXD);
-	GPDR |= GPIO_UART_TXD;
+	GPDR |= GPIO_UART_TXD | SHANNON_GPIO_CODEC_RESET;
 	GPDR &= ~GPIO_UART_RXD;
 	PPAR |= PPAR_UPR;
 
-	set_GPIO_IRQ_edge(SHANNON_GPIO_IRQ_CODEC);
+	/* reset the codec */
+	GPCR = SHANNON_GPIO_CODEC_RESET;
+	GPSR = SHANNON_GPIO_CODEC_RESET;
 }
 
 MACHINE_START(SHANNON, "Shannon (AKA: Tuxscreen)")

arch/arm/mach-sa1100/sleep.S

@@ -44,7 +44,8 @@ ENTRY(sa1100_cpu_suspend)
 	mrc 	p15, 0, r7, c1, c0, 0		@ control reg
 
 	@ store them plus current virtual stack ptr on stack
-	stmfd	sp!, {r4 - r7, sp}
+	mov	r8, sp
+	stmfd	sp!, {r4 - r8}
 
 	@ preserve phys address of stack
 	mov	r0, sp

arch/arm/mach-sa1100/xp860.c

@@ -22,7 +22,7 @@
 
 static void xp860_power_off(void)
 {
-	cli();
+	local_irq_disable();
 	GPDR |= GPIO_GPIO20;
 	GPSR = GPIO_GPIO20;
 	mdelay(1000);

arch/arm/mm/fault-common.c

@@ -34,12 +34,10 @@
 #define READ_FAULT(m)		(!((m) & FAULT_CODE_WRITE))
 #else
 /*
- * On 32-bit processors, we define "mode" to be zero when reading,
- * non-zero when writing.  This now ties up nicely with the polarity
- * of the 26-bit machines, and also means that we avoid the horrible
- * gcc code for "int val = !other_val;".
+ * "code" is actually the FSR register.  Bit 11 set means the
+ * isntruction was performing a write.
  */
-#define DO_COW(code)		((code) & (1 << 8))
+#define DO_COW(code)		((code) & (1 << 11))
 #define READ_FAULT(code)	(!DO_COW(code))
 #endif
 
@@ -56,7 +54,7 @@ void show_pte(struct mm_struct *mm, unsigned long addr)
 
 	printk(KERN_ALERT "pgd = %p\n", mm->pgd);
 	pgd = pgd_offset(mm, addr);
-	printk(KERN_ALERT "*pgd = %08lx", pgd_val(*pgd));
+	printk(KERN_ALERT "*pgd=%08lx", pgd_val(*pgd));
 
 	do {
 		pmd_t *pmd;
@@ -71,7 +69,9 @@ void show_pte(struct mm_struct *mm, unsigned long addr)
 		}
 
 		pmd = pmd_offset(pgd, addr);
-		printk(", *pmd = %08lx", pmd_val(*pmd));
+#if PTRS_PER_PMD != 1
+		printk(", *pmd=%08lx", pmd_val(*pmd));
+#endif
 
 		if (pmd_none(*pmd))
 			break;
@@ -84,9 +84,9 @@ void show_pte(struct mm_struct *mm, unsigned long addr)
 #ifndef CONFIG_HIGHMEM
 		/* We must not map this if we have highmem enabled */
 		pte = pte_offset_map(pmd, addr);
-		printk(", *pte = %08lx", pte_val(*pte));
+		printk(", *pte=%08lx", pte_val(*pte));
 #ifdef CONFIG_CPU_32
-		printk(", *ppte = %08lx", pte_val(pte[-PTRS_PER_PTE]));
+		printk(", *ppte=%08lx", pte_val(pte[-PTRS_PER_PTE]));
 #endif
 		pte_unmap(pte);
 #endif

arch/arm/vmlinux-armo.lds.in

@@ -8,10 +8,9 @@ jiffies = jiffies_64;
 SECTIONS
 {
 	. = TEXTADDR;
-
-	.init : {
+	.init : {			/* Init code and data		*/
 		_stext = .;
-		__init_begin = .;	/* Init code and data		*/
+		__init_begin = .;
 			*(.text.init)
 		__proc_info_begin = .;
 			*(.proc.info)
@@ -50,7 +49,7 @@ SECTIONS
 		*(.exitcall.exit)
 	}
 
-	.text : {
+	.text : {			/* Real text segment		*/
 		_text = .;		/* Text and read-only data	*/
 			*(.text)
 			*(.fixup)
@@ -59,19 +58,24 @@ SECTIONS
 			*(.rodata.*)
 			*(.glue_7)
 			*(.glue_7t)
-			*(.kstrtab)
-		. = ALIGN(16);		/* Exception table		*/
+		*(.got)			/* Global offset table		*/
+
+		_etext = .;		/* End of text section		*/
+	}
+
+	.kstrtab : { *(.kstrtab) }
+
+	. = ALIGN(16);
+	__ex_table : {			/* Exception table		*/
 		__start___ex_table = .;
 			*(__ex_table)
 		__stop___ex_table = .;
+	}
 
-		__start___ksymtab = .;	/* Kernel symbol table		*/
+	__ksymtab : {			/* Kernel symbol table		*/
+		__start___ksymtab = .;
 			*(__ksymtab)
 		__stop___ksymtab = .;
-
-		*(.got)			/* Global offset table		*/
-
-		_etext = .;		/* End of text section		*/
 	}
 
 	.data : {
@@ -90,14 +94,12 @@ SECTIONS
 		_edata = .;
 	}
 
-
 	.bss : {
 		__bss_start = .;	/* BSS				*/
 		*(.bss)
 		*(COMMON)
 		_end = . ;
 	}
-
 					/* Stabs debugging sections.	*/
 	.stab 0 : { *(.stab) }
 	.stabstr 0 : { *(.stabstr) }

include/asm-arm/arch-sa1100/assabet.h

@@ -25,6 +25,13 @@
 
 #define ASSABET_SCR_INIT	-1
 
+extern unsigned long SCR_value;
+
+#ifdef CONFIG_ASSABET_NEPONSET
+#define machine_has_neponset()  ((SCR_value & ASSABET_SCR_SA1111) == 0)
+#else
+#define machine_has_neponset()	(0)
+#endif
 
 /* Board Control Register */
 
@@ -57,8 +64,6 @@
 #define ASSABET_BCR_RAD_ON	(1<<22)	/* Radio Power On */
 #define ASSABET_BCR_SPK_OFF	(1<<23)	/* 1 = Speaker amplifier power off */
 
-extern unsigned long SCR_value;
-
 #ifdef CONFIG_SA1100_ASSABET
 extern void ASSABET_BCR_frob(unsigned int mask, unsigned int set);
 #else
@@ -98,70 +103,4 @@ extern void ASSABET_BCR_frob(unsigned int mask, unsigned int set);
 #define ASSABET_IRQ_GPIO_CF_BVD2	IRQ_GPIO24
 #define ASSABET_IRQ_GPIO_CF_BVD1	IRQ_GPIO25
 
-
-/*
- * Neponset definitions: 
- */
-
-#define NEPONSET_CPLD_BASE      (0x10000000)
-#define Nep_p2v( x )            ((x) - NEPONSET_CPLD_BASE + 0xf3000000)
-#define Nep_v2p( x )            ((x) - 0xf3000000 + NEPONSET_CPLD_BASE)
-
-#define _IRR                    0x10000024      /* Interrupt Reason Register */
-#define _AUD_CTL                0x100000c0      /* Audio controls (RW)       */
-#define _MDM_CTL_0              0x100000b0      /* Modem control 0 (RW)      */
-#define _MDM_CTL_1              0x100000b4      /* Modem control 1 (RW)      */
-#define _NCR_0	                0x100000a0      /* Control Register (RW)     */
-#define _KP_X_OUT               0x10000090      /* Keypad row write (RW)     */
-#define _KP_Y_IN                0x10000080      /* Keypad column read (RO)   */
-#define _SWPK                   0x10000020      /* Switch pack (RO)          */
-#define _WHOAMI                 0x10000000      /* System ID Register (RO)   */
-
-#define _LEDS                   0x10000010      /* LEDs [31:0] (WO)          */
-
-#define IRR                     (*((volatile u_char *) Nep_p2v(_IRR)))
-#define AUD_CTL                 (*((volatile u_char *) Nep_p2v(_AUD_CTL)))
-#define MDM_CTL_0               (*((volatile u_char *) Nep_p2v(_MDM_CTL_0)))
-#define MDM_CTL_1               (*((volatile u_char *) Nep_p2v(_MDM_CTL_1)))
-#define NCR_0			(*((volatile u_char *) Nep_p2v(_NCR_0)))
-#define KP_X_OUT                (*((volatile u_char *) Nep_p2v(_KP_X_OUT)))
-#define KP_Y_IN                 (*((volatile u_char *) Nep_p2v(_KP_Y_IN)))
-#define SWPK                    (*((volatile u_char *) Nep_p2v(_SWPK)))
-#define WHOAMI                  (*((volatile u_char *) Nep_p2v(_WHOAMI)))
-
-#define LEDS                    (*((volatile Word   *) Nep_p2v(_LEDS)))
-
-#define IRR_ETHERNET		(1<<0)
-#define IRR_USAR		(1<<1)
-#define IRR_SA1111		(1<<2)
-
-#define AUD_SEL_1341            (1<<0)
-#define AUD_MUTE_1341           (1<<1)
-
-#define MDM_CTL0_RTS1		(1 << 0)
-#define MDM_CTL0_DTR1		(1 << 1)
-#define MDM_CTL0_RTS2		(1 << 2)
-#define MDM_CTL0_DTR2		(1 << 3)
-
-#define MDM_CTL1_CTS1		(1 << 0)
-#define MDM_CTL1_DSR1		(1 << 1)
-#define MDM_CTL1_DCD1		(1 << 2)
-#define MDM_CTL1_CTS2		(1 << 3)
-#define MDM_CTL1_DSR2		(1 << 4)
-#define MDM_CTL1_DCD2		(1 << 5)
-
-#define NCR_GP01_OFF		(1<<0)
-#define NCR_TP_PWR_EN		(1<<1)
-#define NCR_MS_PWR_EN		(1<<2)
-#define NCR_ENET_OSC_EN		(1<<3)
-#define NCR_SPI_KB_WK_UP	(1<<4)
-#define NCR_A0VPP		(1<<5)
-#define NCR_A1VPP		(1<<6)
-
-#ifdef CONFIG_ASSABET_NEPONSET
-#define machine_has_neponset()  ((SCR_value & ASSABET_SCR_SA1111) == 0)
-#else
-#define machine_has_neponset()	(0)
-#endif
-
 #endif

include/asm-arm/arch-sa1100/neponset.h

+/*
+ * linux/include/asm-arm/arch-sa1100/assabet.h
+ *
+ * Created 2000/06/05 by Nicolas Pitre <nico@cam.org>
+ *
+ * This file contains the hardware specific definitions for Assabet
+ * Only include this file from SA1100-specific files.
+ *
+ * 2000/05/23 John Dorsey <john+@cs.cmu.edu>
+ *      Definitions for Neponset added.
+ */
+#ifndef __ASM_ARCH_NEPONSET_H
+#define __ASM_ARCH_NEPONSET_H
+
+/*
+ * Neponset definitions: 
+ */
+
+#define NEPONSET_CPLD_BASE      (0x10000000)
+#define Nep_p2v( x )            ((x) - NEPONSET_CPLD_BASE + 0xf3000000)
+#define Nep_v2p( x )            ((x) - 0xf3000000 + NEPONSET_CPLD_BASE)
+
+#define _IRR                    0x10000024      /* Interrupt Reason Register */
+#define _AUD_CTL                0x100000c0      /* Audio controls (RW)       */
+#define _MDM_CTL_0              0x100000b0      /* Modem control 0 (RW)      */
+#define _MDM_CTL_1              0x100000b4      /* Modem control 1 (RW)      */
+#define _NCR_0	                0x100000a0      /* Control Register (RW)     */
+#define _KP_X_OUT               0x10000090      /* Keypad row write (RW)     */
+#define _KP_Y_IN                0x10000080      /* Keypad column read (RO)   */
+#define _SWPK                   0x10000020      /* Switch pack (RO)          */
+#define _WHOAMI                 0x10000000      /* System ID Register (RO)   */
+
+#define _LEDS                   0x10000010      /* LEDs [31:0] (WO)          */
+
+#define IRR                     (*((volatile u_char *) Nep_p2v(_IRR)))
+#define AUD_CTL                 (*((volatile u_char *) Nep_p2v(_AUD_CTL)))
+#define MDM_CTL_0               (*((volatile u_char *) Nep_p2v(_MDM_CTL_0)))
+#define MDM_CTL_1               (*((volatile u_char *) Nep_p2v(_MDM_CTL_1)))
+#define NCR_0			(*((volatile u_char *) Nep_p2v(_NCR_0)))
+#define KP_X_OUT                (*((volatile u_char *) Nep_p2v(_KP_X_OUT)))
+#define KP_Y_IN                 (*((volatile u_char *) Nep_p2v(_KP_Y_IN)))
+#define SWPK                    (*((volatile u_char *) Nep_p2v(_SWPK)))
+#define WHOAMI                  (*((volatile u_char *) Nep_p2v(_WHOAMI)))
+
+#define LEDS                    (*((volatile Word   *) Nep_p2v(_LEDS)))
+
+#define IRR_ETHERNET		(1<<0)
+#define IRR_USAR		(1<<1)
+#define IRR_SA1111		(1<<2)
+
+#define AUD_SEL_1341            (1<<0)
+#define AUD_MUTE_1341           (1<<1)
+
+#define MDM_CTL0_RTS1		(1 << 0)
+#define MDM_CTL0_DTR1		(1 << 1)
+#define MDM_CTL0_RTS2		(1 << 2)
+#define MDM_CTL0_DTR2		(1 << 3)
+
+#define MDM_CTL1_CTS1		(1 << 0)
+#define MDM_CTL1_DSR1		(1 << 1)
+#define MDM_CTL1_DCD1		(1 << 2)
+#define MDM_CTL1_CTS2		(1 << 3)
+#define MDM_CTL1_DSR2		(1 << 4)
+#define MDM_CTL1_DCD2		(1 << 5)
+
+#define NCR_GP01_OFF		(1<<0)
+#define NCR_TP_PWR_EN		(1<<1)
+#define NCR_MS_PWR_EN		(1<<2)
+#define NCR_ENET_OSC_EN		(1<<3)
+#define NCR_SPI_KB_WK_UP	(1<<4)
+#define NCR_A0VPP		(1<<5)
+#define NCR_A1VPP		(1<<6)
+
+#endif

include/asm-arm/arch-sa1100/pfs168.h

@@ -47,8 +47,6 @@
 #define SA1111_BASE             (0x40000000)
 
 #ifndef __ASSEMBLY__
-#define machine_has_neponset() (0)
-
 #define PFS168_COM5_VBASE		(*((volatile unsigned char *)(0xf0000000UL)))
 #define PFS168_COM6_VBASE		(*((volatile unsigned char *)(0xf0001000UL)))
 #define PFS168_SYSC1RTS			(*((volatile unsigned char *)(0xf0002000UL)))

include/asm-arm/arch-sa1100/serial.h

@@ -7,6 +7,26 @@
  * This is included by serial.c -- serial_sa1100.c makes no use of it.
  */
 
+/* Standard COM flags */
+#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
+
+/*
+ * Rather empty table...
+ * Hardwired serial ports should be defined here.
+ * PCMCIA will fill it dynamically.
+ */
+#ifdef CONFIG_SA1100_TRIZEPS
+
+#define RS_TABLE_SIZE 2
+
+#define STD_SERIAL_PORT_DEFNS	\
+       /* UART	CLK     	PORT		IRQ		FLAGS		*/ \
+	{ 0,	1500000,	TRIZEPS_UART5,	IRQ_GPIO16,	STD_COM_FLAGS },   \
+	{ 0,	1500000,	TRIZEPS_UART6,	IRQ_GPIO17,	STD_COM_FLAGS }
+
+#else
+
+#define RS_TABLE_SIZE 4
 
 /*
  * This assumes you have a 1.8432 MHz clock for your UART.
@@ -17,17 +37,6 @@
  */
 #define BASE_BAUD ( 1843200 / 16 )
 
-/* Standard COM flags */
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
-
-#define RS_TABLE_SIZE 4
-
-
-/*
- * Rather empty table...
- * Hardwired serial ports should be defined here.
- * PCMCIA will fill it dynamically.
- */
 #define STD_SERIAL_PORT_DEFNS	\
        /* UART	CLK     	PORT		IRQ	FLAGS		*/ \
 	{ 0,	BASE_BAUD,	0, 		0,	STD_COM_FLAGS },   \
@@ -35,5 +44,6 @@
 	{ 0,	BASE_BAUD,	0, 		0,	STD_COM_FLAGS },   \
 	{ 0,	BASE_BAUD,	0, 		0,	STD_COM_FLAGS }
 
-#define EXTRA_SERIAL_PORT_DEFNS
+#endif
 
+#define EXTRA_SERIAL_PORT_DEFNS

include/asm-arm/glue.h

@@ -89,7 +89,8 @@
  *	  v4_early	- ARMv4 without Thumb early abort handler
  *	  v4t_late	- ARMv4 with Thumb late abort handler
  *	  v4t_early	- ARMv4 with Thumb early abort handler
- *	  v5ej_early	- ARMv5 with Thumb and Java early abort handler
+ *	  v5tej_early	- ARMv5 with Thumb and Java early abort handler
+ *	  xscale	- ARMv5 with Thumb with Xscale extensions
  */
 #undef CPU_ABORT_HANDLER
 #undef MULTI_ABORT
@@ -127,7 +128,7 @@
 #endif
 
 #if defined(CONFIG_CPU_ARM920T) || defined(CONFIG_CPU_ARM922T) || \
-    defined(CONFIG_CPU_ARM1020) || defined(CONFIG_CPU_XSCALE)
+    defined(CONFIG_CPU_ARM1020)
 # ifdef CPU_ABORT_HANDLER
 #  define MULTI_ABORT 1
 # else
@@ -139,7 +140,15 @@
 # ifdef CPU_ABORT_HANDLER
 #  define MULTI_ABORT 1
 # else
-#  define CPU_ABORT_HANDLER v5ej_early_abort
+#  define CPU_ABORT_HANDLER v5tej_early_abort
+# endif
+#endif
+
+#if defined(CONFIG_CPU_XSCALE)
+# ifdef CPU_ABORT_HANDLER
+#  define MULTI_ABORT 1
+# else
+#  define CPU_ABORT_HANDLER xscale_abort
 # endif
 #endif
 
@@ -161,7 +170,7 @@
  *	  v4wt		- ARMv4 with writethrough cache, without minicache
  *	  v4wb		- ARMv4 with writeback cache, without minicache
  *	  v4_mc		- ARMv4 with minicache
- *	  v5te_mc	- ARMv5TE with minicache
+ *	  xscale	- Xscale
  */
 #undef _USER
 #undef MULTI_USER
@@ -204,7 +213,7 @@
 # ifdef _USER
 #  define MULTI_USER 1
 # else
-#  define _USER v5te_mc
+#  define _USER xscale_mc
 # endif
 #endif
 

include/asm-arm/mach/serial_sa1100.h

@@ -19,11 +19,8 @@ struct uart_info;
 struct sa1100_port_fns {
 	void	(*set_mctrl)(struct uart_port *, u_int);
 	u_int	(*get_mctrl)(struct uart_port *);
-	void	(*enable_ms)(struct uart_port *);
 	void	(*pm)(struct uart_port *, u_int, u_int);
 	int	(*set_wake)(struct uart_port *, u_int);
-	int	(*open)(struct uart_port *, struct uart_info *);
-	void	(*close)(struct uart_port *, struct uart_info *);
 };
 
 #ifdef CONFIG_SERIAL_SA1100