Commit fe4a6485 authored by Linus Walleij's avatar Linus Walleij

Merge branch 'ib-meson-fixes' into devel

parents 40e37958 64856974
...@@ -23,11 +23,11 @@ The GPIO bank for the controller is represented as a sub-node and it acts as a ...@@ -23,11 +23,11 @@ The GPIO bank for the controller is represented as a sub-node and it acts as a
GPIO controller. GPIO controller.
Required properties for sub-nodes are: Required properties for sub-nodes are:
- reg: should contain address and size for mux, pull-enable, pull and - reg: should contain a list of address and size, one tuple for each entry
gpio register sets in reg-names.
- reg-names: an array of strings describing the "reg" entries. Must - reg-names: an array of strings describing the "reg" entries.
contain "mux", "pull" and "gpio". "pull-enable" is optional and Must contain "mux" and "gpio".
when it is missing the "pull" registers are used instead May contain "pull", "pull-enable" and "ds" when appropriate.
- gpio-controller: identifies the node as a gpio controller - gpio-controller: identifies the node as a gpio controller
- #gpio-cells: must be 2 - #gpio-cells: must be 2
......
...@@ -31,6 +31,9 @@ ...@@ -31,6 +31,9 @@
* In some cases the register ranges for pull enable and pull * In some cases the register ranges for pull enable and pull
* direction are the same and thus there are only 3 register ranges. * direction are the same and thus there are only 3 register ranges.
* *
* Since Meson G12A SoC, the ao register ranges for gpio, pull enable
* and pull direction are the same, so there are only 2 register ranges.
*
* For the pull and GPIO configuration every bank uses a contiguous * For the pull and GPIO configuration every bank uses a contiguous
* set of bits in the register sets described above; the same register * set of bits in the register sets described above; the same register
* can be shared by more banks with different offsets. * can be shared by more banks with different offsets.
...@@ -488,21 +491,26 @@ static int meson_pinctrl_parse_dt(struct meson_pinctrl *pc, ...@@ -488,21 +491,26 @@ static int meson_pinctrl_parse_dt(struct meson_pinctrl *pc,
return PTR_ERR(pc->reg_mux); return PTR_ERR(pc->reg_mux);
} }
pc->reg_pull = meson_map_resource(pc, gpio_np, "pull"); pc->reg_gpio = meson_map_resource(pc, gpio_np, "gpio");
if (IS_ERR(pc->reg_pull)) { if (IS_ERR(pc->reg_gpio)) {
dev_err(pc->dev, "pull registers not found\n"); dev_err(pc->dev, "gpio registers not found\n");
return PTR_ERR(pc->reg_pull); return PTR_ERR(pc->reg_gpio);
} }
pc->reg_pull = meson_map_resource(pc, gpio_np, "pull");
/* Use gpio region if pull one is not present */
if (IS_ERR(pc->reg_pull))
pc->reg_pull = pc->reg_gpio;
pc->reg_pullen = meson_map_resource(pc, gpio_np, "pull-enable"); pc->reg_pullen = meson_map_resource(pc, gpio_np, "pull-enable");
/* Use pull region if pull-enable one is not present */ /* Use pull region if pull-enable one is not present */
if (IS_ERR(pc->reg_pullen)) if (IS_ERR(pc->reg_pullen))
pc->reg_pullen = pc->reg_pull; pc->reg_pullen = pc->reg_pull;
pc->reg_gpio = meson_map_resource(pc, gpio_np, "gpio"); pc->reg_ds = meson_map_resource(pc, gpio_np, "ds");
if (IS_ERR(pc->reg_gpio)) { if (IS_ERR(pc->reg_ds)) {
dev_err(pc->dev, "gpio registers not found\n"); dev_dbg(pc->dev, "ds registers not found - skipping\n");
return PTR_ERR(pc->reg_gpio); pc->reg_ds = NULL;
} }
return 0; return 0;
......
...@@ -120,6 +120,7 @@ struct meson_pinctrl { ...@@ -120,6 +120,7 @@ struct meson_pinctrl {
struct regmap *reg_pullen; struct regmap *reg_pullen;
struct regmap *reg_pull; struct regmap *reg_pull;
struct regmap *reg_gpio; struct regmap *reg_gpio;
struct regmap *reg_ds;
struct gpio_chip chip; struct gpio_chip chip;
struct device_node *of_node; struct device_node *of_node;
}; };
......
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