Commit fe5d106d authored by David Woodhouse's avatar David Woodhouse

Wind River PowerQUICC II SBC82xx update:

 - Switch to using u-boot bdinfo.
 - Set up CS11 for RTC if the bootloader didn't bother.
 - Set BOOTROM_RESTART_ADDR so machine_restart() actually works.
 - For non-uboot boot, note bus clock is 66MHz on 8265 model.
parent 0a4948e3
......@@ -1627,17 +1627,23 @@ init_fcc_param(fcc_info_t *fip, struct net_device *dev,
eap = (unsigned char *)&(ep->fen_paddrh);
for (i=5; i>=0; i--) {
#ifdef CONFIG_SBC82xx
*eap++ = dev->dev_addr[i] = bd->bi_enetaddrs[fip->fc_fccnum+1][i];
if (i == 5) {
/* bd->bi_enetaddr holds the SCC0 address; the FCC
devices count up from there */
dev->dev_addr[i] = bd->bi_enetaddr[i] & ~3;
dev->dev_addr[i] += 1 + fip->fc_fccnum;
*eap++ = dev->dev_addr[i];
}
#else
if (i == 3) {
dev->dev_addr[i] = bd->bi_enetaddr[i];
dev->dev_addr[i] |= (1 << (7 - fip->fc_fccnum));
*eap++ = dev->dev_addr[i];
}
#endif
else {
*eap++ = dev->dev_addr[i] = bd->bi_enetaddr[i];
}
#endif
}
ep->fen_taddrh = 0;
......
......@@ -503,29 +503,17 @@ embed_config(bd_t **bdp)
bd->bi_memsize = 256 * 1024 * 1024; /* just a guess */
cp = (void*)SBC82xx_MACADDR_NVRAM_SCC1;
for (i=0; i<6; i++) {
bd->bi_enetaddrs[0][i] = *cp++;
}
cp = (void*)SBC82xx_MACADDR_NVRAM_FCC1;
for (i=0; i<6; i++) {
bd->bi_enetaddrs[1][i] = *cp++;
}
cp = (void*)SBC82xx_MACADDR_NVRAM_FCC2;
for (i=0; i<6; i++) {
bd->bi_enetaddrs[2][i] = *cp++;
}
cp = (void*)SBC82xx_MACADDR_NVRAM_FCC3;
for (i=0; i<6; i++) {
bd->bi_enetaddrs[3][i] = *cp++;
}
memcpy(bd->bi_enetaddr, cp, 6);
/* can busfreq be calculated? */
bd->bi_busfreq = 100000000;
pvr = mfspr(PVR);
if ((pvr & 0xffff0000) == 0x80820000)
if ((pvr & 0xffff0000) == 0x80820000) {
bd->bi_busfreq = 100000000;
clk_8280(bd);
else
} else {
bd->bi_busfreq = 66000000;
clk_8260(bd);
}
}
#endif /* SBC82xx */
......
......@@ -17,11 +17,13 @@
#include <linux/config.h>
#include <linux/seq_file.h>
#include <linux/stddef.h>
#include <asm/mpc8260.h>
#include <asm/machdep.h>
#include <asm/io.h>
#include <asm/todc.h>
#include <asm/immap_8260.h>
static void (*callback_setup_arch)(void);
......@@ -40,8 +42,8 @@ sbc82xx_show_cpuinfo(struct seq_file *m)
seq_printf(m, "vendor\t\t: Wind River\n"
"machine\t\t: SBC PowerQUICC II\n"
"\n"
"mem size\t\t: 0x%08x\n"
"console baud\t\t: %d\n"
"mem size\t\t: 0x%08lx\n"
"console baud\t\t: %ld\n"
"\n",
binfo->bi_memsize,
binfo->bi_baudrate);
......@@ -65,7 +67,14 @@ TODC_ALLOC();
#ifdef CONFIG_GEN_RTC
static void sbc82xx_time_init(void)
{
volatile memctl8260_t *mc = &immr->im_memctl;
TODC_INIT(TODC_TYPE_MK48T59, 0, 0, SBC82xx_TODC_NVRAM_ADDR, 0);
/* Set up CS11 for RTC chip */
mc->memc_br11=0;
mc->memc_or11=0xffff0836;
mc->memc_br11=0x80000801;
todc_info->nvram_data =
(unsigned int)ioremap(todc_info->nvram_data, 0x2000);
BUG_ON(!todc_info->nvram_data);
......@@ -84,8 +93,11 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
/* Generic 8260 platform initialization */
m8260_init(r3, r4, r5, r6, r7);
/* Anything special for this platform */
/* u-boot may be using one of the FCC Ethernet devices.
Use the MAC address to the SCC. */
__res[offsetof(bd_t, bi_enetaddr[5])] &= ~3;
/* Anything special for this platform */
ppc_md.show_cpuinfo = sbc82xx_show_cpuinfo;
callback_setup_arch = ppc_md.setup_arch;
......
......@@ -4,7 +4,13 @@
* the configuration SCMR and the Power-On-Reset word.
*/
#ifndef __PPC_SBC82xx_H__
#define __PPC_SBC82xx_H__
#include <asm/ppcboot.h>
#define IMAP_ADDR 0xf0000000
#define CPM_MAP_ADDR 0xf0000000
#define SBC82xx_TODC_NVRAM_ADDR 0x80000000
......@@ -13,22 +19,6 @@
#define SBC82xx_MACADDR_NVRAM_FCC2 0x220000d5 /* JP7A */
#define SBC82xx_MACADDR_NVRAM_FCC3 0x220000db /* JP7B */
#define BOOTROM_RESTART_ADDR ((uint)0x40000104)
/* A Board Information structure that is given to a program when
* prom starts it up.
*/
typedef struct bd_info {
unsigned int bi_memstart; /* Memory start address */
unsigned int bi_memsize; /* Memory (end) size in bytes */
unsigned int bi_intfreq; /* Internal Freq, in Hz */
unsigned int bi_busfreq; /* Bus Freq, in MHz */
unsigned int bi_cpmfreq; /* CPM Freq, in MHz */
unsigned int bi_brgfreq; /* BRG Freq, in MHz */
unsigned int bi_vco; /* VCO Out from PLL */
unsigned int bi_baudrate; /* Default console baud rate */
unsigned char bi_enetaddrs[4][6];
#define bi_enetaddr bi_enetaddrs[0]
} bd_t;
extern bd_t m8xx_board_info;
#endif /* __PPC_SBC82xx_H__ */
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