[PATCH] HP9000/300 I/O access fixes

HP9000/300: Replace remaining readb() and friends by in_8() and friends

arch/m68k/hp300/time.c

@@ -40,7 +40,7 @@ static void hp300_tick(int irq, void *dev_id, struct pt_regs *regs)
 {
   unsigned long tmp;
   void (*vector)(int, void *, struct pt_regs *) = dev_id;
-  readb(CLOCKBASE + CLKSR);
+  in_8(CLOCKBASE + CLKSR);
   asm volatile ("movpw %1@(5),%0" : "=d" (tmp) : "a" (CLOCKBASE));
   vector(irq, NULL, regs);
 }
@@ -51,25 +51,25 @@ unsigned long hp300_gettimeoffset(void)
   unsigned char lsb, msb1, msb2;
   unsigned short ticks;
 
-  msb1 = readb(CLOCKBASE + 5);
-  lsb = readb(CLOCKBASE + 7);
-  msb2 = readb(CLOCKBASE + 5);
+  msb1 = in_8(CLOCKBASE + 5);
+  lsb = in_8(CLOCKBASE + 7);
+  msb2 = in_8(CLOCKBASE + 5);
   if (msb1 != msb2)
     /* A carry happened while we were reading.  Read it again */
-    lsb = readb(CLOCKBASE + 7);
+    lsb = in_8(CLOCKBASE + 7);
   ticks = INTVAL - ((msb2 << 8) | lsb);
   return (USECS_PER_JIFFY * ticks) / INTVAL;
 }
 
 void __init hp300_sched_init(void (*vector)(int, void *, struct pt_regs *))
 {
-  writeb(0x1, CLOCKBASE + CLKCR2);		/* select CR1 */
-  writeb(0x1, CLOCKBASE + CLKCR1);		/* reset */
+  out_8(CLOCKBASE + CLKCR2, 0x1);		/* select CR1 */
+  out_8(CLOCKBASE + CLKCR1, 0x1);		/* reset */
 
   asm volatile(" movpw %0,%1@(5)" : : "d" (INTVAL), "a" (CLOCKBASE));
 
   sys_request_irq(6, hp300_tick, IRQ_FLG_STD, "timer tick", vector);
 
-  writeb(0x1, CLOCKBASE + CLKCR2);		/* select CR1 */
-  writeb(0x40, CLOCKBASE + CLKCR1);		/* enable irq */
+  out_8(CLOCKBASE + CLKCR2, 0x1);		/* select CR1 */
+  out_8(CLOCKBASE + CLKCR1, 0x40);		/* enable irq */
 }

drivers/video/hpfb.c

@@ -78,29 +78,29 @@ static int hpfb_setcolreg(unsigned regno, unsigned red, unsigned green,
                            unsigned blue, unsigned transp,
                            struct fb_info *info)
 {
-	while (readw(fb_regs + 0x6002) & 0x4) udelay(1);
-	writew(0, fb_regs + 0x60f0);
-	writew(regno, fb_regs + 0x60b8);
-	writew(red, fb_regs + 0x60b2);
-	writew(green, fb_regs + 0x60b4);
-	writew(blue, fb_regs + 0x60b6);
-	writew(0xff, fb_regs + 0x60f0);
+	while (in_be16(fb_regs + 0x6002) & 0x4) udelay(1);
+	out_be16(fb_regs + 0x60f0, 0);
+	out_be16(fb_regs + 0x60b8, regno);
+	out_be16(fb_regs + 0x60b2, red);
+	out_be16(fb_regs + 0x60b4, green);
+	out_be16(fb_regs + 0x60b6, blue);
+	out_be16(fb_regs + 0x60f0, 0xff);
 	udelay(100);
-	writew(0xffff, fb_regs + 0x60ba);
+	out_be16(fb_regs + 0x60ba, 0xffff);
 	return 0;
 }
 
 void hpfb_copyarea(struct fb_info *info, struct fb_copyarea *area) 
 {
-	while (readb(fb_regs + BUSY) & fb_bitmask);
-	writeb(0x3, fb_regs + WMRR);
-	writew(area->sx, fb_regs + SOURCE_X);
-	writew(area->sy, fb_regs + SOURCE_Y);
-	writew(area->dx, fb_regs + DEST_X);
-	writew(area->dy, fb_regs + DEST_Y);
-	writew(area->height, fb_regs + WHEIGHT);
-	writew(area->width, fb_regs + WWIDTH);
-	writeb(fb_bitmask, fb_regs + WMOVE);
+	while (in_8(fb_regs + BUSY) & fb_bitmask);
+	out_8(fb_regs + WMRR, 0x3);
+	out_be16(fb_regs + SOURCE_X, area->sx);
+	out_be16(fb_regs + SOURCE_Y, area->sy);
+	out_be16(fb_regs + DEST_X, area->dx);
+	out_be16(fb_regs + DEST_Y, area->dy);
+	out_be16(fb_regs + WHEIGHT, area->height);
+	out_be16(fb_regs + WWIDTH, area->width);
+	out_8(fb_regs + WMOVE, fb_bitmask);
 }
 
 static struct fb_ops hpfb_ops = {
@@ -121,38 +121,37 @@ int __init hpfb_init_one(unsigned long base)
 {
 	unsigned long fboff;
 
-	fboff = (readb(base + TOPCAT_FBOMSB) << 8) 
-		| readb(base + TOPCAT_FBOLSB);
+	fboff = (in_8(base + TOPCAT_FBOMSB) << 8) | in_8(base + TOPCAT_FBOLSB);
 
-	hpfb_fix.smem_start = 0xf0000000 | (readb(base + fboff) << 16);
+	hpfb_fix.smem_start = 0xf0000000 | (in_8(base + fboff) << 16);
 	fb_regs = base;
 
 #if 0
 	/* This is the magic incantation NetBSD uses to make Catseye boards work. */
-	writeb(0, base+0x4800);
-	writeb(0, base+0x4510);
-	writeb(0, base+0x4512);
-	writeb(0, base+0x4514);
-	writeb(0, base+0x4516);
-	writeb(0x90, base+0x4206);
+	out_8(base+0x4800, 0);
+	out_8(base+0x4510, 0);
+	out_8(base+0x4512, 0);
+	out_8(base+0x4514, 0);
+	out_8(base+0x4516, 0);
+	out_8(base+0x4206, 0x90);
 #endif
 	/* 
 	 *	Give the hardware a bit of a prod and work out how many bits per
 	 *	pixel are supported.
 	 */
 	
-	writeb(0xff, base + TC_WEN);
-	writeb(0xff, base + TC_FBEN);
-	writeb(0xff, hpfb_fix.smem_start);
-	fb_bitmask = readb(hpfb_fix.smem_start);
+	out_8(base + TC_WEN, 0xff);
+	out_8(base + TC_FBEN, 0xff);
+	out_8(hpfb_fix.smem_start, 0xff);
+	fb_bitmask = in_8(hpfb_fix.smem_start);
 
 	/*
 	 *	Enable reading/writing of all the planes.
 	 */
-	writeb(fb_bitmask, base + TC_WEN);
-	writeb(fb_bitmask, base + TC_REN);
-	writeb(fb_bitmask, base + TC_FBEN);
-	writeb(0x1, base + TC_NBLANK);
+	out_8(base + TC_WEN, fb_bitmask);
+	out_8(base + TC_REN, fb_bitmask);
+	out_8(base + TC_FBEN, fb_bitmask);
+	out_8(base + TC_NBLANK, 0x1);
 
 	/*
 	 *	Let there be consoles..