Commit ffb910d7 authored by Florian Fainelli's avatar Florian Fainelli

ARM: BCM63xx: Remove custom secondary_startup function

With commit 02b4e275 ("ARM: v7 setup
function should invalidate L1 cache"), the default secondary_startup
function for ARMv7 CPUs does invalidate the L1 cache, which was the sole
reason why BCM63xx had to have its own secondary_startup implementation.

Now that the secondary_startup takes care of this, we can completely
remove that code.
Signed-off-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
parent a6b4b25b
......@@ -39,10 +39,8 @@ obj-$(CONFIG_ARCH_BCM_5301X) += bcm_5301x.o
# BCM63XXx
ifeq ($(CONFIG_ARCH_BCM_63XX),y)
CFLAGS_bcm63xx_headsmp.o += -march=armv7-a
obj-y += bcm63xx.o
obj-$(CONFIG_SMP) += bcm63xx_smp.o bcm63xx_headsmp.o \
bcm63xx_pmb.o
obj-$(CONFIG_SMP) += bcm63xx_smp.o bcm63xx_pmb.o
endif
ifeq ($(CONFIG_ARCH_BRCMSTB),y)
......
/*
* Copyright (C) 2015, Broadcom Corporation
* All Rights Reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/linkage.h>
#include <linux/init.h>
#include <asm/assembler.h>
ENTRY(bcm63138_secondary_startup)
ARM_BE8(setend be)
/*
* L1 cache does have unpredictable contents at power-up clean its
* contents without flushing
*/
bl v7_invalidate_l1
nop
b secondary_startup
ENDPROC(bcm63138_secondary_startup)
......@@ -135,7 +135,7 @@ static int bcm63138_smp_boot_secondary(unsigned int cpu,
}
/* Write the secondary init routine to the BootLUT reset vector */
val = virt_to_phys(bcm63138_secondary_startup);
val = virt_to_phys(secondary_startup);
writel_relaxed(val, bootlut_base + BOOTLUT_RESET_VECT);
/* Power up the core, will jump straight to its reset vector when we
......
......@@ -3,7 +3,6 @@
struct device_node;
extern void bcm63138_secondary_startup(void);
extern int bcm63xx_pmb_power_on_cpu(struct device_node *dn);
#endif /* __BCM63XX_SMP_H */
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