- 17 Jun, 2013 40 commits
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Marek Vasut authored
This patch adds support for the DENX M53EVK board. The board currently supports NAND, Ethernet, UART, CAN, I2C. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Shawn Guo authored
With device tree clk lookup support in place, we can move audio codec clk lookup for ssi_ext1 into device tree now, so that imx53_qsb_init() can be saved. Since ssi_ext2 lookup is used nowhere, it gets removed together with ssi_ext1 lookup from clk driver. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Marek Vasut authored
This patch adds pinctrl data for PWM1 on MX53. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Marek Vasut authored
This patch adds pinmux for IPU LCD 1 and IPU LVDS. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Marek Vasut authored
This patch adds pinctrl data for NAND on MX53. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Marek Vasut authored
This patch adds pinctrl data for different mux of I2C2 on MX53. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Marek Vasut authored
This patch adds pinctrl data for different mux of I2C1 on MX53. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Marek Vasut authored
This patch adds pinctrl data for different mux of CAN1 on MX53. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Marek Vasut authored
This patch adds pinctrl data for the AUDMUX4 on MX53. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Philipp Zabel authored
This allows to order the i2c character devices correctly, so that /dev/i2c-0 corresponds to i2c1, /dev/i2c-1 corresponds to i2c2, and so on. Currently they are ordered by register address. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Gwenhael Goavec-Merou authored
Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@armadeus.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Michael Grzeschik authored
Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Michael Grzeschik authored
Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Michael Grzeschik authored
Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Michael Grzeschik authored
Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Shawn Guo authored
imx soc changes for 3.11: * New SoCs i.MX6 Sololite and Vybrid VF610 support * imx5 and imx6 clock fixes and additions * Update clock driver to use of_clk_init() function * Refactor restart routine mxc_restart() to get it work for DT boot as well * Clean up mxc specific ulpi access ops * imx defconfig updates
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Fabio Estevam authored
Let VF610 SoC support be built by default. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Nicolin Chen authored
Enable imx-wm8962 and PM_RUNTIME, essential for WM8962 CODEC driver. Signed-off-by: Nicolin Chen <b42378@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Nicolin Chen authored
WM8962 needs 24MHz clock for its MCLK, so choose PLL4 as the parent of clko1. Signed-off-by: Nicolin Chen <b42378@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Fabio Estevam authored
These options are useful for controlling backlight contrast via PWM. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Markus Pargmann authored
There are ulpi access ops implemented in drivers/usb/phy/phy-ulpi.c. mxc access ops implement the same access operations within mach-imx. This patch removes the mxc ulpi file and uses phy-ulpi instead for imx_otg_ulpi_create. phy-ulpi successfully tested with i.MX27 Phytec phyCARD-S (pca100). Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Jingchang Lu authored
Add initial support for Freescale Vybrid VF610 SoC. Signed-off-by: Jingchang Lu <b35083@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Jingchang Lu authored
Add clock support for Vybrid VF610. It uses dtc macro support to define all clock IDs in vf610-clock.h to keep clock IDs coherence between kernel and DT. Signed-off-by: Jingchang Lu <b35083@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Rogerio Pimentel authored
Enable paralell display by default Signed-off-by: Rogerio Pimentel <rogerio.pimentel@freescale.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Fabio Estevam authored
commit 84344b43c (ARM: i.MX5: Allow DT clock providers) introduce the following sparse warning: arch/arm/mach-imx/clk.c:12:43: warning: Using plain integer as NULL pointer There is no need to initialize phandle, so remove it. Cc: Martin Fuzzey <mfuzzey@parkeon.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Fabio Estevam authored
Fix the following sparse warning: arch/arm/mach-imx/irq-common.c:24:5: warning: symbol 'mxc_set_irq_fiq' was not declared. Should it be static? Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Fabio Estevam authored
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Shawn Guo authored
Instead of explicitly calling clock initialization functions, we can declare the functions with CLK_OF_DECLARE() and then call common of_clk_init() to have them invoked properly. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Shawn Guo authored
As the fixed rate clocks are defined in device tree, we can just call of_clk_init() to register them. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Fabio Estevam authored
Let the mx53 TVE driver be built by default. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Dirk Behme authored
The CCM_CBCMR register (address 0x02C4018) has different meaning between the i.MX6 Quad/Dual and the i.MX6 Solo/DualLite. Compared to the i.MX6 Quad/Dual, the CCM_CBCMR register in the i.MX6 Solo/DualLite reuses the gpu2d_core bits for the MLB clock configuration. Signed-off-by: Dirk Behme <dirk.behme@gmail.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Philipp Zabel authored
This patch adds the S/PDIF clocks for i.MX51 and i.MX53. Tested on i.MX53. The i.MX51 has a second set of spdif_root clock dividers, and on i.MX53 there is an additional input to the spdif_xtal mux. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Sascha Hauer authored
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Huang Shijie authored
Add the eim_slow clock, since the weim needs it. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Jiada Wang authored
MLB PLL should be handled internally in MLB driver, so remove it from pllv3. Signed-off-by: Jiada Wang <jiada_wang@mentor.com> CC: Dirk Behme <dirk.behme@de.bosch.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Jiada Wang authored
The MLB PLL clock's operation doesn't fit for clock framework and it should be handled internally in MLB driver. Remove initialization of pll8_mlb clock device but leave its declaration in mx6q_clks to avoid affecting imx6q clock numbering. Signed-off-by: Jiada Wang <jiada_wang@mentor.com> CC: Dirk Behme <dirk.behme@de.bosch.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Shawn Guo authored
Add initial support for i.MX6 SoloLite. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Shawn Guo authored
Enable low-level debug support for i.MX6 SoloLite by adding the debug port definitions for the SoC. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Shawn Guo authored
Add clock support for i.MX6 SoloLite. It uses the dtc marco support to define all clock IDs in imx6sl-clock.h, which will be included by both clock driver and device tree sources, so that the data will stay sync all the time between kernel and DT. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Shawn Guo authored
The mxc_arch_reset_init() uses static mapping and calls clk_get_sys() to get clock. It's suitable for non-DT boot but not for DT boot where dynamic mapping and of_clk_get() should be used instead. Create mxc_arch_reset_init_dt() as the DT variant of mxc_arch_reset_init(), and change DT platforms to use it. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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