- 01 Nov, 2013 1 commit
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Alex Deucher authored
The FMT blocks control how data is sent from the backend of the display pipe to to monitor. Proper set up of the FMT blocks are required for 30bpp formats. Additionally, dithering can be enabled on for better display with 18 and 24bpp displays. The exception is LVDS/eDP which atom takes care of in the SelectCRTC_Source table. For now just enable truncation until we test dithering more. Signed-off-by:Alex Deucher <alexander.deucher@amd.com>
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- 30 Oct, 2013 1 commit
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Thierry Reding authored
device_unregister() already drops its reference to the struct device, so explicitly calling put_device() before device_unregister() can cause the device to have been freed before it can be unregistered. Signed-off-by:
Thierry Reding <treding@nvidia.com> Reviewed-by:
Paulo Zanoni <paulo.r.zanoni@intel.com> Tested-by:
Ben Widawsky <ben@bwidawsk.net> Signed-off-by:
Dave Airlie <airlied@redhat.com>
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- 25 Oct, 2013 1 commit
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Dave Airlie authored
Merge tag 'drm-intel-next-2013-10-18' of git://people.freedesktop.org/~danvet/drm-intel into drm-next - CRC support from Damien and He Shuang. Long term this should allow us to test an awful lot modesetting corner cases automatically. So for me as the maintainer this is really big. - HDMI audio fix from Jani. - VLV dpll computation code refactoring from Ville. - Fixups for the gpu booster from last time around (Chris). - Some cleanups in the context code from Ben. - More watermark work from Ville (we'll be getting there ...). - vblank timestamp improvements from Ville. - CONFIG_FB=n support, including drm core changes to make the fbdev helpers optional. - DP link training improvements (Jani). - mmio vtable from Ben, prep work for future hw. * tag 'drm-intel-next-2013-10-18' of git://people.freedesktop.org/~danvet/drm-intel: (132 commits) drm/i915/dp: don't mention eDP bpp clamping if it doesn't affect bpp drm/i915: remove dead code in ironlake_crtc_mode_set drm/i915: crc support for hsw drm/i915: fix CRC debugfs setup drm/i915: wait one vblank when disabling CRCs drm/i915: use ->get_vblank_counter for the crc frame counter drm/i915: wire up CRC interrupt for ilk/snb drm/i915: add CRC #defines for ilk/snb drm/i915: extract display_pipe_crc_update drm/i915: don't Oops in debugfs for I915_FBDEV=n drm/i915: set HDMI pixel clock in audio configuration drm/i915: pass mode to ELD write vfuncs cpufreq: Add dummy cpufreq_cpu_get/put for CONFIG_CPU_FREQ=n drm/i915: check gem bo size when creating framebuffers drm/i915: Use unsigned long for obj->user_pin_count drm/i915: prevent tiling changes on framebuffer backing storage drm/i915: grab dev->struct_mutex around framebuffer_init drm/i915: vlv: fix VGA hotplug after modeset drm: add support for additional stereo 3D modes drm/i915: preserve dispaly init order on ByT ...
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- 23 Oct, 2013 8 commits
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Marc-André Lureau authored
To disable a monitor, a Spice client sends a monitor config with the monitor resolution to 0x0. However, before qxl_crtc_disable() is reached after the hotplug event, it can happen that another monitor is reconfigured, and qxl_send_monitors_config() is called with the old config, which will re-enable the monitor on the client. Reset config if monitor is found disconnected, during drm_helper_hpd_irq_event(). Signed-off-by:
Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by:
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Marc-André Lureau authored
All hard-coded resolutions are passing this check. Signed-off-by:
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Marc-André Lureau authored
By default, 1024x768 is the preferred resolution. However, when a monitor config is given, it should be the only preferred resolution. Note that the monitor config resolution is passed to qxl_add_common_modes() to avoid adding a duplicate mode without the preferred resolution. That would discard the previous monitor config preferred bit. Signed-off-by:
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Marc-André Lureau authored
In commit 38d5487d, Keith explained: This patch simply merges the two mode type bits together; that seems reasonable to me, but perhaps only a subset of the bits should be used? None of these can be user defined as they all come from looking at just the hardware. However, merging the bits means that a flag becomes sticky. It is not possible, for example to update the mode type to remove the DRM_MODE_TYPE_PREFERRED bit. After a brief discussion with Dave Airlie on irc, it was agreed to propose that change, instead of introducing another function to remove a bit from exisiting modes type. Signed-off-by:
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Marc-André Lureau authored
drm_helper_hpd_irq_event() only notifies when the connector status changed. However, Spice monitor config can change while the connector is connected, to support arbitrary resolution. Do an hotplug event if it wasn't done by drm_helper_hpd_irq_event(). Signed-off-by:
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Marc-André Lureau authored
The caller may want to know whether the configuration was changed, and if an hotplug event was sent. Signed-off-by:
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Marc-André Lureau authored
Fix a little spelling of drm_crtc_convert_umode() comment. Signed-off-by:
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git://ftp.arm.linux.org.uk/~rmk/linux-cuboxDave Airlie authored
Fix build on non-ARM * 'drm-tda998x-3.12-fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-cubox: DRM: Armada: depend on ARM
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- 22 Oct, 2013 3 commits
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Russell King authored
Armada DRM uses relaxed accessors which are not available on other platforms. Limit it to just ARM. Acked-by:
Rob Clark <robdclark@gmail.com> Signed-off-by:
Russell King <rmk+kernel@arm.linux.org.uk>
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git://ftp.arm.linux.org.uk/~rmk/linux-cuboxDave Airlie authored
This adds support for the Armada 510 display subsystem found on the Marvell Dove devices. This IP is re-used across several different Marvell SoCs with various tweaks, and this driver has been structured to allow the other IPs to re-use the bulk of this code; further work in this area is expected from interested parties. This has been extensively tested on the SolidRun Cubox platform and appears to work well there. [airlied: update for api changes merged previous to this]
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Dave Airlie authored
So drm was abusing device lifetimes, by having embedded device structures in the minor and connector it meant that the lifetime of the internal drm objects (drm_minor and drm_connector) were tied to the lifetime of the device files in sysfs, so if something kept those files opened the current code would kfree the objects and things would go downhill from there. Now in reality there is no need for these lifetimes to be so intertwined, especailly with hotplugging of devices where we wish to remove the sysfs and userspace facing pieces before we can unwind the internal objects due to open userspace files or mmaps, so split the objects out so the struct device is no longer embedded and do what fbdev does and just allocate and remove the sysfs inodes separately. Signed-off-by:
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- 18 Oct, 2013 18 commits
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Russell King authored
Add support for TDA998x output via the slave driver in the kernel. Reviewed-by:
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Russell King authored
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Russell King authored
Tested-by:
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Reviewed-by:
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Russell King authored
This patch adds ARGB hardware cursor support to the DRM driver for the Marvell Armada SoCs. ARGB cursors are supported at either 32x64 or 64x32 resolutions. Tested-by:
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Jani Nikula authored
This is useful with the follow-up patch that frobs dev_priv->vbt.edp_bpp, and the value no longer comes directly from VBT. Signed-off-by:
Jani Nikula <jani.nikula@intel.com> Signed-off-by:
Daniel Vetter <daniel.vetter@ffwll.ch>
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Daniel Vetter authored
In Author: Daniel Vetter <daniel.vetter@ffwll.ch> Date: Wed Jun 5 13:34:23 2013 +0200 drm/i915: consolidate pch pll enable sequence I've removed all the code from this if block, but somehow forgotten to kill the block itself. Reviewed-by:Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by:
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Daniel Vetter authored
hw designers decided to change the CRC registers and coalesce them all into one. Otherwise nothing changed. I've opted for a new hsw_ version to grab the crc sample since hsw+1 will have the same crc registers, but different interrupt source registers. So this little helper function will come handy there. Also refactor the display error handler with a neat pipe loop. v2: Use for_each_pipe. Reviewed-by:
Damien Lespiau <damien.lespiau@intel.com> Signed-off-by:
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Daniel Vetter authored
We've set up all files, but removed only those for which we have a pipe. Which leaves the one for pipe C on machines with less than 2 pipes, breaking module reload. v2: We can't get at the drm device this early (wtf), so just register all the files and also remove them all again. Reviewed-by:
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Daniel Vetter authored
This avoids a spurious spurious interrupt warning. Reviewed-by:
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Daniel Vetter authored
Suggested by Ville. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by:
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Daniel Vetter authored
We enable the interrupt unconditionally and only control it through the enable bit in the CRC control register. v2: Extract per-platform helpers to compute the register values. Reviewed-by:
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Daniel Vetter authored
Also add a new _PIPE_INC macro which takes an base plus increment. Much less likely to botch the job by missing an s/A/B/ somewhere. v2: They've moved the bitfield. Argh! Reviewed-by:
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Daniel Vetter authored
The ringbuffer update logic should always be the same, but different platforms have different amounts of CRC registers. Hence extract it. Reviewed-by:
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Daniel Vetter authored
Failed to properly test this. Reported-by:
Chris Wilson <chris@chris-wilson.co.uk> Cc: Chris Wilson <chris@chris-wilson.co.uk> Tested-by:
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Jani Nikula authored
The HDMI audio expects HDMI pixel clock to be set in the audio configuration. We've currently just set 0, using 25.2 / 1.001 kHz frequency, which fails with some modes. v2: Now with a commit message. Reference: http://mid.gmane.org/CAGpEb3Ep1LRZETPxHGRfBDqr5Ts2tAc8gCukWwugUf1U5NYv1g@mail.gmail.com Reference: http://mid.gmane.org/20130206213533.GA16367@hardeman.nuReported-by:
David Härdeman <david@hardeman.nu> Reported-by:
Jasper Smet <josbeir@gmail.com> Tested-by:
Rodrigo Vivi <rodrigo.vivi@gmail.com> Signed-off-by:
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Jani Nikula authored
This will be needed for setting the HDMI pixel clock for audio config. No functional changes. v2: Now with a commit message. Signed-off-by:
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Daniel Vetter authored
The drm/i915 driver wants to adjust it's own power policies using the cpu policies as a guideline (we can implicitly boost the cpus through the gpus on some platforms). To avoid a dreaded select (since a depends will leave users wondering where where their driver has gone too) add dummy functions. Reported-by:
kbuild test robot <fengguang.wu@intel.com> Cc: kbuild test robot <fengguang.wu@intel.com> Cc: "Rafael J. Wysocki" <rjw@sisk.pl> Cc: Viresh Kumar <viresh.kumar@linaro.org> Cc: cpufreq@vger.kernel.org Cc: linux-pm@vger.kernel.org Cc: linux-kernel@vger.kernel.org Acked-by:
Rafael J. Wysocki <rjw@sisk.pl> Signed-off-by:
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Daniel Vetter authored
It's better to catch such fallout early, and this way we can rely on the checking done by the drm core on fb->heigh/width at modeset time. If we ever support planar formats on intel we might want to look into a common helper to do all this, but for now this is good enough. v2: Take tiling into account, requested by Ville. v3: Fix tile height on gen2, spotted by Ville. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Requested-by:
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- 16 Oct, 2013 8 commits
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Daniel Vetter authored
At least on linux sizeof(long) == sizeof(void*) and the thinking is that you can grab about as many references as there's memory. Doesn't really matter, just a bit of OCD since the fixed size data type in a pure in-kernel datastructure look off. v2: Ville asked for an overflow check since no one prevents userspace from incrementing the pin count forever. v3: s/INT/LONG/, noticed by Chris. Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by:
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Daniel Vetter authored
Assuming that all framebuffer related metadata is invariant simplifies our userspace input data checking. And current userspace always first updates the tiling of an object before creating a framebuffer with it. This allows us to upconvert a check in pin_and_fence to a WARN. In the future it should also be helpful to know which buffer objects are potential scanout targets for e.g. frontbuffer rendering tracking and similar things. Note that SNA shipped for one prerelease with code which will be broken through this patch. But users shouldn't notice since it's purely an optimization and will transparently fall back to allocating a new fb. i-g-t also had offending code (now fixed), but we don't really care about breaking the test-suite. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by:
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Daniel Vetter authored
We look at gem state (like obj->tiling/obj->stride), we better have the relevant locks. Right now this doesn't matter much since most of these checks are a curtesy to safe buggy userspace, but I'd like to freeze the tiling once we have framebuffer objects attached. And then locking matters. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by:
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Imre Deak authored
Since commit 912d812e Author: Daniel Vetter <daniel.vetter@ffwll.ch> Date: Thu Oct 11 20:08:23 2012 +0200 drm/i915/crt: don't set HOTPLUG bits on !PCH on VLV we don't detect any VGA unplug event after a modeset, since there we reset the ADPA hotplug bits. Fix it by preserving the hotplug bits on VLV as well. Signed-off-by:
Imre Deak <imre.deak@intel.com> [danvet: For consistency use gen >= 5 like in Chris' exact same fix in intel_crt_reset.] Signed-off-by:
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Thomas Wood authored
Parse the 3D_Structure_ALL and 3D_MASK fields of the HDMI Vendor Specific Data Block to expose more stereo 3D modes. v2: Use (1 << 0) for consistency. (Ville Syrjälä) Skip adding any modes if 3D_MASK is indicated as being present but the length only includes 3D_Structure_ALL. (Ville Syrjälä) Check that the value of HDMI_3D_LEN is large enough to include 3D_Structure_ALL and 3D_MASK, if they are present. (Ville Syrjälä) v3: Increment offset before the length checks. (Ville Syrjälä) Signed-off-by:Thomas Wood <thomas.wood@intel.com> Reviewed-by:
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Artem Bityutskiy authored
This patch changes HDMI port registration order for the BayTrail platform. The story is that in kernel version 3.11 i915 supported only one HDMI port - the HDMIB port. So this port ended up being HDMI-1 in user-space. But commit '6f6005a5 drm/i915: expose HDMI connectors on port C on BYT' introduced HDMIC port support. And added HDMIC registration prior to HDMIB, so HDMIB became HDMI-2 and HDMIC became HDMI-1. Well, this is fine as far as the kernel is concerned. i915 does not give any guarantees to the numbering, and has never given them. However, this breaks wayland setup in Tizen IVI. We have only one single HDMI port on our hardware, and it is connected to HDMIB. Our configuration relies on the fact that it is HDMI-1. Well, certainly this is user-space problem which was exposed with Jesse's patch. However, there is a reason why we have to do this assumption - we use touchscreen monitors and we have to associate event devices with the monitors, and this is not easy to do dynamically, so we just have a static setup. Anyway, while the user-space setup will have to be fixed regardless, let's chane the HDMI port registration order so that HDMIB stays HDMI-1, just like it was in 3.11. Simply because there is no strong reason for changing the order in the kernel, and it'll help setups like ours in sense that we'll have more time for fixing the issue properly. Also amend the commentary which looks a bit out-of-date. Signed-off-by:
Artem Bityutskiy <artem.bityutskiy@linux.intel.com> [danvet: Drop the commment, SDVOC is gone and we have a proper HDMIC define now.] Signed-off-by:
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Damien Lespiau authored
Yet other direct usages of the pipe number instead of pipe_name(). We've been tracking them lately but managed to miss these last ones. v2: Catch them all! (Ville) Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> (v1) Signed-off-by:
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Chris Wilson authored
We have two once very similar functions, i915_gpu_idle() and i915_gem_idle(). The former is used as the lower level operation to flush work on the GPU, whereas the latter is the high level interface to flush the GEM bookkeeping in addition to flushing the GPU. As such i915_gem_idle() also clears out the request and activity lists and cancels the delayed work. This is what we need for unloading the driver, unfortunately we called i915_gpu_idle() instead. In the process, make sure that when cancelling the delayed work and timer, which is synchronous, that we do not hold any locks to prevent a deadlock if the work item is already waiting upon the mutex. This requires us to push the mutex down from the caller to i915_gem_idle(). v2: s/i915_gem_idle/i915_gem_suspend/ Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70334Signed-off-by:
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