An error occurred fetching the project authors.
  1. 23 Apr, 2019 2 commits
  2. 19 Apr, 2019 2 commits
    • Linus Walleij's avatar
      ARM: ixp4xx: Convert to SPARSE_IRQ · dc8ef8cd
      Linus Walleij authored
      This localizes the <mach/irqs.h> header to the mach-ixp4xx
      directory, removes NR_IRQS and switches IXP4xx over to using
      SPARSE_IRQ.
      
      This is a prerequisite for DT support.
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      dc8ef8cd
    • Linus Walleij's avatar
      ARM: ixp4xx: Convert to MULTI_IRQ_HANDLER · 98ac0cc2
      Linus Walleij authored
      This rewrites the IXP4xx to use MULTI_IRQ_HANDLER and
      create an irqdomain for the irqchip in the platform. We
      convert the timer to request the interrupt like any other
      driver in the process.
      
      We bump all IRQs to 16+offset to avoid using IRQ 0 and
      set NR_IRQS to 512 (the default for most systems).
      This conveniently fits with the first 16 IRQs being
      pre-allocated when using SPARSE_IRQ.
      
      This is a prerequisite for SPARSE_IRQ and DT boot.
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      98ac0cc2
  3. 17 Apr, 2019 1 commit
  4. 25 Mar, 2019 1 commit
  5. 01 Mar, 2019 1 commit
  6. 20 Feb, 2019 1 commit
  7. 19 Feb, 2019 3 commits
  8. 13 Feb, 2019 3 commits
  9. 01 Feb, 2019 3 commits
  10. 31 Dec, 2018 1 commit
  11. 21 Dec, 2018 1 commit
  12. 13 Dec, 2018 1 commit
  13. 12 Dec, 2018 1 commit
    • Ard Biesheuvel's avatar
      ARM: smp: add support for per-task stack canaries · 189af465
      Ard Biesheuvel authored
      On ARM, we currently only change the value of the stack canary when
      switching tasks if the kernel was built for UP. On SMP kernels, this
      is impossible since the stack canary value is obtained via a global
      symbol reference, which means
      a) all running tasks on all CPUs must use the same value
      b) we can only modify the value when no kernel stack frames are live
         on any CPU, which is effectively never.
      
      So instead, use a GCC plugin to add a RTL pass that replaces each
      reference to the address of the __stack_chk_guard symbol with an
      expression that produces the address of the 'stack_canary' field
      that is added to struct thread_info. This way, each task will use
      its own randomized value.
      
      Cc: Russell King <linux@armlinux.org.uk>
      Cc: Kees Cook <keescook@chromium.org>
      Cc: Emese Revfy <re.emese@gmail.com>
      Cc: Arnd Bergmann <arnd@arndb.de>
      Cc: Laura Abbott <labbott@redhat.com>
      Cc: kernel-hardening@lists.openwall.com
      Acked-by: default avatarNicolas Pitre <nico@linaro.org>
      Signed-off-by: default avatarArd Biesheuvel <ard.biesheuvel@linaro.org>
      Signed-off-by: default avatarKees Cook <keescook@chromium.org>
      189af465
  14. 06 Dec, 2018 1 commit
  15. 01 Dec, 2018 1 commit
  16. 23 Nov, 2018 5 commits
  17. 08 Nov, 2018 2 commits
  18. 31 Oct, 2018 2 commits
  19. 28 Sep, 2018 1 commit
  20. 03 Aug, 2018 1 commit
    • Palmer Dabbelt's avatar
      ARM: Convert to GENERIC_IRQ_MULTI_HANDLER · 4c301f9b
      Palmer Dabbelt authored
      Converts the ARM interrupt code to use the recently added
      GENERIC_IRQ_MULTI_HANDLER, which is essentially just a copy of ARM's
      existhing MULTI_IRQ_HANDLER.  The only changes are:
      
      * handle_arch_irq is now defined in a generic C file instead of an
        arm-specific assembly file.
       
      * handle_arch_irq is now marked as __ro_after_init.
      Signed-off-by: default avatarPalmer Dabbelt <palmer@sifive.com>
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Cc: linux@armlinux.org.uk
      Cc: catalin.marinas@arm.com
      Cc: Will Deacon <will.deacon@arm.com>
      Cc: jonas@southpole.se
      Cc: stefan.kristiansson@saunalahti.fi
      Cc: shorne@gmail.com
      Cc: jason@lakedaemon.net
      Cc: marc.zyngier@arm.com
      Cc: Arnd Bergmann <arnd@arndb.de>
      Cc: nicolas.pitre@linaro.org
      Cc: vladimir.murzin@arm.com
      Cc: keescook@chromium.org
      Cc: jinb.park7@gmail.com
      Cc: yamada.masahiro@socionext.com
      Cc: alexandre.belloni@bootlin.com
      Cc: pombredanne@nexb.com
      Cc: Greg KH <gregkh@linuxfoundation.org>
      Cc: kstewart@linuxfoundation.org
      Cc: jhogan@kernel.org
      Cc: mark.rutland@arm.com
      Cc: ard.biesheuvel@linaro.org
      Cc: james.morse@arm.com
      Cc: linux-arm-kernel@lists.infradead.org
      Cc: openrisc@lists.librecores.org
      Link: https://lkml.kernel.org/r/20180622170126.6308-3-palmer@sifive.com
      4c301f9b
  21. 01 Aug, 2018 3 commits
  22. 11 Jul, 2018 1 commit
  23. 26 Jun, 2018 2 commits