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- 05 Apr, 2019 1 commit
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S.j. Wang authored
In ESAI synchronous mode, the clock is generated by Tx, So we should always set registers of Tx which relate with the bit clock and frame clock generation (TCCR, TCR, ECR), even there is only Rx is working. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Acked-by: Nicolin Chen <nicoleotsuka@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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- 21 Mar, 2019 1 commit
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S.j. Wang authored
There is very low possibility ( < 0.1% ) that channel swap happened in beginning when multi output/input pin is enabled. The issue is that hardware can't send data to correct pin in the beginning with the normal enable flow. This is hardware issue, but there is no errata, the workaround flow is that: Each time playback/recording, firstly clear the xSMA/xSMB, then enable TE/RE, then enable xSMB and xSMA (xSMB must be enabled before xSMA). Which is to use the xSMA as the trigger start register, previously the xCR_TE or xCR_RE is the bit for starting. Fixes commit 43d24e76 ("ASoC: fsl_esai: Add ESAI CPU DAI driver") Cc: <stable@vger.kernel.org> Reviewed-by: Fabio Estevam <festevam@gmail.com> Acked-by: Nicolin Chen <nicoleotsuka@gmail.com> Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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- 19 Feb, 2019 1 commit
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S.j. Wang authored
The ESAI_xCR_xWA is xCR's bit, not the xCCR's bit, driver set it to wrong register, correct it. Fixes 43d24e76 ("ASoC: fsl_esai: Add ESAI CPU DAI driver") Cc: <stable@vger.kernel.org> Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Ackedy-by: Nicolin Chen <nicoleotsuka@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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- 28 Aug, 2018 1 commit
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Rob Herring authored
In preparation to remove the node name pointer from struct device_node, convert printf users to use the %pOFn format specifier. Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
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- 03 Aug, 2018 1 commit
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Gustavo A. R. Silva authored
In preparation to enabling -Wimplicit-fallthrough, mark switch cases where we are expecting to fall through. Addresses-Coverity-ID: 1222121 ("Missing break in switch") Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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- 03 May, 2018 1 commit
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Fabio Estevam authored
Adopt the SPDX license identifier headers to ease license compliance management. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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- 16 Apr, 2018 1 commit
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Nicolin Chen authored
The freq parameter indicates the physical frequency of an actual input clock or a desired frequency of an output clock for HCKT/R. It should never be passed 0. This might cause Division-by-zero. So this patch adds a check to fix it. Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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- 12 Apr, 2018 1 commit
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Nicolin Chen authored
When the desired ratio is less than 256, the savesub (tolerance) in the calculation would become 0. This will then fail the loop- search immediately without reporting any errors. But if the ratio is smaller enough, there is no need to calculate the tolerance because PM divisor alone is enough to get the ratio. So a simple fix could be just to set PM directly instead of going into the loop-search. Reported-by: Marek Vasut <marex@denx.de> Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com> Tested-by: Marek Vasut <marex@denx.de> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
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- 12 Feb, 2018 1 commit
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Fabio Estevam authored
The 'iprop' variable is passed as an argument to the be32_to_cpup() function, which expects a 'const _be *' type. Change the iprop variable type so that the following build warnings with W=1 are gone: sound/soc/fsl/fsl_esai.c:860:54: warning: incorrect type in argument 1 (different base types) sound/soc/fsl/fsl_esai.c:860:54: expected restricted __be32 const [usertype] *p sound/soc/fsl/fsl_esai.c:860:54: got unsigned int const [usertype] *[assigned] iprop Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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- 17 Jul, 2017 1 commit
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Gustavo A. R. Silva authored
This structure is only stored in the ops field of a snd_soc_dai_driver structure. That field is declared const, so snd_soc_dai_ops structures that have this property can be declared as const also. Signed-off-by: Gustavo A. R. Silva <garsilva@embeddedor.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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- 12 Apr, 2017 1 commit
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Fabio Estevam authored
There is no need for defining FSL_ESAI_RATES locally as the standard SNDRV_PCM_RATE_8000_192000 definition can be used instead. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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- 20 Sep, 2016 1 commit
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Marek Vasut authored
Same as commit ce492b3b Subject: drm/fsl-dcu: use flat regmap cache Using flat regmap cache instead of RB-tree to avoid the following lockdep warning on driver load: WARNING: CPU: 0 PID: 1 at kernel/locking/lockdep.c:2871 lockdep_trace_alloc+0x104/0x128 DEBUG_LOCKS_WARN_ON(irqs_disabled_flags(flags)) The RB-tree regmap cache needs to allocate new space on first writes. However, allocations in an atomic context (e.g. when a spinlock is held) are not allowed. The function regmap_write calls map->lock, which acquires a spinlock in the fast_io case. Since the driver uses MMIO, the regmap bus of type regmap_mmio is being used which has fast_io set to true. Signed-off-by: Marek Vasut <marex@denx.de> Acked-by: Nicolin Chen <nicoleotsuka@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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- 03 Sep, 2016 1 commit
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Colin Ian King authored
Trivial fix to spelling mistakes in dev_dbg messages Signed-off-by: Colin Ian King <colin.king@canonical.com> Acked-by: Nicolin Chen <nicoleotsuka@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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- 25 Nov, 2015 2 commits
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Shengjiu Wang authored
ESAI need to enable the spba clock, when sdma is using share peripheral script. In this case, there is two spba master port is used, if don't enable the clock, the spba bus will have arbitration issue, which may cause read/write wrong data from/to ESAI registers. Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com> Acked-by: Nicolin Chen <nicoleotsuka@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Zidan Wang authored
using params_width function to simplify code. Signed-off-by: Zidan Wang <zidan.wang@freescale.com> Acked-by: Nicolin Chen <nicoleotsuka@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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- 16 Nov, 2015 1 commit
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Zidan Wang authored
ETDR and TX0~5 registers are writable and not readable. So they are non volatile. Remove them from volatile list, and add default register value for them. Signed-off-by: Zidan Wang <zidan.wang@freescale.com> Acked-by: Nicolin Chen <nicoleotsuka@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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- 26 Oct, 2015 1 commit
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Nicolin Chen authored
Change them to #ifdef as CONFIG_PM_SLEEP might not be defined at all. Reported-by: kbuild test robot <fengguang.wu@intel.com> Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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- 05 Oct, 2015 1 commit
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Zidan Wang authored
For i.MX6 SoloX, there is a mode of the SoC to shutdown all power source of modules during system suspend and resume procedure. Thus, ESAI needs to save all the values of registers before the system suspend and restore them after the system resume. Signed-off-by: Zidan Wang <zidan.wang@freescale.com> Acked-by: Nicolin Chen <nicoleotsuka@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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- 07 Aug, 2015 1 commit
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Geert Uytterhoeven authored
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Nicolin Chen <nicoleotsuka@gmail.com> Signed-off-by: Jiri Kosina <jkosina@suse.com>
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- 07 Jul, 2015 1 commit
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Shengjiu Wang authored
As the ssi is not the only cpu dai, there are esai, spdif, sai. and imx_pcm_dma can be used by all of them. Especially ESAI need a larger DMA buffer size. So Add dedicated DMA buffer for each cpu dai. Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com> Acked-by: Nicolin Chen <nicoleotsuka@gmail.com> Acked-by: Timur Tabi <timur@tabi.org> Signed-off-by: Mark Brown <broonie@kernel.org>
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- 08 Jan, 2015 1 commit
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Fabio Estevam authored
Currently the error message uses 'np->full_name' which leads to a very verbose log that contains the full path of the node. We can have a concise log by using pdev->name instead. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Nicolin Chen <nicoleotsuka@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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- 25 Nov, 2014 1 commit
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Nicolin Chen authored
The driver previously used 32-bit fixed slot width as default. In result, ESAI might use 32-bit length to capture 16-bit width audio slot from CODEC side when ESAI is running as DAI slave. So this patch just removes the default slot_width so as to use dynamic slot width. If there comes a specific situation that needs a fixed width, the machine driver shall set slot_width via set_tdm_slot() so as to let the ESAI driver replace the dynamic width policy with the fixed value. Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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- 22 Oct, 2014 1 commit
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Daniel Mack authored
Use strncpy() instead of strcpy(). That's not a security issue, as the source buffer is taken from DT nodes, but we should still enforce bound checks. Spotted by Coverity. Signed-off-by: Daniel Mack <daniel@zonque.org> Signed-off-by: Mark Brown <broonie@kernel.org>
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- 20 Oct, 2014 1 commit
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Wolfram Sang authored
A platform_driver does not need to set an owner, it will be populated by the driver core. Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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- 27 Aug, 2014 1 commit
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Xiubo Li authored
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org>
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- 16 Aug, 2014 1 commit
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Shengjiu Wang authored
Original driver didn't store the number of slots, just fix the slot number to 2, use this default number to calculate bclk and pins for TX/RX. In this patch, add one parameter for slots, and update the calculation of bclk and pins of TX/RX. Then driver will be compatible with slots > 2 in TDM mode. Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com> Acked-by: Nicolin Chen <nicoleotsuka@gmail.com> Signed-off-by: Mark Brown <broonie@linaro.org>
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- 13 Aug, 2014 2 commits
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Shengjiu Wang authored
Original driver didn't store the number of slots, just fix the slot number to 2, use this default number to calculate bclk and pins for TX/RX. In this patch, add one parameter for slots, and update the calculation of bclk and pins of TX/RX. Then driver will be compatible with slots > 2 in TDM mode. Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com> Acked-by: Nicolin Chen <nicoleotsuka@gmail.com> Signed-off-by: Mark Brown <broonie@linaro.org>
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Shengjiu Wang authored
This reverts commit a603c8ee. fsl_asoc_xlate_tdm_slot_mask() is different with snd_soc_xlate_tdm_slot_mask(). fsl_asoc_xlate_tdm_slot_mask() will set the enabled bit to 0, disabled bit to 1. snd_soc_xlate_tdm_slot_mask() will set the enabled bit to 1, disabled bit to 0. For esai when the bit value is 1, the slot is enabled, when the bit value is 0, the slot is disabled. If using fsl_asoc_xlate_tdm_slot_mask(), the esai will work abnormally. So revert this patch, make the esai use default function. Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com> Acked-by: Nicolin Chen <nicoleotsuka@gmail.com> Signed-off-by: Mark Brown <broonie@linaro.org>
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- 31 Jul, 2014 1 commit
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Nicolin Chen authored
DPCM needs extra dapm routes in the machine driver to route audio between Front-End and Back-End. In order to differ the stream names in the route map from CODECs, we here add specific stream names to ESAI driver so that we can implement ASRC via DPCM to it. Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com> Signed-off-by: Mark Brown <broonie@linaro.org>
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- 12 May, 2014 4 commits
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Nicolin Chen authored
We don't need to change those dividers if bclk and mclk remains the same directions and values. Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org>
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Nicolin Chen authored
According to Reference Manual -- ESAI Initialization chapter, as the standard procedure of ESAI personal reset, the PCRC and PRRC registers should be remained in its reset value and then configured after T/RCCR and T/RCR configurations's done but before TE/RE's enabling. So this patch moves PCRC and PRRC settings to the end of hw_params(). Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org>
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Nicolin Chen authored
ESAI can only output EXTAL clock source directly. But for FSYS clock source, ESAI can not output it without getting through PSR PM dividers. So this patch adds an extra check in the code. Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org>
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Nicolin Chen authored
The range here from 1 to 16 is confined to FP divider only while the sck_div indicates if the calculation contains PSR and PM dividers. So for the case using PSR and PM since the sck_div is true, the range of ratio would simply become bigger than 16. So this patch fixes the condition here and adds one line comments to make the purpose here clear. Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org>
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- 14 Apr, 2014 2 commits
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Xiubo Li authored
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Acked-by: Nicolin Chen <Guangyu.Chen@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org>
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Xiubo Li authored
Use the precise definition of 'ret', which will be used for the error check. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Acked-by: Nicolin Chen <Guangyu.Chen@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org>
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- 25 Mar, 2014 1 commit
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Xiubo Li authored
This patch add .xlate_tdm_slot_mask support for ESAI, and this will generate the TDM slot TX and RX masks. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org>
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- 12 Feb, 2014 1 commit
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Xiubo Li authored
For most platforms, the CPU and ESAI device is in the same endianess mode. While for the LS1 platform, the CPU is in LE mode and the ESAI is in BE mode. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Acked-by: Nicolin Chen <Guangyu.Chen@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org>
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- 11 Feb, 2014 1 commit
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Fabio Estevam authored
clk_prepare_enable() may fail, so let's check its return value and propagate it in the case of error. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org>
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- 10 Feb, 2014 1 commit
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Xiubo Li authored
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Acked-by: Nicolin Chen <Guangyu.Chen@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org>
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- 10 Jan, 2014 1 commit
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Nicolin Chen authored
This patch implements a device-tree-only CPU DAI driver for Freescale ESAI controller that supports: - 12 channels playback and 8 channels record. [ Some of the inner transmitters and receivers are sharing same group of pins. So the maxmium 12 output or 8 input channels are only valid if there is no pin conflict occurring to it. ] - Independent (asynchronous mode) or shared (synchronous mode) transmit and receive sections with separate or shared internal/external clocks and frame syncs, operating in Master or Slave mode. [ Current ALSA seems not to allow CPU DAI drivers to configure DAI format separately for PLAYBACK and CAPTURE. So this first version only supports the case that uses the same DAI format for both directions. ] - Various DAI formats: I2S, Left-Justified, Right-Justified, DSP-A and DSP-B. - Programmable word length (8, 16, 20 or 24bits) - Flexible selection between system clock or external oscillator as input clock source, programmable internal clock divider and frame sync generation. Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org>
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