- 18 Apr, 2014 30 commits
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Peter Zijlstra authored
Update the documentation to reflect the change of barrier primitives. Signed-off-by:
Peter Zijlstra <peterz@infradead.org> Reviewed-by:
Paul E. McKenney <paulmck@linux.vnet.ibm.com> Acked-by:
David Howells <dhowells@redhat.com> Link: http://lkml.kernel.org/n/tip-xslfehiga1twbk5uk94rij1e@git.kernel.org Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Randy Dunlap <rdunlap@infradead.org> Cc: linux-doc@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by:
Ingo Molnar <mingo@kernel.org>
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Peter Zijlstra authored
Xtensa SMP has compare-and-swap which is fully serializing, therefore its exising smp_mb__{before,after}_clear_bit() appear unduly heavy. Implement the new barriers as barrier(). Signed-off-by: -
Peter Zijlstra authored
x86 is strongly ordered and all its atomic ops imply a full barrier. Implement the two new primitives as the old ones were. Signed-off-by:
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Peter Zijlstra authored
Implement the new smp_mb__* ops as per the old ones. Signed-off-by:
Chris Metcalf <cmetcalf@tilera.com> Link: http://lkml.kernel.org/n/tip-euuabnf5a3u23fy4fq8m3jcg@git.kernel.org Cc: Akinobu Mita <akinobu.mita@gmail.com> Cc: Chen Gang <gang.chen@asianux.com> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca> Cc: linux-kernel@vger.kernel.org Signed-off-by:
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Peter Zijlstra authored
sparc32: fully relies on asm-generic/barrier.h and thus can use its implementation. sparc64: is strongly ordered and its atomic ops imply a full barrier, implement the new primitives using barrier(). Signed-off-by:
David S. Miller <davem@davemloft.net> Link: http://lkml.kernel.org/n/tip-2cla9ubpd8chrntnm7e4zdt4@git.kernel.org Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Will Deacon <will.deacon@arm.com> Cc: linux-kernel@vger.kernel.org Cc: sparclinux@vger.kernel.org Signed-off-by:
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Peter Zijlstra authored
SH can use the asm-generic/barrier.h implementation since that uses smp_mb(). Signed-off-by:
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Peter Zijlstra authored
score fully relies on asm-generic/barrier.h, so it can use its default implementation. Signed-off-by:
Lennox Wu <lennox.wu@gmail.com> Link: http://lkml.kernel.org/n/tip-4mv9svf28lnotjpfuza8urh8@git.kernel.org Cc: Chen Liqin <liqin.linux@gmail.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: linux-kernel@vger.kernel.org Signed-off-by:
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Peter Zijlstra authored
As per the existing implementation; implement the new one using smp_mb(). AFAICT the s390 compare-and-swap does imply a barrier, however there are some immediate ops that seem to be singly-copy atomic and do not imply a barrier. One such is the "ni" op (which would be and-immediate) which is used for the constant clear_bit implementation. Therefore s390 needs full barriers for the {before,after} atomic ops. Signed-off-by: -
Peter Zijlstra authored
Powerpc allows reordering over its ll/sc implementation. Implement the two new barriers as appropriate. Signed-off-by:
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Peter Zijlstra authored
parisc fully relies on asm-generic/barrier.h, therefore its smp_mb() is barrier and the default implementation suffices. Signed-off-by:
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Peter Zijlstra authored
Openrisc fully relies on asm-generic/barrier.h and therefore its smp_mb() is barrier(). Signed-off-by:
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Peter Zijlstra authored
mn10300 fully relies on asm-generic/barrier.h and therefore its smp_mb() is barrier(). We can use the default implementation. Signed-off-by:
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Peter Zijlstra authored
MIPS is interesting and has hardware variants that reorder over ll/sc as well as those that do not. Implement the 2 new barrier functions as per the old barriers. Signed-off-by:
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Peter Zijlstra authored
Implement the new barriers; as per the old versions the metag atomic imply a full barrier. Signed-off-by:
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Peter Zijlstra authored
m68k uses asm-generic/barrier.h and its smp_mb() is barrier(), therefore we can use the generic versions that use smp_mb(). Signed-off-by:
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Peter Zijlstra authored
M32r uses asm-generic/barrier.h and its smp_mb() is barrier(); therefore we can use the generic versions which default to smp_mb(). Signed-off-by:
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Peter Zijlstra authored
ia64 atomic ops are full barriers; implement the new smp_mb__{before,after}_atomic(). Signed-off-by: -
Peter Zijlstra authored
Hexagon uses asm-gemeric/barrier.h and its smp_mb() is barrier(). Therefore we can use the default implementation that uses smp_mb(). Signed-off-by:
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Peter Zijlstra authored
Because: arch/frv/include/asm/smp.h:#error SMP not supported smp_mb() is barrier() and we can use the default implementation that uses smp_mb(). Signed-off-by:
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Peter Zijlstra authored
Cris fully relies on asm-generic/barrier.h, therefore its smp_mb() is barrier(), thus we can use the default implementation that uses smp_mb(). (Include asm/system.h and asm/barrier.h to avoid header dependency hell.) Signed-off-by:
Jesper Nilsson <jesper.nilsson@axis.com> Acked-by:
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Peter Zijlstra authored
c6x doesn't have a barrier.h and completely relies on asm-generic/barrier.h. Therefore its smp_mb() is barrier() and we can use the default versions that are smp_mb(). Signed-off-by:
Mark Salter <msalter@redhat.com> Acked-by:
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Peter Zijlstra authored
Blackfin's atomic primitives do not imply a full barrier as whitnessed from its SMP smp_mb__{before,after}_clear_bit() implementations. However since !SMP smp_mb() reduces to barrier() remove everything and rely on the asm-generic/barrier.h implentation. Signed-off-by: -
Peter Zijlstra authored
AVR32's mb() implementation is a compiler barrier(), therefore it all doesn't matter, fully rely on whatever asm-generic/barrier.h generates. Signed-off-by:
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Peter Zijlstra authored
AARGH64 uses ll/sc primitives that do not imply any barriers for the normal atomics, therefore smp_mb__{before,after} should be a full barrier. Since AARGH64 doesn't use asm-generic/barrier.h, add the required definitions to its asm/barrier.h. Signed-off-by: -
Peter Zijlstra authored
ARM uses ll/sc primitives that do not imply barriers for all regular atomic ops, therefore smp_mb__{before,after} need be a full barrier. Since ARM doesn't use asm-generic/barrier.h include the required definitions in its asm/barrier.h Signed-off-by: -
Peter Zijlstra authored
The arc mb() implementation is a compiler barrier(), therefore it all doesn't matter one way or the other. Simply remove the existing definitions and use whatever is generated by the defaults. Signed-off-by:
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Peter Zijlstra authored
The Alpha ll/sc primitives do not imply any sort of barrier; therefore the smp_mb__{before,after} should be a full barrier. This is the default from asm-generic/barrier.h and therefore just remove the current definitions. Signed-off-by: -
Peter Zijlstra authored
Since the smp_mb__{before,after}*() ops are fundamentally dependent on how an arch can implement atomics it doesn't make sense to have 3 variants of them. They must all be the same. Furthermore, the 3 variants suggest they're only valid for those 3 atomic ops, while we have many more where they could be applied. So move away from smp_mb__{before,after}_{atomic,clear}_{dec,inc,bit}() and reduce the interface to just the two: smp_mb__{before,after}_atomic(). This patch prepares the way by introducing default implementations in asm-generic/barrier.h that default to a full barrier and providing __deprecated inlines for the previous 6 barriers if they're not provided by the arch. This should allow for a mostly painless transition (lots of deprecated warns in the interim). Signed-off-by: -
Peter Zijlstra authored
Both already use asm-generic/barrier.h as per their include/asm/Kbuild. Remove the stale files. Signed-off-by:
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Peter Zijlstra authored
IA64 doesn't actually have acquire/release barriers, its a lie! Add a comment explaining this and fix up the bitop barriers. Signed-off-by:
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- 17 Apr, 2014 10 commits
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git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linuxLinus Torvalds authored
Pull parisc updates from Helge Deller: "There are two major changes in this patchset: The major fix is that the epoll_pwait() syscall for 32bit userspace was not using the compat wrapper on a 64bit kernel. Secondly we changed the value of SHMLBA from 4MB to PAGE_SIZE to reflect that we can actually mmap to any multiple of PAGE_SIZE. The only thing which needs care is that shared mmaps need to be mapped at the same offset inside the 4MB cache window" * 'parisc-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux: parisc: fix epoll_pwait syscall on compat kernel parisc: change value of SHMLBA from 0x00400000 to PAGE_SIZE parisc: Replace __get_cpu_var uses for address calculation
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Linus Torvalds authored
Merge ipmi fixes from Corey Minyard: "Things collected since last kernel release. Some of these are pretty important. The first three are bug fixes. The next two are to hopefully make everyone happy about allowing ACPI to be on all the time and not have IPMI have an effect on the system when not in use. The last is a little cleanup" * emailed patches from Corey Minyard <cminyard@mvista.com>: ipmi: boolify some things ipmi: Turn off all activity on an idle ipmi interface ipmi: Turn off default probing of interfaces ipmi: Reset the KCS timeout when starting error recovery ipmi: Fix a race restarting the timer Char: ipmi_bt_sm, fix infinite loop
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Corey Minyard authored
Convert some ints to bools. Signed-off-by:
Corey Minyard <cminyard@mvista.com> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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Corey Minyard authored
The IPMI driver would wake up periodically looking for events and watchdog pretimeouts. If there is nothing waiting for these events, it's really kind of pointless to be checking for them. So modify the driver so the message handler can pass down if it needs the lower layer to be waiting for these. Modify the system interface lower layer to turn off all timer and thread activity if the upper layer doesn't need anything and it is not currently handling messages. And modify the message handler to not restart the timer if its timer is not needed. The timers and kthread will still be enabled if: - the SI interface is handling a message. - a user has enabled watching for events. - the IPMI watchdog timer is in use (since it uses pretimeouts). - the message handler is waiting on a remote response. - a user has registered to receive commands. This mostly affects interfaces without interrupts. Interfaces with interrupts already don't use CPU in the system interface when the interface is idle. Signed-off-by:
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Corey Minyard authored
The default probing can cause problems with some system, slow booting, extra CPU usages, etc. Turn it off by default and give a config option to enable it. From: Matthew Garrett <matthew.garrett@nebula.com> Signed-off-by:
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Corey Minyard authored
The OBF timer in KCS was not reset in one situation when error recovery was started, resulting in an immediate timeout. Reported-by:
Bodo Stroesser <bstroesser@ts.fujitsu.com> Signed-off-by:
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Bodo Stroesser authored
With recent changes it is possible for the timer handler to detect an idle interface and not start the timer, but the thread to start an operation at the same time. The thread will not start the timer in that instance, resulting in the timer not running. Instead, move all timer operations under the lock and start the timer in the thread if it detect non-idle and the timer is not already running. Moving under locks allows the last timeout to be set in both the thread and the timer. 'Timer is not running' means that the timer is not pending and smi_timeout() is not running. So we need a flag to detect this correctly. Also fix a few other timeout bugs: setting the last timeout when the interrupt has to be disabled and the timer started, and setting the last timeout in check_start_timer_thread possibly racing with the timer Signed-off-by:
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Jiri Slaby authored
In read_all_bytes, we do unsigned char i; ... bt->read_data[0] = BMC2HOST; bt->read_count = bt->read_data[0]; ... for (i = 1; i <= bt->read_count; i++) bt->read_data[i] = BMC2HOST; If bt->read_data[0] == bt->read_count == 255, we loop infinitely in the 'for' loop. Make 'i' an 'int' instead of 'char' to get rid of the overflow and finish the loop after 255 iterations every time. Signed-off-by:Jiri Slaby <jslaby@suse.cz> Reported-and-debugged-by:
Rui Hui Dian <rhdian@novell.com> Cc: Tomas Cech <tcech@suse.cz> Cc: Corey Minyard <minyard@acm.org> Cc: <openipmi-developer@lists.sourceforge.net> Signed-off-by:
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git://git.kernel.org/pub/scm/linux/kernel/git/xen/tipLinus Torvalds authored
Pull Xen fixes from David Vrabel: "Xen regression and bug fixes for 3.15-rc1: - fix completely broken 32-bit PV guests caused by x86 refactoring 32-bit thread_info. - only enable ticketlock slow path on Xen (not bare metal) - fix two bugs with PV guests not shutting down when requested - fix a minor memory leak in xen-pciback error path" * tag 'stable/for-linus-3.15-rc1-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip: xen/manage: Poweroff forcefully if user-space is not yet up. xen/xenbus: Avoid synchronous wait on XenBus stalling shutdown/restart. xen/spinlock: Don't enable them unconditionally. xen-pciback: silence an unwanted debug printk xen: fix memory leak in __xen_pcibk_add_pci_dev() x86/xen: Fix 32-bit PV guests's usage of kernel_stack -
git://neil.brown.name/mdLinus Torvalds authored
Pull md bugfix from Neil Brown: "One BUG fix for md for recent commit" * tag '3.15-fixes' of git://neil.brown.name/md: raid5: fix a race of stripe count check
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