- 27 Apr, 2008 40 commits
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Marcelo Tosatti authored
Hypercall based pte updates are faster than faults, and also allow use of the lazy MMU mode to batch operations. Don't report the feature if two dimensional paging is enabled. [avi: - guest/host split - fix 32-bit truncation issues - adjust to mmu_op - adjust to ->release_*() renamed - add ->release_pud()] Signed-off-by:
Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by:
Avi Kivity <avi@qumranet.com>
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Marcelo Tosatti authored
Hypercall based pte updates are faster than faults, and also allow use of the lazy MMU mode to batch operations. Don't report the feature if two dimensional paging is enabled. [avi: - one mmu_op hypercall instead of one per op - allow 64-bit gpa on hypercall - don't pass host errors (-ENOMEM) to guest] [akpm: warning fix on i386] Signed-off-by:
Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
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Avi Kivity authored
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Marcelo Tosatti authored
Add basic KVM paravirt support. Avoid vm-exits on IO delays. Signed-off-by:
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Marcelo Tosatti authored
Add basic KVM paravirt support. Avoid vm-exits on IO delays. Signed-off-by:
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Sheng Yang authored
Separate the reset part and prepare for reset support. Signed-off-by:
Sheng Yang <sheng.yang@intel.com> Signed-off-by:
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Sheng Yang authored
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Sheng Yang authored
The patch moves the PIT model from userspace to kernel, and increases the timer accuracy greatly. [marcelo: make last_injected_time per-guest] Signed-off-by:
Alex Davis <alex14641@yahoo.com> Signed-off-by:
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Avi Kivity authored
The desc_struct changes left an unnecessary #ifdef; remove it. Signed-off-by: -
Avi Kivity authored
Most Intel hosts have a stable tsc, and playing with the offset only reduces accuracy. By limiting tsc offset adjustment only to forward updates, we effectively disable tsc offset adjustment on these hosts. Signed-off-by: -
Harvey Harrison authored
__FUNCTION__ is gcc-specific, use __func__ Signed-off-by:
Harvey Harrison <harvey.harrison@gmail.com> Signed-off-by:
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Joerg Roedel authored
In the current inject_page_fault path KVM only checks if there is another PF pending and injects a DF then. But it has to check for a pending DF too to detect a shutdown condition in the VCPU. If this is not detected the VCPU goes to a PF -> DF -> PF loop when it should triple fault. This patch detects this condition and handles it with an KVM_SHUTDOWN exit to userspace. Signed-off-by:
Joerg Roedel <joerg.roedel@amd.com> Signed-off-by:
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Xiantao Zhang authored
Since the size of kvm_regs is too big to allocate from kernel stack on ia64, use kzalloc to allocate it. Signed-off-by:
Xiantao Zhang <xiantao.zhang@intel.com> Signed-off-by:
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Avi Kivity authored
Names like 'set_cr3()' look dangerously close to affecting the host. Signed-off-by: -
Marcelo Tosatti authored
Create large pages mappings if the guest PTE's are marked as such and the underlying memory is hugetlbfs backed. If the largepage contains write-protected pages, a large pte is not used. Gives a consistent 2% improvement for data copies on ram mounted filesystem, without NPT/EPT. Anthony measures a 4% improvement on 4-way kernbench, with NPT. Signed-off-by:
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Marcelo Tosatti authored
Mark zapped root pagetables as invalid and ignore such pages during lookup. This is a problem with the cr3-target feature, where a zapped root table fools the faulting code into creating a read-only mapping. The result is a lockup if the instruction can't be emulated. Signed-off-by:
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Alexander Graf authored
Darwin relies on this and ceases to work without. Signed-off-by:
Alexander Graf <alex@csgraf.de> Signed-off-by:
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Harvey Harrison authored
In two case statements, use the ever popular 'i' instead of index: arch/x86/kvm/x86.c:1063:7: warning: symbol 'index' shadows an earlier one arch/x86/kvm/x86.c:1000:9: originally declared here arch/x86/kvm/x86.c:1079:7: warning: symbol 'index' shadows an earlier one arch/x86/kvm/x86.c:1000:9: originally declared here Make it static. arch/x86/kvm/x86.c:1945:24: warning: symbol 'emulate_ops' was not declared. Should it be static? Drop the return statements. arch/x86/kvm/x86.c:2878:2: warning: returning void-valued expression arch/x86/kvm/x86.c:2944:2: warning: returning void-valued expression Signed-off-by:
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Harvey Harrison authored
Fixes sparse warning as well. arch/x86/kvm/svm.c:69:15: warning: symbol 'iopm_base' was not declared. Should it be static? Signed-off-by:
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Harvey Harrison authored
Nesting __emulate_2op_nobyte inside__emulate_2op produces many shadowed variable warnings on the internal variable _tmp used by both macros. Change the outer macro to use __tmp. Avoids a sparse warning like the following at every call site of __emulate_2op arch/x86/kvm/x86_emulate.c:1091:3: warning: symbol '_tmp' shadows an earlier one arch/x86/kvm/x86_emulate.c:1091:3: originally declared here [18 more warnings suppressed] Signed-off-by:
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Amit Shah authored
Signed-off-by:
Amit Shah <amit.shah@qumranet.com> Signed-off-by:
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Avi Kivity authored
The x86 desc_struct unification allows us to remove segment_descriptor.h. Signed-off-by: -
Avi Kivity authored
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Avi Kivity authored
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Avi Kivity authored
With NPT support, scalability is much improved. Signed-off-by: -
Avi Kivity authored
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Harvey Harrison authored
Change jmp_rel() to a function as well. Signed-off-by:
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Harvey Harrison authored
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Harvey Harrison authored
Replaces open-coded mask calculation in macros. Signed-off-by:
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Glauber de Oliveira Costa authored
This is the guest part of kvm clock implementation It does not do tsc-only timing, as tsc can have deltas between cpus, and it did not seem worthy to me to keep adjusting them. We do use it, however, for fine-grained adjustment. Other than that, time comes from the host. [randy dunlap: add missing include] [randy dunlap: disallow on Voyager or Visual WS] Signed-off-by:
Glauber de Oliveira Costa <gcosta@redhat.com> Signed-off-by:
Randy Dunlap <randy.dunlap@oracle.com> Signed-off-by:
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Glauber de Oliveira Costa authored
This is the host part of kvm clocksource implementation. As it does not include clockevents, it is a fairly simple implementation. We only have to register a per-vcpu area, and start writing to it periodically. The area is binary compatible with xen, as we use the same shadow_info structure. [marcelo: fix bad_page on MSR_KVM_SYSTEM_TIME] [avi: save full value of the msr, even if enable bit is clear] [avi: clear previous value of time_page] Signed-off-by:
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Joerg Roedel authored
This patch implements the Last Branch Record Virtualization (LBRV) feature of the AMD Barcelona and Phenom processors into the kvm-amd module. It will only be enabled if the guest enables last branch recording in the DEBUG_CTL MSR. So there is no increased world switch overhead when the guest doesn't use these MSRs. Signed-off-by:
Markus Rechberger <markus.rechberger@amd.com> Signed-off-by:
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Joerg Roedel authored
This patch changes the kvm-amd module to allocate the SVM MSR permission map per VCPU instead of a global map for all VCPUs. With this we have more flexibility allowing specific guests to access virtualized MSRs. This is required for LBR virtualization. Signed-off-by:
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Joerg Roedel authored
Change the parameter of the init_vmcb() function in the kvm-amd module from struct vmcb to struct vcpu_svm. Signed-off-by:
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Ryan Harper authored
Looking at Intel Volume 3b, page 148, table 20-11 and noticed that the field name is 'Deliver' not 'Deliever'. Attached patch changes the define name and its user in vmx.c Signed-off-by:
Ryan Harper <ryanh@us.ibm.com> Signed-off-by:
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Joerg Roedel authored
This patch contains the SVM architecture dependent changes for KVM to enable support for the Nested Paging feature of AMD Barcelona and Phenom processors. Signed-off-by:
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Joerg Roedel authored
This patch contains the changes to the KVM MMU necessary for support of the Nested Paging feature in AMD Barcelona and Phenom Processors. Signed-off-by:
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Joerg Roedel authored
The load_pdptrs() function is required in the SVM module for NPT support. Signed-off-by:
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Joerg Roedel authored
The mapping function for the nonpaging case in the softmmu does basically the same as required for Nested Paging. Make this function generic so it can be used for both. Signed-off-by:
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Joerg Roedel authored
The generic x86 code has to know if the specific implementation uses Nested Paging. In the generic code Nested Paging is called Two Dimensional Paging (TDP) to avoid confusion with (future) TDP implementations of other vendors. This patch exports the availability of TDP to the generic x86 code. Signed-off-by:
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