- 05 Nov, 2016 7 commits
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Mark Rustad authored
The msix_entries memory can be freed by a previous suspend or remove, so don't crash on close when it isn't there. Signed-off-by:
Mark Rustad <mark.d.rustad@intel.com> Tested-by:
Krishneil Singh <krishneil.k.singh@intel.com> Signed-off-by:
Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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Don Skidmore authored
This patch adds X553 flow control auto negotiation for fiber and backplain. To enable this new function pointers were added as well as creating a function to dynamically set function pointer we can't define only on MAC type. Signed-off-by:
Don Skidmore <donald.c.skidmore@intel.com> Tested-by:
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Emil Tantilov authored
Read the PHY register twice in order to get the correct value for autoneg_status. Signed-off-by:
Emil Tantilov <emil.s.tantilov@intel.com> Tested-by:
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Emil Tantilov authored
Replace some ixgbe specific MDIO defines with their equivalent from the kernel. Signed-off-by:
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Don Skidmore authored
This patch updates ixgbe_setup_phy_link_generic to set/unset auto-negotiation for all speeds. This ensures that unsupported speeds are unset. This is necessary since the PHY NVM may advertise unsupported speeds. Signed-off-by:
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Don Skidmore authored
This patch adds support to get the LED link active via the LEDCTL register. If the LEDCTL register does not have LED link active (LED mode field = 0x0100) set then default LED link active returned. Signed-off-by:
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Don Skidmore authored
X553 doesn't need all the initialization that X552 did for iXFI. This patch will allow native SPI SFP+ to work with X553 devices. Future patches will add additional configuration as needed. Signed-off-by:
Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by:
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- 04 Nov, 2016 33 commits
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David S. Miller authored
Jakub Kicinski says: ==================== ring reconfiguration and XDP support This set adds support for ethtool channel API and XDP. I kick off with ethtool get_channels() implementation. set_channels() needs some preparations to get right. I follow the prepare/commit paradigm and allocate all resources before stopping the device. It has already been done for ndo_change_mtu and ethtool set_ringparam(), it makes sense now to consolidate all the required logic in one place. XDP support requires splitting TX rings into two classes - for the stack and for XDP. The ring structures are identical. The differences are in how they are connected to IRQ vector structs and how the completion/cleanup works. When XDP is enabled I switch from the frag allocator to page-per-packet and map buffers BIDIRECTIONALly. Last but not least XDP offload is added (the patch just takes care of the small formal differences between cls_bpf and XDP). There is a tiny & trivial DebugFS patch in the mix, I hope it can be taken via net-next provided we have the right Acks. Resending with improved commit message and CCing more people on patch 10. ==================== Signed-off-by:David S. Miller <davem@davemloft.net>
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Jakub Kicinski authored
Most infrastructure can be reused, provide separate handling of context offsets and exit codes. Signed-off-by:
Jakub Kicinski <jakub.kicinski@netronome.com> Signed-off-by:
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Jakub Kicinski authored
nfp_net_bpf_offload() takes all .setup_tc() parameters but it doesn't use them at the moment. Remove unnecessary ones to make it possible for XDP to reuse this function. Signed-off-by:
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Jakub Kicinski authored
Add XDP support. Separate stack's and XDP's TX rings logically. Add functions for handling XDP_TX and cleanup of XDP's TX rings. For XDP allocate all RX buffers as separate pages and map them with DMA_BIDIRECTIONAL. Signed-off-by:
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Jakub Kicinski authored
seq_file users can only access const version of file pointer, because the ->file member of struct seq_operations is marked as such. Make parameter to debugfs_real_fops() const. CC: Greg Kroah-Hartman <gregkh@linuxfoundation.org> CC: Nicolai Stange <nicstange@gmail.com> CC: Christian Lamparter <chunkeey@gmail.com> CC: LKML <linux-kernel@vger.kernel.org> Signed-off-by:
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Jakub Kicinski authored
Calculate packet offsets early in nfp_net_rx() so that we will be able to use them in upcoming XDP handler. While at it move relevant variables into the loop scope. Signed-off-by:
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Jakub Kicinski authored
Allow changing the number of rings via ethtool .set_channels API. Runtime reconfig needs to be extended to handle number of rings. We need to be able to activate interrupt vectors before rings are assigned to them. Signed-off-by:
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Jakub Kicinski authored
We will need to rerun the initialization of the RSS indirection table after the number of rings is changed. Move the code to a separate function. Signed-off-by:
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Jakub Kicinski authored
Instead of fixing ring -> vector relations up in ring swap functions put the reassignment into a helper function which will reinit all links. Signed-off-by:
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Jakub Kicinski authored
Upcoming XDP support will break the assumption that one can iterate over IRQ vectors to get to all the rings easily. Use nn->.x_ring arrays directly. Signed-off-by:
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Jakub Kicinski authored
Ring allocation helpers encapsulate all ring allocation and initialization steps nicely. Reuse them on .ndo_open() path. Signed-off-by:
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Jakub Kicinski authored
"Shadow" in ring helpers used to mean that the helper will allocate rings without touching existing configuration, this was used for reconfiguration while the device was running. We will soon use the same helpers for .ndo_open() path, so replace "shadow" with "ring_set". No functional changes. Signed-off-by:
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Jakub Kicinski authored
All functions which need to reallocate ring resources at runtime look very similar. Centralize that logic into a separate function. Encapsulate configuration parameters in a structure. Signed-off-by:
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Jakub Kicinski authored
Report number of rings via ethtool .get_channels API. Signed-off-by:
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David S. Miller authored
Tom Lendacky says: ==================== amd-xgbe: AMD XGBE driver updates 2016-11-03 This patch series is targeted at preparing the driver for a new PCI version of the hardware. After this series is applied, a follow-on series will introduce the support for the PCI version of the hardware. The following updates and fixes are included in this driver update series: - Fix formatting of PCS debug register dump - Prepare for priority-based FIFO allocation - Implement priority-based FIFO allocation - Prepare for working with more than one type of PCS/PHY - Prepare for the introduction of clause 37 auto-negotiation - Add support for clause 37 auto-negotiation - Prepare for supporting a new PCS register access method - Add support for 64-bit management counter registers - Update DMA channel status determination - Prepare for supporting PCI devices in addition to platform devices This patch series is based on net-next. ==================== Signed-off-by: -
Lendacky, Thomas authored
Update the driver framework to separate out platform/ACPI specific code from general code during device initialization. This will allow for the introduction of PCI device support. Signed-off-by:
Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by:
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Lendacky, Thomas authored
Tx and Rx DMA channel status determiniation is different depending on the version of the hardware. Update the channel status processing code to account for the change. Also, reduce the timeout value used when stopping the channels. Signed-off-by:
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Lendacky, Thomas authored
Add support for reading all management counter registers as 64-bit values. The indication of whether to read the high 32-bits to form a 64-bit value is indicated in the version data. Signed-off-by:
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Lendacky, Thomas authored
Prepare the code to be able to support accessing of the PCS registers in a new way, while maintaining the current access method. Provide a version specific field that indicates the method to use. Signed-off-by:
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Lendacky, Thomas authored
Add support to be able to use clause 37 auto-negotiation. Signed-off-by:
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Lendacky, Thomas authored
Prepare for the future introduction of clause 37 auto-negotiation by updating the current auto-negotiation related functions to identify them as clause 73 functions. Move interrupt enablement to the enable/disable auto-negotiation functions. Update what will be common routines to check for the current type of AN and process accordingly. Signed-off-by:
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Lendacky, Thomas authored
Prepare the code to be able to work with more than one type of phy by adding additional callable functions into the phy interface and removing phy specific settings/functions from non-phy related files. Signed-off-by:
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Lendacky, Thomas authored
Allocate the FIFO across the hardware Rx queues based on the priority of the queues. Giving more FIFO resources to queues with a higher priority. If PFC is active but not enabled for a queue, then less resources can allocated to the queue. Signed-off-by:
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Lendacky, Thomas authored
Currently, the Rx and Tx fifos are evenly allocated between the hardware queues of the device. As more queues are instantiated, the fifo memory needs to be able to be allocated based on queue priority. This allows for higher priority queues to have more fifo memory than lower priority queues. Prepare for this by modifying the current fifo calculation to assign the fifo queue allocation in an array that is then used to program the hardware. Signed-off-by:
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Lendacky, Thomas authored
Fix the length value used for the PCS register dump so that the full value can be displayed. Signed-off-by:
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David S. Miller authored
Lorenzo Colitti says: ==================== net: inet: Support UID-based routing This patchset adds support for per-UID routing. It allows the administrator to configure rules such as: ip rule add uidrange 100-200 lookup 123 This functionality has been in use by all Android devices since 5.0. It is primarily used to impose per-app routing policies (on Android, every app has its own UID) without having to resort to rerouting packets in iptables, which breaks getsockname() and MTU/MSS calculation, and generally disrupts end-to-end connectivity. This patch series is similar to the code currently used on Android, but has better correctness and performance because it stores the UID in the socket instead of calling sock_i_uid. This avoids contention on sk->sk_callback_lock, and makes it possible to correctly route a socket on which userspace has called close(), for which sock_i_uid will return 0. Changes from v1: - Don't set the UID in sk_clone_lock, it's already set by sock_copy. - For packets originated by kernel sockets, don't use the socket UID. This is the UID that created the namespace, but it might not be mapped in the namespace at all. Instead, use UID 0 in the namespace, which is less surprising and consistent with what happens in the root namespace. - Fix UID routing of IPv4 and IPv6 SYN_RECV sockets. - Fix UID routing of received IPv6 redirects. ==================== Signed-off-by: -
Lorenzo Colitti authored
- Use the UID in routing lookups made by protocol connect() and sendmsg() functions. - Make sure that routing lookups triggered by incoming packets (e.g., Path MTU discovery) take the UID of the socket into account. - For packets not associated with a userspace socket, (e.g., ping replies) use UID 0 inside the user namespace corresponding to the network namespace the socket belongs to. This allows all namespaces to apply routing and iptables rules to kernel-originated traffic in that namespaces by matching UID 0. This is better than using the UID of the kernel socket that is sending the traffic, because the UID of kernel sockets created at namespace creation time (e.g., the per-processor ICMP and TCP sockets) is the UID of the user that created the socket, which might not be mapped in the namespace. Tested: compiles allnoconfig, allyesconfig, allmodconfig Tested: https://android-review.googlesource.com/253302Signed-off-by:
Lorenzo Colitti <lorenzo@google.com> Signed-off-by:
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Lorenzo Colitti authored
- Define a new FIB rule attributes, FRA_UID_RANGE, to describe a range of UIDs. - Define a RTA_UID attribute for per-UID route lookups and dumps. - Support passing these attributes to and from userspace via rtnetlink. The value INVALID_UID indicates no UID was specified. - Add a UID field to the flow structures. Signed-off-by:
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Lorenzo Colitti authored
Protocol sockets (struct sock) don't have UIDs, but most of the time, they map 1:1 to userspace sockets (struct socket) which do. Various operations such as the iptables xt_owner match need access to the "UID of a socket", and do so by following the backpointer to the struct socket. This involves taking sk_callback_lock and doesn't work when there is no socket because userspace has already called close(). Simplify this by adding a sk_uid field to struct sock whose value matches the UID of the corresponding struct socket. The semantics are as follows: 1. Whenever sk_socket is non-null: sk_uid is the same as the UID in sk_socket, i.e., matches the return value of sock_i_uid. Specifically, the UID is set when userspace calls socket(), fchown(), or accept(). 2. When sk_socket is NULL, sk_uid is defined as follows: - For a socket that no longer has a sk_socket because userspace has called close(): the previous UID. - For a cloned socket (e.g., an incoming connection that is established but on which userspace has not yet called accept): the UID of the socket it was cloned from. - For a socket that has never had an sk_socket: UID 0 inside the user namespace corresponding to the network namespace the socket belongs to. Kernel sockets created by sock_create_kern are a special case of #1 and sk_uid is the user that created them. For kernel sockets created at network namespace creation time, such as the per-processor ICMP and TCP sockets, this is the user that created the network namespace. Signed-off-by: -
David S. Miller authored
Vivien Didelot says: ==================== net: dsa: mv88e6xxx: refine port operations The Marvell chips have one internal SMI device per port, containing a set of registers used to configure a port's link, STP state, default VLAN or addresses database, etc. This patchset creates port files to implement the port operations as described in datasheets, and extend the chip ops structure with them. Patches 1 to 6 implement accessors for port's STP state, port based VLAN map, default FID, default VID, and 802.1Q mode. Patches 7 to 11 implement the port's MAC setup of link state, duplex mode, RGMII delay and speed, all accessed through port's register 0x01. The new port's MAC setup code is used to re-implement the adjust_link code and correctly force the link down before changing any of the MAC settings, as requested by the datasheets. The port's MAC accessors use values compatible with struct phy_device (e.g. DUPLEX_FULL) and extend them when needed (e.g. SPEED_MAX). Changes in v2: - Strictly use new _UNFORCED values instead of re-using _UNKNOWN ones. ==================== Signed-off-by: -
Vivien Didelot authored
Now that we have setters to configure the port's MAC, use them to refactor the port setup and adjust_link code. Note that port's MAC speed, duplex or RGMII delay must not be changed unless the port's link is forced down. So wrap all that in a mv88e6xxx_port_setup_mac function. Signed-off-by:
Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by:
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Vivien Didelot authored
While the two bits for link, duplex or RGMII delays are used the same way on chips supporting the said feature, the two bits for speed have different meaning for most of the chips out there. Speed value is stored in bits 1:0, 0x3 means unforce (normal detection). Some chips reuse values for alternative speeds when bit 12 is set. Newer chips with speed > 1Gbps reuse value 0x3 thus need a new bit 13. Here are the values to write in register 0x1 to (un)force speed: | Speed | 88E6065 | 88E6185 | 88E6352 | 88E6390 | 88E6390X | | ------- | ------- | ------- | ------- | ------- | -------- | | 10 | 0x0000 | 0x0000 | 0x0000 | 0x2000 | 0x2000 | | 100 | 0x0001 | 0x0001 | 0x0001 | 0x2001 | 0x2001 | | 200 | 0x0002 | NA | 0x1001 | 0x3001 | 0x3001 | | 1000 | NA | 0x0002 | 0x0002 | 0x2002 | 0x2002 | | 2500 | NA | NA | NA | 0x3003 | 0x3003 | | 10000 | NA | NA | NA | NA | 0x2003 | | unforce | 0x0003 | 0x0003 | 0x0003 | 0x0000 | 0x0000 | This patch implements a generic mv88e6xxx_port_set_speed() function used by chip-specific wrappers to filter supported ports and speeds. Signed-off-by: -
Vivien Didelot authored
Some chips such as 88E6352 and 88E6390 can be programmed to add delays to RXCLK for IND inputs or to GTXCLK for OUTD outputs when port is in RGMII mode. Add a port function to program such delays according to the provided PHY interface mode. Signed-off-by:
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