- 30 May, 2017 40 commits
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Arjun Vynipadath authored
Disable FW_OK flag while flashing Firmware. This will help to fix any potential mailbox timeouts during Firmware flash. Grab new devlog parameters after Firmware restart. When we FLASH new Firmware onto an adapter, the new Firmware may have the Firmware Device Log located at a different memory address or have a different size for it. Signed-off-by: Arjun Vynipadath <arjun@chelsio.com> Signed-off-by: Casey Leedom <leedom@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Ganesh Goudar authored
Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Surendra Mobiya authored
Mark carrier off before registering netdev to ensure that vlan device picks up the correct state of the carrier Signed-off-by: Surendra Mobiya <surendra@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Stefan Wahren says: ==================== net: qualcomm: add QCA7000 UART driver The Qualcomm QCA7000 HomePlug GreenPHY supports two interfaces: UART and SPI. This patch series adds the missing support for UART. This driver based on the Qualcomm code [1], but contains some changes: * use random MAC address per default * use net_device_stats from device * share frame decoding between SPI and UART driver * improve error handling * reimplement tty_wakeup with work queue (based on slcan) * use new serial device bus instead of ldisc The patches 1 - 3 are just for clean up and are not related to the UART support. Patch 4 adds SET_NETDEV_DEV() to qca_spi. Patches 5 - 16 prepare the existing QCA7000 code for UART support. The last patch contains the new driver. The code itself has been tested on a Freescale i.MX28 board and a Raspberry Pi Zero. Changes in v8: * add necessary header includes to qca_7k.c in order to reflect dependencies Changes in v7: * fix race between tx workqueue and device deregistration (reported by Lino) ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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Stefan Wahren authored
This patch adds the Ethernet over UART driver for the Qualcomm QCA7000 HomePlug GreenPHY. Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Reviewed-by: Lino Sanfilippo <LinoSanfilippo@gmx.de> Signed-off-by: David S. Miller <davem@davemloft.net>
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Stefan Wahren authored
This merges the serdev binding for the QCA7000 UART driver (Ethernet over UART) into the existing document. Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Stefan Wahren authored
This adds a new DT property to define the current baud rate of the slave device. Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
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Stefan Wahren authored
Before we can merge the QCA7000 UART binding the document needs to be renamed. Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Stefan Wahren authored
In preparation for the QCA7000 UART binding rework the binding document. Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Stefan Wahren authored
In order to share common functions between QCA7000 SPI and UART protocol driver the qca_7k_common needs to be a separate kernel module. Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Stefan Wahren authored
Unfortunately the frame format is not exactly identical between SPI and UART. In case of SPI there is an additional HW length at the beginning. So store the initial state to make the decoding state machine more flexible and easy to extend for UART support. Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Stefan Wahren authored
As preparation for the upcoming UART driver we need a module which contains common functions for both interfaces. The module qca_framing is a good candidate but renaming to qca_7k_common would make it clear. Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Stefan Wahren authored
Since this driver is specific to the QCA7000, we should make the module description more precisely. Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Stefan Wahren authored
The function qcaspi_tx_cmd() is only called from qca_spi.c. So we better move it there. Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Stefan Wahren authored
There is no need for an additional MTU define. Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Stefan Wahren authored
In order to avoid mixing things up, make the MTU and frame length defines easier to read. Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Stefan Wahren authored
There is no need to export qcaspi_netdev_open and qcaspi_netdev_close because they are also accessible via the net_device_ops. Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Stefan Wahren authored
Use SET_NETDEV_DEV() in qca_spi to create the "/sys/class/net/<if>/device" symlink. Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Stefan Wahren authored
Use the BIT macro for the CONFIG and INT register values. Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Stefan Wahren authored
It doesn't make sense to use a signed variable for offset here, so fix it up. Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Stefan Wahren authored
Currently the includes doesn't reflect the dependencies. So fix this up by removing all unnecessary entries and add the necessary ones explicit. Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Bogdan Purcareata says: ==================== net: phy: Support managed Cortina phys So far, the Cortina family phys (CS4340 in this particular case) are only supported in fixed link mode (via fixed_phy_register). The generic 10G phy driver does not work well with the phylib state machine, when the phy is registered via of_phy_connect. This prohibits the user from describing the phy nodes in the device tree. In order to support this scenario, and to properly describe the board device tree, add a minimal Cortina driver that reads the status from the right register. With the generic 10G C45 driver, the kernel will print messages like: [ 0.226521] mdio_bus 8b96000: Error while reading PHY16 reg at 1.6 [ 0.232780] mdio_bus 8b96000: Error while reading PHY16 reg at 1.5 v3 -> v4: - Add trademark info. - Minor documentation entry consistency nit. v2 -> v3: - Add documentation entry. v1 -> v2: - Change approach for getting the phy_id from hacking get_phy_c45_ids to describing the device in the device tree via ethernet-phy-id. More patch version changes per individual patches. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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Bogdan Purcareata authored
Add device tree description info for Cortina 10G phy devices. Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Bogdan Purcareata authored
Add basic support for Cortina PHY drivers. Support only CS4340 for now. The phys are not compatible with IEEE 802.3 clause 22/45 registers. Implement proper read_status support. The generic 10G phy driver causes bus register access errors. The driver should be described using the "ethernet-phy-id" device tree compatible. Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Yuval Mintz says: ==================== qed: DCBx and Attentions series The series contains 2 major components [& some odd bits]: - The first 3 patches are DCBx-related, containg missing bits in the implementation, correcting existing API and removing code no longer necessary. - Most of the remaining patches are interrupt/hw-attention related, adding some differeneces relating to QL41xxx and QL45xxx differences. While at it, they also remove a large chunk of unnecessary structure definitions. The series also contain a patch [#10] that was accidently missing from a previous series. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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Mintz, Yuval authored
Improve PCI performance by adjusting padding sizes to match those of the host machine's cacheline. Signed-off-by: Yuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Mintz, Yuval authored
Parities might exhibit a flood behavior since we re-enable the attention line without preventing the parity from re-triggering the assertion. Mask the source in AEU until the parity would be handled. Signed-off-by: Yuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Mintz, Yuval authored
In strucuture reflecting the AEU hw block some entries represent multiple HW bits, and the associated name is in fact a pattern. Today, whenever such an attention would be asserted the resulted prints would show the pattern string instead of indicating which of the possible bits was set. Signed-off-by: Yuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Mintz, Yuval authored
There are 4 attention bits in AEU that have different meaning for QL45xxx and QL41xxx adapters. Instead of doing a massive infrastructure change in favor of these bits, we implement a point fix where only those four would change meaning dependent on the adapter involved. Signed-off-by: Yuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Mintz, Yuval authored
We have almost all the necessary information regarding attentions in the logic employed for taking register dumps. Add some more and get rid of the seperate implementation we have today for identifying & printing various attention sources. Signed-off-by: Yuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Mintz, Yuval authored
In case management firmware indicates a change in the used S-tag, propagate the configuration to HW and FW. Signed-off-by: Yuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Mintz, Yuval authored
The QL41xxx adapters' PCI allows a single configuration for the MSI-x table size of all child VFs of a given PF. The existing code wouldn't cause the management firmware to set that value, meaning the VFs would retain the default MSI-x table size. Introduce a new scheme so that whenever a VF is enabled, driver would set the number of MSI-x to be the maximum over the various VFs' needs. Signed-off-by: Yuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Sudarsana Reddy Kalluru authored
Older firmware used by device didn't distinguish between RoCE and RoCE V2 from DCBx configuration perspective, and as a result we've used to take a the RoCE-related configuration and apply to it for both. Since we now support configuring each its own values, there's no reason to reflect [& configure] that both are using the same. Signed-off-by: Sudarsana Reddy Kalluru <Sudarsana.Kalluru@cavium.com> Signed-off-by: Yuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Sudarsana Reddy Kalluru authored
Instead of using a boolean value that propagates to FW configuration, use the proper firmware HSI values. Signed-off-by: Sudarsana Reddy Kalluru <Sudarsana.Kalluru@cavium.com> Signed-off-by: Yuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Sudarsana Reddy Kalluru authored
Some getters are not getting filled with the correct information regarding local DCBx. Fixes: 49632b58 ("qed: Add support for static dcbx.") Signed-off-by: Sudarsana Reddy Kalluru <Sudarsana.Kalluru@cavium.com> Signed-off-by: Yuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
David Ahern says: ==================== net: another round of extack handling for routing This set focuses on passing extack through lwtunnel and MPLS with additional catches for IPv4 route add and minor cleanups in MPLS encountered passing the extack arg around. v2 - mindful of bloat adding duplicate messages + refactored prefix and prefix length checks in ipv4's fib_table_insert and fib_table_del + refactored label check in mpls - split mpls cleanups into 2 patches + move nla_get_via up in af_mpls to avoid forward declaration ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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David Ahern authored
err is initialized to EINVAL and not used before it is set again. Remove the unnecessary initialization. Signed-off-by: David Ahern <dsahern@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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David Ahern authored
nla_get_via is only used in af_mpls.c. Remove declaration from internal.h and move up in af_mpls.c before first use. Code move only; no functional change intended. Signed-off-by: David Ahern <dsahern@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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David Ahern authored
Add error messages for failures in adding and deleting mpls routes. This covers most of the annoying EINVAL errors. Signed-off-by: David Ahern <dsahern@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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David Ahern authored
mpls_route_add and mpls_route_del have the same checks on the label. Move to a helper. Avoid duplicate extack messages in the next patch. Signed-off-by: David Ahern <dsahern@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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