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  1. 17 Mar, 2016 1 commit
  2. 16 Mar, 2016 8 commits
  3. 10 Mar, 2016 4 commits
    • Maarten Lankhorst's avatar
      drm/i915: Update state before setting watermarks, v2. · 842e0307
      Maarten Lankhorst authored
      When intel_update_watermarks is called on skylake from the hw
      state readout disable function it calls intel_update_watermarks.
      intel_update_watermarks inspects crtc->state, which should be
      set to disabled.
      
      This wasn't the case, and this resulted in a divide-by-zero in
      skl_update_wm when intel_update_watermarks got called.
      
       ------------[ cut here ]------------
       WARNING: CPU: 1 PID: 295 at drivers/gpu/drm/i915/intel_pm.c:2834
      skl_update_pipe_wm+0x102/0x8c0 [i915]()
       WARN_ON(!config->num_pipes_active)
       Modules linked in: coretemp i915(+)
      xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
       CPU: 1 PID: 295 Comm: systemd-udevd Tainted: G     U  W       4.5.0-rc4
      -xxxxxx #25
       Hardware name: xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
        0000000000000000 ffff88003777f5a8 ffffffff813485c2 ffff88003777f5f0
        ffffffffa0236240 ffff88003777f5e0 ffffffff81050fce ffff8800aa420000
        ffff8800aba18000 ffff8800aba18000 ffff880037304c00 ffff8800aa420000
       Call Trace:
        [<ffffffff813485c2>] dump_stack+0x67/0x95
        [<ffffffff81050fce>] warn_slowpath_common+0x9e/0xc0
        [<ffffffff8105103c>] warn_slowpath_fmt+0x4c/0x50
        [<ffffffff8106945e>] ? flush_work+0x8e/0x280
        [<ffffffff810693d5>] ? flush_work+0x5/0x280
        [<ffffffffa016add2>] skl_update_pipe_wm+0x102/0x8c0 [i915]
        [<ffffffffa016b96f>] skl_update_wm+0xff/0x5f0 [i915]
        [<ffffffff810928ee>] ? trace_hardirqs_on_caller+0x15e/0x1d0
        [<ffffffff8109296d>] ? trace_hardirqs_on+0xd/0x10
        [<ffffffffa016ce6e>] intel_update_watermarks+0x1e/0x30 [i915]
        [<ffffffffa01d3ee2>] intel_crtc_disable_noatomic+0xd2/0x150 [i915]
        [<ffffffffa01dd3d2>] intel_modeset_setup_hw_state+0xdd2/0xde0 [i915]
        [<ffffffffa01dfd83>] intel_modeset_init+0x15a3/0x1950 [i915]
        [<ffffffffa02160b6>] i915_driver_load+0x13c6/0x1720 [i915]
        [<ffffffff81522160>] ? add_sysfs_fw_map_entry+0x9b/0x9b
        [<ffffffffa00b15ef>] drm_dev_register+0x6f/0xb0 [drm]
        [<ffffffffa00b3b3a>] drm_get_pci_dev+0x10a/0x1d0 [drm]
        [<ffffffffa01582d9>] i915_pci_probe+0x49/0x50 [i915]
        [<ffffffff8138ae30>] pci_device_probe+0x80/0xf0
        [<ffffffff8143e2ac>] driver_probe_device+0x1bc/0x3d0
        [<ffffffff8143e526>] __driver_attach+0x66/0x90
        [<ffffffff8143e4c0>] ? driver_probe_device+0x3d0/0x3d0
        [<ffffffff8143be3b>] bus_for_each_dev+0x5b/0xa0
        [<ffffffff8143db3e>] driver_attach+0x1e/0x20
        [<ffffffff8143d461>] bus_add_driver+0x151/0x270
        [<ffffffff8143eabc>] driver_register+0x8c/0xd0
        [<ffffffff8138a2ed>] __pci_register_driver+0x5d/0x60
        [<ffffffffa00b3c58>] drm_pci_init+0x58/0xf0 [drm]
        [<ffffffff8109296d>] ? trace_hardirqs_on+0xd/0x10
        [<ffffffffa02aa000>] ? 0xffffffffa02aa000
        [<ffffffffa02aa094>] i915_init+0x94/0x9b [i915]
        [<ffffffff81000423>] do_one_initcall+0x113/0x1f0
        [<ffffffff810a4b21>] ? rcu_read_lock_sched_held+0x61/0x90
        [<ffffffff811601dc>] ? kmem_cache_alloc_trace+0x1cc/0x280
        [<ffffffff8111110a>] do_init_module+0x60/0x1c8
        [<ffffffff810c731b>] load_module+0x1ceb/0x2410
        [<ffffffff810c3a60>] ? store_uevent+0x40/0x40
        [<ffffffff811763d1>] ? kernel_read+0x41/0x60
        [<ffffffff810c7c1d>] SYSC_finit_module+0x8d/0xa0
        [<ffffffff810c7c4e>] SyS_finit_module+0xe/0x10
        [<ffffffff815f1e97>] entry_SYSCALL_64_fastpath+0x12/0x6f
       ---[ end trace 1149e9ab3695a423 ]---
       ------------[ cut here ]------------
      
      Changes since v1:
      - Clear state before calling any function after .crtc_disable.
      Reported-by: default avatarTvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
      Signed-off-by: default avatarMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/56D6FD21.7020907@linux.intel.comTested-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
      Reviewed-by: default avatarAnder Conselvan de Oliveira <conselvan2@gmail.com>
      842e0307
    • Ville Syrjälä's avatar
    • Ville Syrjälä's avatar
      drm/i915: Wait for vblank after cxsr disable in pre_plane_update · 2622a081
      Ville Syrjälä authored
      We must wait for the hardware to exit cxsr before doing the plane
      update, so add the missing vblank wait to pre_plane_update after
      disabling cxsr.
      
      We have the wait for vblank in the pre_disable_primary hook, but not in
      the pre_plane_update hook. Just move the code from (and comment) from
      pre_disable_primary into pre_plane_update. Well, we still have to keep
      it in pre_disable_primary for these strange _noatomic codepaths, so
      let's do another version of pre_disable_primary for those. Also toss
      in some FIXMEs in the hope that someone will eventually clean up this
      pre_disable_primary mess.
      Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/1457543247-13987-5-git-send-email-ville.syrjala@linux.intel.comReviewed-by: default avatarMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
      2622a081
    • Ville Syrjälä's avatar
      drm/i915: Fix watermarks for VLV/CHV · caed361d
      Ville Syrjälä authored
      commit 92826fcd ("drm/i915: Calculate watermark related members in the crtc_state, v4.")
      broke thigns by removing the pre vs. post wm update distinction. We also
      lost the pre plane wm update entirely for VLV/CHV from the crtc enable
      path.
      
      This caused underruns on modeset and plane enable/disable on CHV,
      and often those can lead to a dead pipe.
      
      So let's bring back the pre vs. post thing, and let's toss in an
      explicit wm update to valleyview_crtc_enable() to avoid having to
      put it into the common code.
      
      This is more or less a partial revert of the offending commit.
      
      Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
      Cc: drm-intel-fixes@lists.freedesktop.org
      Fixes: 92826fcd ("drm/i915: Calculate watermark related members in the crtc_state, v4.")
      Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/1457543247-13987-4-git-send-email-ville.syrjala@linux.intel.comReviewed-by: default avatarMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
      caed361d
  4. 09 Mar, 2016 6 commits
  5. 04 Mar, 2016 2 commits
  6. 03 Mar, 2016 2 commits
  7. 01 Mar, 2016 14 commits
  8. 29 Feb, 2016 1 commit
    • Matt Roper's avatar
      drm/i915: Add two-stage ILK-style watermark programming (v11) · ed4a6a7c
      Matt Roper authored
      In addition to calculating final watermarks, let's also pre-calculate a
      set of intermediate watermark values at atomic check time.  These
      intermediate watermarks are a combination of the watermarks for the old
      state and the new state; they should satisfy the requirements of both
      states which means they can be programmed immediately when we commit the
      atomic state (without waiting for a vblank).  Once the vblank does
      happen, we can then re-program watermarks to the more optimal final
      value.
      
      v2: Significant rebasing/rewriting.
      
      v3:
       - Move 'need_postvbl_update' flag to CRTC state (Daniel)
       - Don't forget to check intermediate watermark values for validity
         (Maarten)
       - Don't due async watermark optimization; just do it at the end of the
         atomic transaction, after waiting for vblanks.  We do want it to be
         async eventually, but adding that now will cause more trouble for
         Maarten's in-progress work.  (Maarten)
       - Don't allocate space in crtc_state for intermediate watermarks on
         platforms that don't need it (gen9+).
       - Move WaCxSRDisabledForSpriteScaling:ivb into intel_begin_crtc_commit
         now that ilk_update_wm is gone.
      
      v4:
       - Add a wm_mutex to cover updates to intel_crtc->active and the
         need_postvbl_update flag.  Since we don't have async yet it isn't
         terribly important yet, but might as well add it now.
       - Change interface to program watermarks.  Platforms will now expose
         .initial_watermarks() and .optimize_watermarks() functions to do
         watermark programming.  These should lock wm_mutex, copy the
         appropriate state values into intel_crtc->active, and then call
         the internal program watermarks function.
      
      v5:
       - Skip intermediate watermark calculation/check during initial hardware
         readout since we don't trust the existing HW values (and don't have
         valid values of our own yet).
       - Don't try to call .optimize_watermarks() on platforms that don't have
         atomic watermarks yet.  (Maarten)
      
      v6:
       - Rebase
      
      v7:
       - Further rebase
      
      v8:
       - A few minor indentation and line length fixes
      
      v9:
       - Yet another rebase since Maarten's patches reworked a bunch of the
         code (wm_pre, wm_post, etc.) that this was previously based on.
      
      v10:
       - Move wm_mutex to dev_priv to protect against racing commits against
         disjoint CRTC sets. (Maarten)
       - Drop unnecessary clearing of cstate->wm.need_postvbl_update (Maarten)
      
      v11:
       - Now that we've moved to atomic watermark updates, make sure we call
         the proper function to program watermarks in
         {ironlake,haswell}_crtc_enable(); the failure to do so on the
         previous patch iteration led to us not actually programming the
         watermarks before turning on the CRTC, which was the cause of the
         underruns that the CI system was seeing.
       - Fix inverted logic for determining when to optimize watermarks.  We
         were needlessly optimizing when the intermediate/optimal values were
         the same (harmless), but not actually optimizing when they differed
         (also harmless, but wasteful from a power/bandwidth perspective).
      
      Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
      Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
      Reviewed-by: default avatarMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/1456276813-5689-1-git-send-email-matthew.d.roper@intel.com
      ed4a6a7c
  9. 25 Feb, 2016 2 commits