- 21 Nov, 2014 12 commits
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Stephane Viau authored
The hardware configuration modification from a version to another is quite consequent. Introducing a configuration module (mdp5_cfg) may make things more clear and easier to access when a new hardware version comes up. Signed-off-by: Stephane Viau <sviau@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
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Stephane Viau authored
The Shared Memory Pool (SMP) has its own limitation, features and state. Some examples are: - the number of Memory Macro Block (MMB) and their size - the number of lines that can be fetched - the state of MMB currently allocated - the computation of number of blocks required per plane - client IDs ... In order to avoid private data to be overwritten by other modules, let's make these private to the SMP module. Some of these depend on the hardware configuration, let's add them to the mdp5_config struct. In some hw configurations, some MMBs are statically tied to RGB pipes and cannot be re-allocated dynamically. This change introduces the concept of MMB static usage and makes sure that dynamic MMB requests are dimensioned accordingly. A note on passing a pipe pointer, instead of client IDs: Client IDs are SMP-related information. Passing PIPE information to SMP lets SMP module to find out which SMP client(s) are used. This allows the SMP module to access the PIPE pointer, which can be used for FIFO watermark configuration. By the way, even though REG_MDP5_PIPE_REQPRIO_FIFO_WM_* registers are part of the PIPE registers, their functionality is to reflect the behavior of the SMP block. These registers access is now restricted to the SMP module. Signed-off-by: Stephane Viau <sviau@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
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Rob Clark authored
A left-over from prior to component framework. The original intent was to deal with hdmi getting unloaded before the master component, but that isn't really going to work anyways. These days with the component framework taking care to unload the master component first, we don't have to worry about this. Signed-off-by: Rob Clark <robdclark@gmail.com>
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Stephane Viau authored
The core clock rate depends on the hw configuration. Once we have read the hardware revision, we can set the core clock to its maximum value. Before then, the clock is set at a rate supported by all MDP5 revisions. Signed-off-by: Stephane Viau <sviau@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
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Rob Clark authored
For mdp5, the irqs of hdmi/eDP/dsi0/dsi1 blocks get routed through the mdp block. In order to decouple hdmi/eDP/etc, register an irq domain in mdp5. When hdmi/dsi/etc are used with mdp4, they can directly setup their irqs in their DT nodes as normal. When used with mdp5, instead set the mdp device as the interrupt-parent, as in: mdp: qcom,mdss_mdp@fd900000 { compatible = "qcom,mdss_mdp"; interrupt-controller; #interrupt-cells = <1>; ... }; hdmi: qcom,hdmi_tx@fd922100 { compatible = "qcom,hdmi-tx-8074"; interrupt-parent = <&mdp>; interrupts = <8 0>; /* MDP5_HW_INTR_STATUS.INTR_HDMI */ ... }; There is a slight awkwardness, in that we cannot disable child irqs at the mdp level, they can only be cleared in the child block. So you must not use threaded irq handlers in the child. I'm not sure if there is a better way to deal with that. Signed-off-by: Rob Clark <robdclark@gmail.com>
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git://people.freedesktop.org/~agd5f/linuxDave Airlie authored
- More CI dpm fixes - Initial DPM fan control for SI/CI (disabled by default) - GPUVM multi-ring efficiency improvements - Some cursor fixes * 'drm-next-3.19' of git://people.freedesktop.org/~agd5f/linux: (22 commits) drm/radeon: update the VM after setting BO address v4 drm/radeon: sync PT updates as shared v2 drm/radeon: sync PD updates as shared drm/radeon: fence BO_VAs manually drm/radeon: use one VMID for each ring drm/radeon: track VM update fences separately drm/radeon: fence PT updates manually v2 drm/radeon: split semaphore and sync object handling v2 drm/radeon: remove unnecessary VM syncs drm/radeon: stop re-reserving the BO in radeon_vm_bo_set_addr drm/radeon: rework vm_flush parameters drm/radeon/ci: disable needless sclk changes drm/radeon/ci: force pcie level before sclk and mclk drm/radeon/ci: use different smc command for pcie dpm drm/radeon/ci: apply disp voltage changes before clk changes drm/radeon: fix PCC debugging message for CI DPM drm/radeon/dpm: add thermal dpm support for CI drm/radeon/dpm: add smc fan control for CI (v2) drm/radeon/dpm: add smc fan control for SI (v2) drm/radeon: work around a hw bug in MGCG on CIK ...
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Markus Elfring authored
The vfree() function performes also input parameter validation. Thus the test around the call is not needed. This issue was detected by using the Coccinelle software. Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Reviewed-by: Thierry Reding <thierry.reding@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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Markus Elfring authored
The vunmap() function performes also input parameter validation. Thus the test around the call is not needed. This issue was detected by using the Coccinelle software. Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Reviewed-by: Thierry Reding <thierry.reding@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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Markus Elfring authored
The drm_fbdev_cma_hotplug_event() function tests whether its argument is NULL and then returns immediately. Thus the test around the call is not needed. This issue was detected by using the Coccinelle software. Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Reviewed-by: Thierry Reding <thierry.reding@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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Markus Elfring authored
The release_firmware() function tests whether its argument is NULL and then returns immediately. Thus the test around the call is not needed. This issue was detected by using the Coccinelle software. Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Reviewed-by: Thierry Reding <thierry.reding@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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Daniel Vetter authored
This is an oversight from commit f52b69f1 Author: Daniel Vetter <daniel.vetter@ffwll.ch> Date: Wed Nov 19 18:38:08 2014 +0100 drm/atomic: Don't overrun the connector array when hotplugging Cc: Dave Airlie <airlied@redhat.com> Cc: Rob Clark <robdclark@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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Thomas Hellstrom authored
It happens on occasion that developers of generic user-space applications abuse the dumb buffer API to get hold of drm buffers that they can both mmap() and use for GPU acceleration, using the assumptions that dumb buffers and buffers available for GPU are a) The same type and can be aribtrarily type-casted. b) fully coherent. This patch makes the most widely used drivers warn nicely when that happens, the next step will be to fail. v2: Move drmP.h changes to drm_gem.h. Fix Radeon dumb mmap breakage. Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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- 20 Nov, 2014 28 commits
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Christian König authored
This way the necessary VM update is kicked off immediately if all BOs involved are in GPU accessible memory. v2: fix vm lock v3: immediately update unmaps as well v4: use drm_free_large instead of kfree Tested-by: Kai Wasserbäch <kai@dev.carbon-project.org> Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Christian König authored
Only invalidating PTEs needs to be executed synchronized to using the PT. v2: fix sync to uses Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Christian König authored
We never invalidate PD entries and making them valid can run with other users in parallel. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Christian König authored
This allows us to finally remove the VM fence and so allow concurrent use of it from different engines. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Christian König authored
Use multiple VMIDs for each VM, one for each ring. That allows us to execute flushes separately on each ring, still not ideal cause in a lot of cases rings can share IDs. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Christian König authored
Note for each fence if it's a VM page table update or not. This allows us to determine the last VM update in a sync object and so to figure out if we need to flush the TLB or not. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Christian König authored
This allows us to add the real execution fence as shared. v2: fix typo Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Christian König authored
Previously we just allocated space for four hardware semaphores in each software semaphore object. Make software semaphore objects represent only one hardware semaphore address again by splitting the sync code into it's own object. v2: fix typo in comment Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Christian König authored
The PD/PTs reservation object now contains everything needed. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Christian König authored
That's useless when all callers drop the reservation immediately after calling the function. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Christian König authored
Use ring structure instead of index and provide vm_id and pd_addr separately. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
The current code always reprogrammed the sclk levels, but we don't currently handle disp sclk requirements so just skip it. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Preferred ordering. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Use unforce levels rather than enable mask instruction. This is the preferred method. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Apply voltage changes for displays before changing clocks. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Add missing newline and print the bad gpio shift. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Not currently used. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Enable smc fan control for CI boards. Should reduce the fan noise on systems with a higher default fan profile. v2: disable by default, add additional fan setup, rpm control bug: https://bugs.freedesktop.org/show_bug.cgi?id=73338Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Enable smc fan control for SI boards. Should reduce the fan noise on systems with a higher default fan profile. v2: disable by default, add rpm controls bug: https://bugs.freedesktop.org/show_bug.cgi?id=73338Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Always need to set bit 0 of RLC_CGTT_MGCG_OVERRIDE to avoid unreliable doorbell updates in some cases. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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Michel Dänzer authored
No functional change. Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Michel Dänzer authored
The cursor_set2 hook provides the cursor hotspot position within the cursor image. When the hotspot position changes, we can adjust the cursor position such that the hotspot doesn't move on the screen. This prevents the cursor from appearing to intermittently jump around on the screen when the position of the hotspot within the cursor image changes. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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git://people.freedesktop.org/~gabbayo/linuxDave Airlie authored
Merge AMDKFD it seems clean enough. * 'amdkfd-v6' of git://people.freedesktop.org/~gabbayo/linux: (29 commits) amdkfd: Implement the Get Version IOCTL amdkfd: Implement the Get Process Aperture IOCTL amdkfd: Implement the Get Clock Counters IOCTL amdkfd: Implement the Set Memory Policy IOCTL amdkfd: Implement the create/destroy/update queue IOCTLs amdkfd: Add interrupt handling module amdkfd: Add device queue manager module amdkfd: Add process queue manager module amdkfd: Add packet manager module amdkfd: Add module parameter of scheduling policy amdkfd: Add kernel queue module amdkfd: Add mqd_manager module amdkfd: Add queue module amdkfd: Add binding/unbinding calls to amd_iommu driver amdkfd: Add basic modules to amdkfd amdkfd: Add topology module to amdkfd amdkfd: Add amdkfd skeleton driver amdkfd: Add IOCTL set definitions of amdkfd Update MAINTAINERS and CREDITS files with amdkfd info drm/radeon: Add radeon <--> amdkfd interface ...
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Zach Reizner authored
This patch allows framebuffers for cirrus to be created with 32bpp pixel formats provided that they do not violate certain restrictions of the cirrus hardware. v2: Use pci resource length for vram size. Signed-off-by: Zach Reizner <zachr@google.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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Haixia Shi authored
Only importing an FD to a handle is currently supported on UDL, but the exporting functionality is equally useful. Signed-off-by: Haixia Shi <hshi@chromium.org> Reviewed-by: Stéphane Marchesin <marcheu@chromium.org> Signed-off-by: Dave Airlie <airlied@redhat.com>
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Haixia Shi authored
By default set udl_gem_object as cacheable, but set WC flag when attaching dmabuf. In udl_gem_mmap() update cache attributes based on the flags, similar to exynos_drm_gem_mmap(). Signed-off-by: Haixia Shi <hshi@chromium.org> Reviewed-by: Sonny Rao <sonnyrao@chromium.org> Reviewed-by: Olof Johansson <olofj@chromium.org> Reviewed-by: Stéphane Marchesin <marcheu@chromium.org> Signed-off-by: Dave Airlie <airlied@redhat.com>
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Zach Reizner authored
Before this patch, cirrus_device_init could have failed while cirrus_mm_init succeeded and the driver would have reported overall success on load. This patch causes cirrus_device_init to return on the first error encountered. Reviewed-by: Stéphane Marchesin <marcheu@chromium.org> Signed-off-by: Dave Airlie <airlied@redhat.com>
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Daniel Vetter authored
Oversight from my kerneldoc cleanup when doing the original atomic helper series - I've only applied this clarification to the modeset related helpers, and not the plane update code. Remedy this asap. Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Reviewed-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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