- 04 Jun, 2020 8 commits
-
-
Christophe JAILLET authored
When a list is completely iterated with 'list_for_each_entry(x, ...)', x is not NULL at the end. While at it, remove a useless initialization of the ndev variable. It is overridden by 'list_for_each_entry'. Fixes: f2663872 ("crypto: cavium - Register the CNN55XX supported crypto algorithms.") Cc: <stable@vger.kernel.org> Signed-off-by:
Christophe JAILLET <christophe.jaillet@wanadoo.fr> Signed-off-by:
Herbert Xu <herbert@gondor.apana.org.au>
-
Tero Kristo authored
The current implementation of the multiple accelerator core support for OMAP SHA does not work properly. It always picks up the first probed accelerator core if this is available, and rest of the book keeping also gets confused if there are two cores available. Add proper load balancing support for SHA, and also fix any bugs related to the multicore support while doing it. Signed-off-by:
Tero Kristo <t-kristo@ti.com> Signed-off-by:
-
Tero Kristo authored
Most of the OMAP family SoCs contain two instances for AES core, which causes the remove callbacks to be also done twice when driver is removed. Fix the algorithm unregister callbacks to take into account the number of algorithms still registered to avoid removing these twice. Signed-off-by:
-
Tero Kristo authored
With very small data sizes, the whole data can end up in the xmit buffer. This code path does not set the sg_len properly which causes the core dma framework to crash. Fix by adding the proper size in place. Also, the data length must be a multiple of block-size, so extend the DMA data size while here. Signed-off-by:
-
Tero Kristo authored
The ctx internal buffer can only hold buflen amount of data, don't try to copy over more than that. Also, initialize the context sg pointer if we only have data in the context internal buffer, this can happen when closing a hash with certain data amounts. Signed-off-by:
-
Tero Kristo authored
In case buffers are copied from userspace, directly accessing the page will most likely fail because it hasn't been mapped into the kernel memory space. Fix the issue by forcing a kmap / kunmap within the cleanup functionality. Signed-off-by:
-
Tero Kristo authored
As the hardware acceleration for the omap-sham algos is not available from userspace, force kernel driver usage. Without this flag in place, openssl 1.1 implementation thinks it can accelerate sha algorithms on omap devices directly from userspace. Signed-off-by:
-
Tero Kristo authored
Running the self test suite for omap-aes with extra tests enabled causes huge spam with the tag message wrong indicators. With self tests, this is fine as there are some tests that purposedly pass bad data to the driver. Also, returning -EBADMSG from the driver is enough, so remove the dev_err message completely. Signed-off-by:
-
- 28 May, 2020 3 commits
-
-
Weili Qian authored
In order to be compatible with devices of different versions, V1 in the accelerator driver is now isolated, and other versions are the previous V2 processing flow. Signed-off-by:
Weili Qian <qianweili@huawei.com> Signed-off-by:
Shukun Tan <tanshukun1@huawei.com> Reviewed-by:
Zhou Wang <wangzhou1@hisilicon.com> Signed-off-by:
-
Iuliana Prodan authored
Now, in crypto-engine, if hardware queue is full (-ENOSPC), requeue request regardless of MAY_BACKLOG flag. If hardware throws any other error code (like -EIO, -EINVAL, -ENOMEM, etc.) only MAY_BACKLOG requests are enqueued back into crypto-engine's queue, since the others can be dropped. The latter case can be fatal error, so those cannot be recovered from. For example, in CAAM driver, -EIO is returned in case the job descriptor is broken, so there is no possibility to fix the job descriptor. Therefore, these errors might be fatal error, so we shouldn’t requeue the request. This will just be pass back and forth between crypto-engine and hardware. Fixes: 6a89f492 ("crypto: engine - support for parallel requests based on retry mechanism") Signed-off-by:
Iuliana Prodan <iuliana.prodan@nxp.com> Reported-by:
Horia Geantă <horia.geanta@nxp.com> Reviewed-by:
-
Christophe JAILLET authored
s/NITORX/NITROX/ Signed-off-by:
-
- 22 May, 2020 12 commits
-
-
Shukun Tan authored
The debugfs qm_regs file is already in the qm directory, so no qm_ prefix is required. Signed-off-by:
-
Shukun Tan authored
Add dump information of SQC/CQC/EQC/AEQC/SQE/CQE/EQE/AEQE. Signed-off-by:
-
Longfang Liu authored
Hisilicon ZIP engine driver uses debugfs to provides IO operation debug information Signed-off-by:
Longfang Liu <liulongfang@huawei.com> Signed-off-by:
Zaibo Xu <xuzaibo@huawei.com> Reviewed-by:
-
Hui Tang authored
Add debugfs to provides IO operation debug information and add BD processing timeout count function Signed-off-by:
Hui Tang <tanghui20@huawei.com> Signed-off-by:
-
Kai Ye authored
Hisilicon SEC engine driver uses debugfs to provides IO operation debug information Signed-off-by:
Kai Ye <yekai13@huawei.com> Signed-off-by:
-
Longfang Liu authored
The QM driver uses debugfs to provides the current state of the QM state machine Signed-off-by:
-
Longfang Liu authored
Add DebugFS method to get the information of IRQ/Requests/QP .etc of QM for HPRE/ZIP/SEC drivers. Signed-off-by:
-
Nicolas Toromanoff authored
Protect STM32 CRC device from concurrent accesses. As we create a spinlocked section that increase with buffer size, we provide a module parameter to release the pressure by splitting critical section in chunks. Size of each chunk is defined in burst_size module parameter. By default burst_size=0, i.e. don't split incoming buffer. Signed-off-by:
Nicolas Toromanoff <nicolas.toromanoff@st.com> Signed-off-by:
-
Nicolas Toromanoff authored
Ensure stm32_crc_update() and stm32_crc_init() can be called in atomic context and can't sleep. Add pm_runtime_irq_safe() to make pm_runtime_get_sync() atomic. Change runtime pm to call clk_enable()/clk_disable() and change system pm to unprepare/prepare the clock and force runtime pm suspend/resume. Signed-off-by:
-
Nicolas Toromanoff authored
Ensure CRC algorithm is registered only once in crypto framework when there are several instances of CRC devices. Update the CRC device list management to avoid that only the first CRC instance is used. Fixes: b51dbe90 ("crypto: stm32 - Support for STM32 CRC32 crypto module") Signed-off-by:
-
Nicolas Toromanoff authored
Fix wrong crc32 initialisation value: "alg: shash: stm32_crc32 test failed (wrong result) on test vector 0, cfg="init+update+final aligned buffer" cra_name="crc32c" expects an init value of 0XFFFFFFFF, cra_name="crc32" expects an init value of 0. Fixes: b51dbe90 ("crypto: stm32 - Support for STM32 CRC32 crypto module") Signed-off-by:
-
Nicolas Toromanoff authored
Allow use of crc_update without prior call to crc_init. And change (and fix) driver to use CRC device even on unaligned buffers. Fixes: b51dbe90 ("crypto: stm32 - Support for STM32 CRC32 crypto module") Signed-off-by:
-
- 15 May, 2020 17 commits
-
-
Zhou Wang authored
Currently zip sqe is stored in hisi_zip_qp_ctx, which will bring corruption with multiple parallel users of the crypto tfm. This patch removes the zip_sqe in hisi_zip_qp_ctx and uses a temporary sqe instead. Signed-off-by:
Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by:
-
Shukun Tan authored
By configuring the device error in firmware to report through abnormal interruption, process all NFE errors in irq handler. Signed-off-by:
-
Shukun Tan authored
The hardware device can be configured to report directly through MSI, but this method will not go through RAS, configure all hardware errors that should be processed by driver to NFE. Signed-off-by:
-
Weili Qian authored
Put all the code for the memory allocation into the QM initialization process. Before, The qp memory was allocated when the qp was created, and released when the qp was released, It is now changed to allocate all the qp memory once. Signed-off-by:
-
Weili Qian authored
Some initial value assignment of struct hisi_qm could put into QM. Signed-off-by:
-
Shukun Tan authored
The codes related use_dma_api is useless which should be removed. Signed-off-by:
-
Shukun Tan authored
Add callback reset_prepare and reset_done in QM, The callback reset_prepare will uninit device error configuration and stop the QM, the callback reset_done will init the device error configuration and restart the QM. Uninit the error configuration will disable device block master OOO when Multi-bit ECC error occurs to avoid the request of FLR will not return. Signed-off-by:
-
Zhou Wang authored
Add specific states for qm and qp, every state change under critical region to prevent from race condition. Meanwhile, qp state change will also depend on qm state. Due to the introduction of these states, it is necessary to pay attention to the calls of public logic, such as concurrent scenarios resetting and releasing queue will call hisi_qm_stop, which needs to add additional status to distinguish and process. Signed-off-by:
-
Shukun Tan authored
put q_num_set similar code into qm to reduce the redundancy. Signed-off-by:
-
Longfang Liu authored
Misc fixes on coding style: 1.Merge QM initialization code into a function 2.Merge QM's PF and VF initialization into a function Signed-off-by:
-
Longfang Liu authored
Misc fixes on coding style: 1.Merge pre-initialization and initialization of QM 2.Package the initialization of QM's PF and VF into a function Signed-off-by:
-
Longfang Liu authored
Adjust the position of SMMU status check and SEC queue initialization in SEC probe Signed-off-by:
-
Rikard Falkeborn authored
sec_dfx_regs is never changed and can therefore be made const. This allows the compiler to put it in the text section instead of the data section. Before: text data bss dec hex filename 17982 7312 480 25774 64ae drivers/crypto/hisilicon/sec2/sec_main.o After: text data bss dec hex filename 18366 6928 480 25774 64ae drivers/crypto/hisilicon/sec2/sec_main.o Signed-off-by:
Rikard Falkeborn <rikard.falkeborn@gmail.com> Signed-off-by:
-
Rikard Falkeborn authored
hzip_dfx_regs is never changed and can be made const. This allows the compiler to put it in the text section instead of the data section. Before: text data bss dec hex filename 15236 6160 480 21876 5574 drivers/crypto/hisilicon/zip/zip_main.o After: text data bss dec hex filename 15620 5776 480 21876 5574 drivers/crypto/hisilicon/zip/zip_main.o Signed-off-by:
-
Rikard Falkeborn authored
hpre_cluster_dfx_regs and hpre_com_dfx_regs are never changed and can therefore be made const. This allows the compiler to put it in the text section instead of the data section. Before: text data bss dec hex filename 16455 6288 480 23223 5ab7 drivers/crypto/hisilicon/hpre/hpre_main.o After: text data bss dec hex filename 16839 5904 480 23223 5ab7 drivers/crypto/hisilicon/hpre/hpre_main.o Signed-off-by:
-
Rikard Falkeborn authored
pid_cd_regs and debug_regs are never changed and can therefore be made const. This allows the compiler to put it in the text section instead of the data section. Before: text data bss dec hex filename 2871 2320 64 5255 1487 drivers/crypto/ccree/cc_debugfs.o After: text data bss dec hex filename 3255 1936 64 5255 1487 drivers/crypto/ccree/cc_debugfs.o Signed-off-by:
-
Arnd Bergmann authored
When building for ARMv7-M, clang-9 or higher tries to unroll some loops, which ends up confusing the register allocator to the point of generating rather bad code and using more than the warning limit for stack frames: warning: stack frame size of 1200 bytes in function 'blake2b_compress' [-Wframe-larger-than=] Forcing it to not unroll the final loop avoids this problem. Fixes: 91d68933 ("crypto: blake2b - add blake2b generic implementation") Signed-off-by:
Arnd Bergmann <arnd@arndb.de> Reviewed-by:
Nathan Chancellor <natechancellor@gmail.com> Signed-off-by:
-
