- 23 Aug, 2013 3 commits
-
-
git://git.linaro.org/people/shawnguo/linux-2.6Kevin Hilman authored
From Shawn Guo: It contains the imx device tree updates for 3.12. - New pinctrl entry additions for various peripherals - Devices enabling for imx6, imx5 and imx27 boards - Add missing device nodes like iim, owire, audmux and sram, etc. - Various updates on boards like phytec, wandboard and sabresd - Consolidate pad macros between imx6q and imx6dl * tag 'imx-dt-3.12' of git://git.linaro.org/people/shawnguo/linux-2.6: (92 commits) ARM: dts: vf610-twr: enable i2c0 device ARM: dts: i.MX51: Add one more I2C2 pinmux entry ARM: dts: i.MX51: Move pins configuration under "iomuxc" label ARM: dtsi: imx6qdl-sabresd: Add USB OTG vbus pin to pinctrl_hog ARM: dtsi: imx6qdl-sabresd: Add USB host 1 VBUS regulator ARM: dts: imx27-phytec-phycore-som: Enable AUDMUX ARM: dts: i.MX27: Disable AUDMUX in the template ARM: dts: wandboard: Add support for SDIO bcm4329 ARM: i.MX5 clocks: Remove optional clock setup (CKIH1) from i.MX51 template ARM: dts: imx53-qsb: Make USBH1 functional ARM i.MX6Q: dts: Enable I2C1 with EEPROM and PMIC on Phytec phyFLEX-i.MX6 Ouad module ARM i.MX6Q: dts: Enable SPI NOR flash on Phytec phyFLEX-i.MX6 Ouad module ARM: dts: imx6qdl-sabresd: Add touchscreen support ARM: imx: add ocram clock for imx53 ARM: dts: imx: ocram size is different between imx6q and imx6dl ARM: dts: imx27-phytec-phycore-som: Fix regulator settings ARM: dts: i.MX27: Remove clock name from CPU node ARM: dts: i.MX27: Increase "clock-latency" value ARM: dts: i.MX27: Add label to CPU node ARM: dts: i.MX27: Remove optional "ptp" clock source for FEC ... Signed-off-by: Kevin Hilman <khilman@linaro.org>
-
git://git.linaro.org/people/shawnguo/linux-2.6Kevin Hilman authored
From Shawn Guo: It contains a bunch of imx soc updates for 3.12. - Add more ethernet phy fixups for imx6 boards - Add some missing imx6q clocks into clock driver - Add new clock types fixup mux and div to work around some ugly hardware defect - Consolidate L2 cache initialization function, so that it can be used on more i.MX SoCs - Replace magic numbers in mach-imx6q.c with well defined macros - Small fixes for imx6q and pllv3 clock drivers - Some random updates on imx defconfig files * tag 'imx-soc-3.12' of git://git.linaro.org/people/shawnguo/linux-2.6: (33 commits) phy: micrel: Add definitions for common Micrel PHY registers ARM: imx: Re-select CONFIG_SND_SOC_IMX_MC13783 option ARM: imx: Move anatop related from board file to anatop driver ARM: imx_v6_v7_defconfig: Enable wireless support ARM: imx_v4_v5_defconfig: Cleanup imx_v4_v5_defconfig ARM: imx_v6_v7_defconfig: Add SATA support ARM: imx_v6_v7_defconfig: Cleanup imx_v6_v7_defconfig ARM: mx53: Allow suspend/resume ARM: mach-imx: Select ARM_CPU_SUSPEND at ARCH_MXC level ARM: imx_v6_v7_defconfig: Select CONFIG_TOUCHSCREEN_EGALAX ARM: imx6q: add vdoa gate clock ARM: imx6q: add the missing cko output selection ARM: imx6q: add cko2 clocks ARM: imx6q: add spdif gate clock ARM: imx: clk-pllv3: improve the timeout waiting method ARM: imx6: change some clocks to fixup clocks ARM: imx: add common clock support for fixup mux ARM: imx: add common clock support for fixup div ARM: imx: Select MIGHT_HAVE_CACHE_L2X0 ARM: imx: fix imx_init_l2cache storage class ...
-
git://git.linaro.org/people/shawnguo/linux-2.6Kevin Hilman authored
From Shawn Guo: This is a patch series that updates imx-weim bus driver to have it support more i.MX SoCs. Because there is no maintainer for drivers/bus so far, I'm forwarding it through IMX tree for 3.12 merge window. * tag 'imx-weim-3.12' of git://git.linaro.org/people/shawnguo/linux-2.6: drivers: bus: imx-weim: Add support for i.MX1/21/25/27/31/35/50/51/53 drivers: bus: imx-weim: Add missing platform_driver.owner field drivers: bus: imx-weim: use module_platform_driver_probe() drivers: bus: imx-weim: Simplify error path drivers: bus: imx-weim: Remove private driver data
-
- 22 Aug, 2013 37 commits
-
-
Kevin Hilman authored
Merge tag 'davinci-for-v3.12/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/soc From Sekhar Nori: DaVinci DT updates for v3.12 ---------------------------- This set of patches add ethernet DT nodes for DA850 and also remove now unneeded specification of UART clock frequency so kernel can now boot irrespective of what the bootloader setting of UART frequency is. * tag 'davinci-for-v3.12/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci: ARM: davinci: da850: do not specify clock_frequency for UART DT node ARM: davinci: da850: add DT node for ethernet ARM: davinci: da850: add OF_DEV_AUXDATA entry for davinci_emac ARM: davinci: da850: add OF_DEV_AUXDATA entry for mdio. ARM: davinci: da850: add DT node for mdio device Signed-off-by: Kevin Hilman <khilman@linaro.org>
-
Kevin Hilman authored
Merge tag 'davinci-for-v3.12/soc' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/soc From Sekhar Nori: DaVinci SoC updates for v3.12 ----------------------------- This set of SoC updates contains changes to the way UART clock is handled to enabled DT-boot to obtain UART clock frequency instead of relying on DT-binding being supplied. Similarly handling of MDIO clock is fixed to make it easier to support MDIO in DT-boot. Finally there is patch to remove now unnecessary setting of wake-up capable flag for RTC. * tag 'davinci-for-v3.12/soc' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci: ARM: davinci: fix clock lookup for mdio device ARM: davinci: da8xx: remove hard coding of rtc device wakeup ARM: davinci: serial: remove davinci_serial_setup_clk() ARM: davinci: serial: get rid of davinci_uart_config ARM: davinci: da8xx: remove da8xx_uart_clk_enable ARM: davinci: uart: move to devid based clk_get Signed-off-by: Kevin Hilman <khilman@linaro.org>
-
Kevin Hilman authored
Merge tag 'ux500-core-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/soc From Linus Walleij: Core ux500 changes for v3.12: - Add support for restart using the PRCMU - Move secondary startup out of INIT section - set coherent_dma_mask for DMA40 * tag 'ux500-core-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: ARM: ux500: set coherent_dma_mask for dma40 ARM: ux500: remove u8500_secondary_startup from INIT section. ARM: ux500: add restart support via prcmu
-
Jingchang Lu authored
enable i2c0 device on Vybrid VF610 Tower Board Signed-off-by: Jingchang Lu <b35083@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
-
Alexander Shiyan authored
This adds one more I2C2 alternate pinmux entry. GPIO1_2 <=> SCL GPIO1_3 <=> SDA Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
-
Alexander Shiyan authored
This unmix module/pin definitions and reduce indentation for pin groups, so makes template a bit cleaner. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
-
Peter Chen authored
USB OTG vbus pin needs to be configured as gpio function at sabresd board. Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
-
Peter Chen authored
We enabled USB host 1, so host 1's vbus should be on to let host 1 work. Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
-
Alexander Shiyan authored
Patch adds AUDMUX routing for Phytec PCM-038 module. This route i.MX SSI0 (Port 1) to the slave port 4 where MC13783 codec interface is connected. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
-
Alexander Shiyan authored
AUDMUX expects additional parameters to be configured correctly, so turn it off into a template. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
-
Tony Prisk authored
The wandboard has a Broadcom 4329 WiFi connected via SDIO. This patch sets the required pins to enable the wifi module. Signed-off-by: Tony Prisk <linux@prisktech.co.nz> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
-
Alexander Shiyan authored
External high frequency clock CKIH1 is optional for i.MX51, so move it setup into boards where it is used. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
-
Fabio Estevam authored
mx53qsb uses GPIO7_8 to turn on VBUS, so add support for it. Also specify the PHY type in the device tree. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Tested-by: Arnaud Patard <arnaud.patard@rtp-net.org> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
-
Philipp Zabel authored
This patch enables I2C1 and adds device tree nodes for the EEPROM and the DA9063 PMIC connected to this I2C bus. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
-
Philipp Zabel authored
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
-
Fabio Estevam authored
mx6 sabresd boards have a egalax touchscreen controller connected via I2C3. Add support for it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
-
Shawn Guo authored
Add missing ocram gate clock for imx53 and also represent it in device tree ocram node. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
-
Shawn Guo authored
The ocram on imx6q is 256 KiB while on imx6dl it's 128 KiB. Let's have separate node for imx6q and imx6dl. It also changes imx6q size 0x3f000 to 0x40000 to match the hardware. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Liu Ying <Ying.Liu@freescale.com>
-
Alexander Shiyan authored
Outputs regulator SW1A and SW1A, SW2A and SW2B are connected together, so it determined as "joined" operation for MC13783. Separate work of these outputs in this case would be wrong, so we define only one of the outputs. Additionally, define the full range of voltages for the CPU (1.2v - 1.52v). Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
-
Alexander Shiyan authored
Clock name is not needed for "cpufreq-cpu0". Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
-
Alexander Shiyan authored
i.MX27 CPU can be clocked with a 32 kHz quartz, and not just 32768 Hz, so increase "clock-latency" value, which will ensure that we use two clock cycles on frequency change. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
-
Alexander Shiyan authored
Add a label to i.MX27 CPU node. This change allows the reuse this node in the upper levels of the DTS. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
-
Alexander Shiyan authored
Patch removes optional "ptp" clock source for FEC. This clock is missing in i.MX27. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
-
Alexander Shiyan authored
Patch replaces "dummy" clock source for watchdog with "wdog_ipg_gate". Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
-
Fabio Estevam authored
This is useful for testing suspend/resume sequence. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
-
Shawn Guo authored
The CLKO is widely used by imx6q board designs to clock audio codec. Since most codecs accept 24 MHz frequency, let's initially set up CLKO with OSC24M (cko <-- cko2 <-- osc). Then those board specific CLKO setup for audio codec can be removed. The board dts files also need an update on cko reference in codec node. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
-
Shawn Guo authored
Updates SSI nodes to adopt generic DMA bindings. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
-
Shawn Guo authored
Add HannStar HSD100PXN1 XGA panel support on LVDS1 port of imx6qdl-sabresd board. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
-
Fabio Estevam authored
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
-
Fabio Estevam authored
Add support for the imx6q wanboard variant. Since imx6q/dl are pin to pin compatible, introduce the imx6qdl-wandboard.dtsi file that contains the common peripheral nodes. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
-
Shawn Guo authored
Mark ocotp as a syscon node and add tempmon for imx6q thermal support. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
-
Shawn Guo authored
After mxs-dma driver adopts generic DMA device tree binding, gpmi channel interrupt number is defined in DMA controller node, and channel ID is listed in "dmas" property. So the DMA channel interrupt number in gpmi node "interrupts" property and fsl,gpmi-dma-channel which are used by old customized DMA binding can be removed now. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Reviewed-by: Arnd Bergmann <arnd@arndb.de>
-
Richard Zhu authored
Only imx6q has the ahci sata controller, enable it on imx6q platforms. Signed-off-by: Richard Zhu <r65037@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
-
Alexander Shiyan authored
This patch adds core voltages for i.MX27 CPUs. Only 266 and 400 MHz modes is documented in the datasheet, so we add a 266 MHz frequency for conform this. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
-
Alexander Shiyan authored
This patch adds the missing (Wireless External Interface Module) WEIM devicetree node for i.MX51 CPUs. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
-
Fabio Estevam authored
Wandboard has a bluetooth device connected to UART3, so add support for it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
-
Fabio Estevam authored
Wandboard has a SD card slot on the baseboard connected to SDHC1 and a BCM4329 (Wifi + Bluetooth chip) connected to SDHC2. Add support for these ports. While at it, provide the card detect gpio on SDHC3 and also fix indentation on MX6QDL_PAD_GPIO_0__CCM_CLKO1 hog pin. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
-