- 26 Sep, 2017 40 commits
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Dmytro Laktyushkin authored
Signed-off-by:
Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by:
Tony Cheng <Tony.Cheng@amd.com> Acked-by:
Harry Wentland <Harry.Wentland@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Amy Zhang authored
- Remove mixed declarations and unused variables Signed-off-by:
Amy Zhang <Amy.Zhang@amd.com> Reviewed-by:
Anthony Koo <Anthony.Koo@amd.com> Acked-by:
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Tony Cheng authored
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Yongqiang Sun <yongqiang.sun@amd.com> Acked-by:
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Yongqiang Sun authored
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Hersen Wu authored
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Hersen Wu <hersenxs.wu@amd.com> Reviewed-by:
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Tony Cheng authored
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Tony Cheng authored
- reuse existing helper functions - helper function to make it more obvious which cases we can do optimize programming Signed-off-by:
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Tony Cheng authored
- make failure status obvious Signed-off-by:
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Dmytro Laktyushkin authored
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Yongqiang Sun authored
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Joshua Aberback authored
- refactor opp_destroy functions to dce common file - fixes memory leak, dce specific variations didn't free regamma_params - remove unused dce110_regamma structure Signed-off-by:
Joshua Aberback <Joshua.Aberback@amd.com> Reviewed-by:
Jun Lei <Jun.Lei@amd.com> Acked-by:
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Leon Elazar authored
Signed-off-by:
Leon Elazar <leon.elazar@amd.com> Reviewed-by:
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Harry Wentland authored
They're not used anywhere Signed-off-by:
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Harry Wentland authored
Signed-off-by:
Jordan Lazare <Jordan.Lazare@amd.com> Reviewed-by:
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Dmytro Laktyushkin authored
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Andrey Grodzovsky authored
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Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Acked-by:
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Andrey Grodzovsky authored
Switch from VUPDATE to VBLANK. Signed-off-by:
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Andrey Grodzovsky authored
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Leon Elazar authored
This will fix the memory Input programing with MST tiled display. This Fix should fix connectivity problems with MST tiled Display Signed-off-by:
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Zeyu Fan authored
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Zeyu Fan <Zeyu.Fan@amd.com> Acked-by:
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Tony Cheng authored
DC actually support ABGR8888 instead of BGRA8888 (R/B swap rather than endian swap) , rename to avoid confusion Signed-off-by:
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Dmytro Laktyushkin authored
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Tony Cheng authored
- not all DCE has PHYPLLA_PIXCLK_DOUBLE_RATE_ENABLE bit defined. Signed-off-by:
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Amy Zhang authored
- Made sure dest color space is updated in stream and info frame - Optimized segment distribution algorithm for regamma mapping Signed-off-by:
Aric Cyr <Aric.Cyr@amd.com> Signed-off-by:
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Amy Zhang authored
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Tony Cheng authored
also refactor to clean reduce loc to achieve same logic Signed-off-by:
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Tony Cheng authored
- these are moved to color module Signed-off-by:
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Tony Cheng authored
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Tony Cheng authored
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Tony Cheng authored
- construct using encoder_info_frame directly Signed-off-by:
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Tony Cheng authored
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Tony Cheng authored
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Tony Cheng authored
- mask = 0 means something is wrong in caller and no register field will be updated Signed-off-by:
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Tony Cheng authored
- include clock constraint logic in validate - in dc_commit_streams, include surfaces of unaffected streams Signed-off-by:
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Andrey Grodzovsky authored
Use new functions so flip failures can be gracefully handled v2: Avoid -EINVAL returned from amdgpu_crtc_prepare_flip in some error cases, it is not allowed according to expected return values for atomic_commit hook. Signed-off-by:
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Hersen Wu authored
Signed-off-by:
Eagle Yeh <eagle.yeh@amd.com> Signed-off-by:
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Leon Elazar authored
Also avoid allocating memory dce110_set_output_transfer_func if not needed Signed-off-by:
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Anthony Koo authored
Add NULL check in modules Signed-off-by:
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Amy Zhang authored
- Create translation function to translate logical format to hw format - Refactor to use transfer function in dc instead of input gamma Signed-off-by:
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Yongqiang Sun authored
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