- 19 Mar, 2019 40 commits
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Philip Yang authored
Userptr restore may have concurrent userptr invalidation after hmm_vma_fault adds the range to the hmm->ranges list, needs call hmm_vma_range_done to remove the range from hmm->ranges list first, then reschedule the restore worker. Otherwise hmm_vma_fault will add same range to the list, this will cause loop in the list because range->next point to range itself. Add function untrack_invalid_user_pages to reduce code duplication. Signed-off-by:
Philip Yang <Philip.Yang@amd.com> Reviewed-by:
Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Christian König authored
Otherwise we won't be able to cleanly handle page faults. Signed-off-by:
Christian König <christian.koenig@amd.com> Reviewed-by:
Chunming Zhou <david1.zhou@amd.com> Signed-off-by:
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Christian König authored
Make sure that not only the entities are flush, but that we also wait for the HW to finish all processing. Signed-off-by:
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Christian König authored
It's a bug having a dead pointer in the IDR, silently returning is the worst we can do. Signed-off-by:
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Christian König authored
Remove the chash implementation for now since it isn't used any more. Signed-off-by:
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Christian König authored
Further testing showed that the idea with the chash doesn't work as expected. Especially we can't predict when we can remove the entries from the hash again. So replace the chash with a ring buffer/hash mix where entries in the container age automatically based on their timestamp. v2: use ring buffer / hash mix v3: check the timeout to make sure all entries age Signed-off-by:
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Christian König authored
Only process a maximum of 32 IVs before writing back the RPTR. This improves hw handling when we get close to an overflow in the ring buffer. Signed-off-by:
Michel Dänzer <michel.daenzer@amd.com> Signed-off-by:
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Christian König authored
That doesn't seem to have any negative effects. Signed-off-by:
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Christian König authored
The doorbells should already be reserved, just enable them. Signed-off-by:
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Christian König authored
Disable overflow and enable full drain. This makes fault handling on ring 1 much more reliable since we don't generate back pressure any more. Signed-off-by:
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Nicholas Kazlauskas authored
The buffers should be cleared when possible but we also don't want buffer creation to fail in the rare case where the ring isn't ready during the call. This could happen during some suspend/resume sequences. Cc: Christian König <ckoenig.leichtzumerken@gmail.com> Signed-off-by:
Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by:
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Nicholas Kazlauskas authored
The dumb_create API isn't intended for high performance rendering and it's more useful for userspace (ie. IGT) to have them precleared. The bonus here is that we also won't needlessly leak whatever was previously in VRAM, but it also probably wasn't sensitive if it was going through this API. Signed-off-by:
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kbuild test robot authored
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c:405:2-3: Unneeded semicolon drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c:435:2-3: Unneeded semicolon Remove unneeded semicolon. Generated by: scripts/coccinelle/misc/semicolon.cocci CC: xinhui pan <xinhui.pan@amd.com> Signed-off-by:
kbuild test robot <fengguang.wu@intel.com> Signed-off-by:
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xinhui pan authored
add ras post init function. Do some initialization after all IP have finished their late init. Add new member flags which will control the ras work flow. For now, vbios enable ras for us on boot. That might change in the future. So there should be a flag from vbios to tell us if ras is enabled or not on boot. Looks like there is no such info now. Other bits of the flags are reserved to control other parts of ras. Signed-off-by:
xinhui pan <xinhui.pan@amd.com> Reviewed-by:
Evan Quan <evan.quan@amd.com> Signed-off-by:
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xinhui pan authored
add drm info output if ras initialized successfully. add ras atomfirmware sanity check. Signed-off-by:
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xinhui pan authored
lockdep need a static key. Previously we set ignore bit to avoid the warning. Now call sysfs_attr_init to initialize the static key. Signed-off-by:
Andrey Grodzovsky <andrey.grodzovsky@amd.com> Signed-off-by:
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xinhui pan authored
Unzero char is accepted by sscanf, so when data is structure but unexpectedly return error invalid; Signed-off-by:
Feifei Xu <Feifei.Xu@amd.com> Signed-off-by:
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xinhui pan authored
Currently, it is not clear how ras is supported. Both software and hardware can set the supported. That is confusing. Fix it by adding new member hw_supported. Signed-off-by:
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xinhui pan authored
Set ignore bit to satisfy locpdep. Signed-off-by:
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xinhui pan authored
Ta is optional, so check if ta firmware is loaded or not. Signed-off-by:
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Evan Quan authored
The descriptions of modinfo wrongly show two parameters for each feature(see below). This patch can fix this incorrect outputs. parm: amdgpu_ras_enable:Enable RAS features on the GPU (0 = disable, 1 = enable, -1 = auto (default)) parm: ras_enable:int parm: amdgpu_ras_mask:Mask of RAS features to enable (default 0xffffffff), only valid when ras_enable == 1 parm: ras_mask:uint Signed-off-by:
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xinhui pan authored
Signed-off-by:
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xinhui pan authored
Signed-off-by:
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Hawking Zhang authored
query sram ecc capability via amdgpu_atomfirmware_ecc_default_enabled query ecc availability via amdgpu_atomfirmware_sram_ecc_supported Signed-off-by:
Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by:
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Hawking Zhang authored
sram ecc capability could be get from firmware_capability field in firmwareinfo table Signed-off-by:
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Hawking Zhang authored
ecc default status (enabled or disabled) could be get from umc_config field in umc_info table Signed-off-by:
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Hawking Zhang authored
add new umc_info structures and new firmware_capability defines Signed-off-by:
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xinhui pan authored
Suspend will put irq, so resume need get irq back. And in the same time, skip other ras initialization. Signed-off-by:
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Eric Huang authored
RAS ECC event will combine with GPU reset event, due to ECC interrupts are caused by uncorrectable error that triggers GPU reset. v2: Fix misleading-indentation warning v3: fix build with CONFIG_HSA_AMD disabled Signed-off-by:
Eric Huang <JinhuiEric.Huang@amd.com> Reviewed-by:
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Eric Huang authored
It is to collaborate with HSA_CAPABILITY in libhsakmt. v2: squash in NULL pointer check Signed-off-by:
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xinhui pan authored
Currently, the debugfs control node can't parse bash-like commands. Now add such support for any tester that uses scripts. v2: squash in fixes for input validation Signed-off-by:
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xinhui pan authored
gpu reset is not stable on vega20 A1. Signed-off-by:
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xinhui pan authored
Add a query for userspace to check which RAS features are enabled. v2: squash in warning fix Signed-off-by:
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xinhui pan authored
Add AMDGPU_CTX_QUERY2_FLAGS_RAS_CE/UE which indicate if any error happened between previous query and this query. Signed-off-by:
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xinhui pan authored
Signed-off-by:
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Feifei Xu authored
Register ecc interrupts and ecc interrupt handler on gfx9. Add ras support on gfx9 v2: squash in warning fix Signed-off-by:
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xinhui pan authored
register IH, enable ras features on sdma. create sysfs debugfs file for sdma. Signed-off-by:
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xinhui pan authored
Mark vram pages with errors as bad and prevent the driver from using them. Signed-off-by:
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xinhui pan authored
allow userspace enable/disable ras Signed-off-by:
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xinhui pan authored
add obj management. add feature control. add debugfs infrastructure. add sysfs infrastructure. add IH infrastructure. add recovery infrastructure. It is a framework. Other IPs need call amdgpu_ras_xxx function instead of psp_ras_xxx functions. v2: squash in warning fixes Signed-off-by:
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