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- 10 Oct, 2013 1 commit
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Tony Lindgren authored
The pin control registers can have interrupts for example for device wake-up. These interrupts can be treated as a chained interrupt controller as suggested earlier by Linus Walleij <linus.walleij@linaro.org>. This patch adds support for interrupts in a way that should be pretty generic, and works for the omaps that support wake-up interrupts. On omaps, there's an interrupt enable and interrupt status bit for each pin. The two pinctrl domains on omaps share a single interrupt from the PRM chained interrupt handler. Support for other similar hardware should be easy to add. Note that this patch does not attempt to handle the wake-up interrupts automatically unlike the earlier patches. This patch allows the device drivers to do a request_irq() on the wake-up pins as needed. I'll try to do also a separate generic patch for handling the wake-up events automatically. Also note that as this patch makes the pinctrl-single an irq controller, the current bindings need some extra trickery to use interrupts from two different interrupt controllers for the same driver. So it might be worth waiting a little on the patches enabling the wake-up interrupts from drivers as there should be a generic way to handle it coming. And also there's been discussion of interrupts-extended binding for using interrupts from multiple interrupt controllers. In any case, this patch should be ready to go allowing handling the wake-up interrupts in a generic way, or separately from the device drivers. Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Prakash Manjunathappa <prakash.pm@ti.com> Cc: Roger Quadros <rogerq@ti.com> Cc: linux-kernel@vger.kernel.org Cc: Benoît Cousson <bcousson@baylibre.com> Cc: devicetree@vger.kernel.org Acked-by:
Linus Walleij <linus.walleij@linaro.org> Acked-by:
Haojian Zhuang <haojian.zhuang@gmail.com> Reviewed-by:
Kevin Hilman <khilman@linaro.org> Tested-by:
Kevin Hilman <khilman@linaro.org> Signed-off-by:
Tony Lindgren <tony@atomide.com>
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- 09 Oct, 2013 1 commit
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Tony Lindgren authored
Let's replace is_pinconf with flags and add struct pcs_soc_data so we can support SoC specific features like pin wake-up events. Done in collaboration with Roger Quadros <rogerq@ti.com>. Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Prakash Manjunathappa <prakash.pm@ti.com> Cc: linux-kernel@vger.kernel.org Acked-by:
Linus Walleij <linus.walleij@linaro.org> Acked-by:
Haojian Zhuang <haojian.zhuang@gmail.com> Reviewed-by:
Kevin Hilman <khilman@linaro.org> Tested-by:
Kevin Hilman <khilman@linaro.org> Signed-off-by:
Roger Quadros <rogerq@ti.com> Signed-off-by:
Tony Lindgren <tony@atomide.com>
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- 28 Aug, 2013 1 commit
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Sherman Yin authored
When setting pin configuration in the pinctrl framework, pin_config_set() or pin_config_group_set() is called in a loop to set one configuration at a time for the specified pin or group. This patch 1) removes the loop and 2) changes the API to pass the whole pin config array to the driver. It is now up to the driver to loop through the configs. This allows the driver to potentially combine configs and reduce the number of writes to pin config registers. All c files changed have been build-tested to verify the change compiles and that the corresponding .o is successfully generated. Signed-off-by:
Sherman Yin <syin@broadcom.com> Reviewed-by:
Christian Daudt <csd@broadcom.com> Reviewed-by:
Matt Porter <matt.porter@linaro.org> Tested-by:
Stephen Warren <swarren@nvidia.com> Acked-by:
Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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- 22 Jul, 2013 1 commit
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Jean-Francois Moine authored
This warning has been introduced by the commit 0f9bc4bc pinctrl: single: adopt pinctrl sleep mode management Signed-off-by:
Jean-Francois Moine <moinejf@free.fr> Acked-by:
Tony Lindgren <tony@atomide.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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- 17 Jun, 2013 1 commit
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Hebbar Gururaja authored
Make pinctrl-single able to handle suspend/resume events and change hogged pins states accordingly. Signed-off-by:
Hebbar Gururaja <gururaja.hebbar@ti.com> Acked-by:
Tony Lindgren <tony@atomide.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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- 16 Jun, 2013 2 commits
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Manjunathappa, Prakash authored
Take care to name pin names as register-offset.bit-pos-of-pin-in-register in case configuring multiple pins in register. Signed-off-by:
Manjunathappa, Prakash <prakash.pm@ti.com> Acked-by:
Haojian Zhuang <haojian.zhuang@gmail.com> Acked-by:
Tony Lindgren <tony@atomide.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Manjunathappa, Prakash authored
Add support to configure multiple pins in each register, existing implementation added by [1] does not support full fledge multiple pin configuration in single register, reports a pin clash when different modules configure different bits of same register. The issue reported and discussed here http://www.spinics.net/lists/arm-kernel/msg235213.html With pinctrl-single,bits-per-mux property specified, use function-mask property to find out number pins to configure. Allocate and register pin control functions based sub mask. Tested on da850/omap-l138 EVM. does not support variable submask for pins. does not support pinconf. [1] "pinctrl: pinctrl-single: Add pinctrl-single,bits type of mux" (9e605cb6), Signed-off-by:
Manjunathappa, Prakash <prakash.pm@ti.com> Reported-by:
Lad, Prabhakar <prabhakar.csengg@gmail.com> Tested-by:
Lad, Prabhakar <prabhakar.csengg@gmail.com> Acked-by:
Haojian Zhuang <haojian.zhuang@gmail.com> Acked-by:
Tony Lindgren <tony@atomide.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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- 14 May, 2013 1 commit
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Wei Yongjun authored
Fix to return a negative error code from the error handling case instead of 0, as done elsewhere in this function. Introduced by commit 9dddb4df (pinctrl: single: support generic pinconf) Signed-off-by:
Wei Yongjun <yongjun_wei@trendmicro.com.cn> Acked-by:
Haojian Zhuang <haojian.zhuang@linaro.org> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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- 13 Mar, 2013 1 commit
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Haojian Zhuang authored
pcs_pinconf_set() is always using "arg << shift" to configure two parameters case. But pcs_add_conf2() didn't remove shift for config argument. So correct it. Signed-off-by:
Haojian Zhuang <haojian.zhuang@linaro.org> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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- 07 Mar, 2013 5 commits
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Axel Lin authored
If pcs->is_pinconf is false, it means does not support pinconf. If pcs->is_pinconf is true, is_generic flag is always true. This patch fixes below build error: CC [M] drivers/pinctrl/pinctrl-single.o drivers/pinctrl/pinctrl-single.c: In function 'pcs_probe': drivers/pinctrl/pinctrl-single.c:1441:3: error: assignment of member 'is_generic' in read-only object make[2]: *** [drivers/pinctrl/pinctrl-single.o] Error 1 make[1]: *** [drivers/pinctrl] Error 2 make: *** [drivers] Error 2 Signed-off-by:
Axel Lin <axel.lin@ingics.com> Reviewed-by:
Haojian Zhuang <haojian.zhuang@linaro.org> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Haojian Zhuang authored
Support the operation of generic pinconf. The supported config arguments are INPUT_SCHMITT, INPUT_SCHMITT_ENABLE, DRIVE_STRENGHT, BIAS_DISABLE, BIAS_PULLUP, BIAS_PULLDOWN, SLEW_RATE. Signed-off-by:
Haojian Zhuang <haojian.zhuang@linaro.org> Acked-by:
Tony Lindgren <tony@atomide.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Haojian Zhuang authored
Since Hisilicon's pin controller is divided into two parts. One is the function mux, and the other is pin configuration. These two parts are in the different memory regions. So make pinctrl-single,function-mask as optional property. Then we can define pingroups without valid function mux that is only used for pin configuration. Signed-off-by:
Haojian Zhuang <haojian.zhuang@linaro.org> Acked-by:
Tony Lindgren <tony@atomide.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Haojian Zhuang authored
Since gpio driver could create gpio range in DTS, it could invoke pinctrl_request_gpio(). In the pinctrl-single driver, it needs to configure pins with gpio function mode. A new gpio function range should be created in DTS file in below. pinctrl-single,gpio-range = <phandle pin_offset nr_pins gpio_func>; range: gpio-range { #pinctrl-single,gpio-range-cells = <3>; }; The gpio-ranges property is used in gpio driver and the pinctrl-single,gpio-range property is used in pinctrl-single driver. 1. gpio-ranges is used for gpio driver in below. gpio-ranges = <phandle gpio_offset_in_chip pin_offset nr_pins> gpio-ranges = < &pmx0 0 89 1 &pmx0 1 89 1 &pmx0 2 90 1 &pmx0 3 90 1 &pmx0 4 91 1 &pmx0 5 92 1>; 2. gpio driver could get pin offset from gpio-ranges property. pinctrl-single driver could get gpio function mode from gpio_func that is stored in @gpiofuncs list in struct pcs_device. This new pinctrl-single,gpio-range is used as complement for gpio-ranges property in gpio driver. Signed-off-by:
Haojian Zhuang <haojian.zhuang@linaro.org> Acked-by:
Tony Lindgren <tony@atomide.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Laurent Pinchart authored
The pinconf, pinctrl and pinmux operation structures hold function pointers that are never modified. Declare them as const. Signed-off-by:
Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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- 22 Jan, 2013 1 commit
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Haojian Zhuang authored
This reverts commit 2e8b2eab. Conflicts: drivers/pinctrl/pinctrl-single.c ERROR: "__aeabi_uldivmod" [drivers/pinctrl/pinctrl-single.ko] undefined!] On Fri, Jan 11, 2013 at 4:00 PM, Russell King wrote: > The above error happens in builds including pinctrl-single - the > reason > is this, where resource_size_t may be 64-bit. > > gpio->range.pin_base = (r.start - pcs->res->start) / > mux_bytes; > gpio->range.npins = (r.end - r.start) / mux_bytes + 1; The reason of not fixing this issue and reverting the patch instead is this patch can't handle another case. It's not easy to handle multiple gpios sharing one pin register. So this gpio range feature will be implemented by other patches. Acked-by:
Tony Lindgren <tony@atomide.com> Signed-off-by:
Haojian Zhuang <haojian.zhuang@linaro.org> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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- 03 Jan, 2013 1 commit
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Greg Kroah-Hartman authored
CONFIG_HOTPLUG is going away as an option. As a result, the __dev* markings need to be removed. This change removes the use of __devinit, __devexit_p, __devinitdata, and __devexit from these drivers. Based on patches originally written by Bill Pemberton, but redone by me in order to handle some of the coding style issues better, by hand. Cc: Bill Pemberton <wfp5p@virginia.edu> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Barry Song <baohua.song@csr.com> Cc: Viresh Kumar <viresh.linux@gmail.com> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Cc: Andrew Lunn <andrew@lunn.ch> Signed-off-by:
Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 28 Nov, 2012 3 commits
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Bill Pemberton authored
CONFIG_HOTPLUG is going away as an option so __devexit is no longer needed. Signed-off-by:
Bill Pemberton <wfp5p@virginia.edu> Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Viresh Kumar <viresh.linux@gmail.com> Acked-by:
Linus Walleij <linus.walleij@linaro.org> Signed-off-by:
Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Bill Pemberton authored
CONFIG_HOTPLUG is going away as an option so __devinitdata is no longer needed. Signed-off-by:
Bill Pemberton <wfp5p@virginia.edu> Acked-by:
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Viresh Kumar <viresh.linux@gmail.com> Acked-by:
Linus Walleij <linus.walleij@linaro.org> Signed-off-by:
Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Bill Pemberton authored
CONFIG_HOTPLUG is going away as an option so __devexit_p is no longer needed. Signed-off-by:
Bill Pemberton <wfp5p@virginia.edu> Acked-by:
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by:
Viresh Kumar <viresh.kumar@linaro.org> Acked-by:
Linus Walleij <linus.walleij@linaro.org> Signed-off-by:
Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 23 Nov, 2012 1 commit
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Sachin Kamat authored
*map should be tested for NULL instead of map. Signed-off-by:
Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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- 21 Nov, 2012 1 commit
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Haojian Zhuang authored
Marvell's PXA/MMP silicon also match the behavior of pinctrl-single. Each pin binds to one register. A lot of pins could be configured as gpio. GPIO range is defined as a child node of pinmux in .dtsi file. If those pins are with the same gpio function configuration in the pinmux register, they could be defined in the same GPIO range. For this new child node, two properties are used. reg = <the start of pinmux register in range, size of range> pinctrl-single,gpio: <gpio base in range, the gpio function of the range in the pinmux register> Signed-off-by:
Haojian Zhuang <haojian.zhuang@gmail.com> Acked-by:
Tony Lindgren <tony@atomide.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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- 15 Nov, 2012 1 commit
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Haojian Zhuang authored
Dump pinmux register value, not only function part in the pinmux register. Also fix the issue on caluclating pin offset. The last parameter should be pin number, not register offset. Signed-off-by:
Haojian Zhuang <haojian.zhuang@gmail.com> Acked-by:
Tony Lindgren <tony@atomide.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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- 28 Sep, 2012 1 commit
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Matt Porter authored
Adds support for displaying the individual pin h/w config state. Signed-off-by:
Matt Porter <mporter@ti.com> Acked-by:
Tony Lindgren <tony@atomide.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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- 13 Sep, 2012 1 commit
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Peter Ujfalusi authored
With pinctrl-single,bits it is possible to update just part of the register within the pinctrl-single,function-mask area. This is useful when one register configures mmore than one pin's mux. pinctrl-single,bits takes three parameters: <reg offset, value, sub-mask> Signed-off-by:
Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by:
Tony Lindgren <tony@atomide.com> [Removed a misplaced comment] Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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- 10 Sep, 2012 1 commit
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Peter Ujfalusi authored
Use the pcs->fmask to make sure that the value is not changing (setting) bits in areas where it should not. To avoid situations like this: pmx_dummy: pinmux@4a100040 { compatible = "pinctrl-single"; reg = <0x4a100040 0x0196>; #address-cells = <1>; #size-cells = <0>; pinctrl-single,register-width = <16>; pinctrl-single,function-mask = <0x00ff>; }; &pmx_dummy { pinctrl-names = "default"; pinctrl-0 = <&board_pins>; board_pins: pinmux_board_pins { pinctrl-single,pins = < 0x6c 0xf0f 0x6e 0x10f 0x70 0x23f 0x72 0xa5f >; }; }; Signed-off-by:
Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by:
Tony Lindgren <tony@atomide.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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- 14 Jul, 2012 1 commit
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Tony Lindgren authored
Add one-register-per-pin type device tree based pinctrl driver. This driver has been tested on omap2+ series of processors, where there is either an 8 or 16-bit padconf register for each pin. Support for other similar pinmux controllers can be added. Signed-off-by:
Tony Lindgren <tony@atomide.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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