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  1. 05 Jun, 2017 2 commits
  2. 24 Feb, 2017 3 commits
  3. 16 Dec, 2016 1 commit
  4. 08 Oct, 2016 3 commits
  5. 24 Sep, 2016 1 commit
    • Mika Westerberg's avatar
      ACPI / watchdog: Add support for WDAT hardware watchdog · 058dfc76
      Mika Westerberg authored
      Starting from Intel Skylake the iTCO watchdog timer registers were moved to
      reside in the same register space with SMBus host controller.  Not all
      needed registers are available though and we need to unhide P2SB (Primary
      to Sideband) device briefly to be able to read status of required NO_REBOOT
      bit. The i2c-i801.c SMBus driver used to handle this and creation of the
      iTCO watchdog platform device.
      
      Windows, on the other hand, does not use the iTCO watchdog hardware
      directly even if it is available. Instead it relies on ACPI Watchdog Action
      Table (WDAT) table to describe the watchdog hardware to the OS. This table
      contains necessary information about the the hardware and also set of
      actions which are executed by a driver as needed.
      
      This patch implements a new watchdog driver that takes advantage of the
      ACPI WDAT table. We split the functionality into two parts: first part
      enumerates the WDAT table and if found, populates resources and creates
      platform device for the actual driver. The second part is the driver
      itself.
      
      The reason for the split is that this way we can make the driver itself to
      be a module and loaded automatically if the WDAT table is found. Otherwise
      the module is not loaded.
      Signed-off-by: default avatarMika Westerberg <mika.westerberg@linux.intel.com>
      Reviewed-by: default avatarGuenter Roeck <linux@roeck-us.net>
      Signed-off-by: default avatarRafael J. Wysocki <rafael.j.wysocki@intel.com>
      058dfc76
  6. 17 Jul, 2016 3 commits
  7. 14 May, 2016 1 commit
  8. 13 May, 2016 2 commits
  9. 16 Mar, 2016 1 commit
    • Fu Wei's avatar
      Watchdog: introduce ARM SBSA watchdog driver · 57d2caaa
      Fu Wei authored
      According to Server Base System Architecture (SBSA) specification,
      the SBSA Generic Watchdog has two stage timeouts: the first signal (WS0)
      is for alerting the system by interrupt, the second one (WS1) is a real
      hardware reset.
      More details about the hardware specification of this device:
      ARM DEN0029B - Server Base System Architecture (SBSA)
      
      This driver can operate ARM SBSA Generic Watchdog as a single stage watchdog
      or a two stages watchdog, it's set up by the module parameter "action".
      In the single stage mode, when the timeout is reached, your system
      will be reset by WS1. The first signal (WS0) is ignored.
      In the two stages mode, when the timeout is reached, the first signal (WS0)
      will trigger panic. If the system is getting into trouble and cannot be reset
      by panic or restart properly by the kdump kernel(if supported), then the
      second stage (as long as the first stage) will be reached, system will be
      reset by WS1. This function can help administrator to backup the system
      context info by panic console output or kdump.
      
      This driver bases on linux kernel watchdog framework, so it can get
      timeout from module parameter and FDT at the driver init stage.
      Signed-off-by: default avatarFu Wei <fu.wei@linaro.org>
      Reviewed-by: default avatarGraeme Gregory <graeme.gregory@linaro.org>
      Tested-by: default avatarPratyush Anand <panand@redhat.com>
      Acked-by: default avatarTimur Tabi <timur@codeaurora.org>
      Reviewed-by: default avatarMathieu Poirier <mathieu.poirier@linaro.org>
      Tested-by: default avatarSuravee Suthikulpanit <suravee.suthikulpanit@amd.com>
      Signed-off-by: default avatarGuenter Roeck <linux@roeck-us.net>
      Signed-off-by: default avatarWim Van Sebroeck <wim@iguana.be>
      57d2caaa
  10. 01 Mar, 2016 2 commits
  11. 07 Feb, 2016 1 commit
  12. 31 Jan, 2016 1 commit
  13. 09 Jan, 2016 1 commit
  14. 28 Dec, 2015 5 commits
  15. 27 Oct, 2015 1 commit
  16. 09 Sep, 2015 2 commits
    • Wenyou Yang's avatar
      watchdog: add a driver to support SAMA5D4 watchdog timer · 76534860
      Wenyou Yang authored
      From SAMA5D4, the watchdog timer is upgrated with a new feature,
      which is describled as in the datasheet, "WDT_MR can be written
      until a LOCKMR command is issued in WDT_CR".
      That is to say, as long as the bootstrap and u-boot don't issue
      a LOCKMR command, WDT_MR can be written more than once in the driver.
      
      So the SAMA5D4 watchdog driver's implementation is different from
      the at91sam9260 watchdog driver implemented in file at91sam9_wdt.c.
      The user application open the device file to enable the watchdog timer
      hardware, and close to disable it, and set the watchdog timer timeout
      by seting WDV and WDD fields of WDT_MR register, and ping the watchdog
      by issuing WDRSTT command to WDT_CR register with hard-coded key.
      Signed-off-by: default avatarWenyou Yang <wenyou.yang@atmel.com>
      Reviewed-by: default avatarGuenter Roeck <linux@roeck-us.net>
      Signed-off-by: default avatarWim Van Sebroeck <wim@iguana.be>
      76534860
    • Ariel D'Alessandro's avatar
      watchdog: NXP LPC18xx Watchdog Timer Driver · 7c25f8c9
      Ariel D'Alessandro authored
      This commit adds support for the watchdog timer found in NXP LPC SoCs
      family, which includes LPC18xx/LPC43xx. Other SoCs in that family may
      share the same watchdog hardware.
      
      Watchdog driver registers a restart handler that will restart the system
      by performing an incorrect feed after ensuring the watchdog is enabled in
      reset mode.
      
      As watchdog cannot be disabled in hardware, driver's stop routine will
      regularly send a keepalive ping using a timer.
      Signed-off-by: default avatarAriel D'Alessandro <ariel@vanguardiasur.com.ar>
      Reviewed-by: default avatarGuenter Roeck <linux@roeck-us.net>
      Signed-off-by: default avatarWim Van Sebroeck <wim@iguana.be>
      7c25f8c9
  17. 22 Jun, 2015 3 commits
  18. 30 Apr, 2015 1 commit
  19. 17 Feb, 2015 2 commits
  20. 20 Oct, 2014 4 commits