1. 22 May, 2020 4 commits
  2. 20 May, 2020 9 commits
  3. 15 May, 2020 6 commits
  4. 13 May, 2020 5 commits
  5. 12 May, 2020 8 commits
  6. 11 May, 2020 4 commits
  7. 08 May, 2020 4 commits
    • Dmitry Osipenko's avatar
      i2c: tegra: Synchronize DMA before termination · a70ff656
      Dmitry Osipenko authored
      DMA transfer could be completed, but CPU (which handles DMA interrupt)
      may get too busy and can't handle the interrupt in a timely manner,
      despite of DMA IRQ being raised. In this case the DMA state needs to
      synchronized before terminating DMA transfer in order not to miss the
      DMA transfer completion.
      Signed-off-by: default avatarDmitry Osipenko <digetx@gmail.com>
      Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
      a70ff656
    • Dmitry Osipenko's avatar
      i2c: tegra: Better handle case where CPU0 is busy for a long time · 566c05f7
      Dmitry Osipenko authored
      Boot CPU0 always handle I2C interrupt and under some rare circumstances
      (like running KASAN + NFS root) it may stuck in uninterruptible state for
      a significant time. In this case we will get timeout if I2C transfer is
      running on a sibling CPU, despite of IRQ being raised. In order to handle
      this rare condition, the IRQ status needs to be checked after completion
      timeout.
      Signed-off-by: default avatarDmitry Osipenko <digetx@gmail.com>
      Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
      566c05f7
    • Thierry Reding's avatar
      i2c: tegra: Keep IRQs enabled during suspend/resume · 26ca88aa
      Thierry Reding authored
      One of the I2C controllers on Tegra SoCs is typically connected to a
      system PMIC, which provides controls for critical power supplies for
      most platforms.
      
      Some drivers, such as PCI, need to disable these regulators during a
      very late stage during suspend and resume them at a very early stage
      during resume.
      
      To support these use-cases, keep interrupts disabled during suspend/
      resume.
      Suggested-by: default avatarDmitry Osipenko <digetx@gmail.com>
      Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
      26ca88aa
    • Thierry Reding's avatar
      i2c: tegra: Restore pinmux on system resume · 44c99904
      Thierry Reding authored
      Depending on the board design, the I2C controllers found on Tegra SoCs
      may require pinmuxing in order to function. This is done as part of the
      driver's runtime suspend/resume operations. However, the PM core does
      not allow devices to go into runtime suspend during system sleep to
      avoid potential races with the suspend/resume of their parents.
      
      As a result of this, when Tegra SoCs resume from system suspend, their
      I2C controllers may have lost the pinmux state in hardware, whereas the
      pinctrl subsystem is not aware of this. To fix this, make sure that if
      the I2C controller is not runtime suspended, the runtime suspend code is
      still executed in order to disable the module clock (which we don't need
      to be enabled during sleep) and set the pinmux to the idle state.
      
      Conversely, make sure that the I2C controller is properly resumed when
      waking up from sleep so that pinmux settings are properly restored.
      
      This fixes a bug seen with DDC transactions to an HDMI monitor timing
      out when resuming from system suspend.
      Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
      44c99904