- 30 Mar, 2017 40 commits
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Xiangliang Yu authored
Init kiq via cpu mmio and init kcq through kiq. Signed-off-by:
Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by:
Monk Liu <Monk.Liu@amd.com> Reviewed-by:
Alex Deucher <alexander.deucher@amd.com> Acked-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
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Xiangliang Yu authored
Fullfill KIQ irq funcs to support kiq interrupt. v2: squash in adding interrupt src Signed-off-by:
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Xiangliang Yu authored
Fullfill kiq funcs to support kiq ring. v2: squash in 64bit ptr fix Signed-off-by:
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Xiangliang Yu authored
Allocate KIQ ring in sw_init for gfx9. Signed-off-by:
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Xiangliang Yu authored
Read vega10 hw register to detect if sriov is enabled, and call it before IP blocks setting. Signed-off-by:
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Monk Liu authored
Required for SR-IOV. Signed-off-by:
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Junwei Zhang authored
v2: add AMD_EXP_HW_SUPPORT for now Signed-off-by:
Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by:
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Ken Wang authored
Acked-by:
Ken Wang <Qingqing.Wang@amd.com> Signed-off-by:
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Ken Wang authored
Add soc15 support and enable all the IPs for vega10. v2: squash in xclk fix v3: disable HDP MGCG Acked-by:
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Eric Huang authored
Adds power management support for vega10. v2: squash in fan control and led config fixes from Rex v3: squash in dead code removal and socvid fixes from Rex v4: squash in dpm force level fix from Rex v5: squash in latest headless, gpu load fixes from Rex Acked-by:
Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by:
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Eric Huang authored
New interfaces needed to handle the new clock trees and bandwidth requirements on vega10. Acked-by:
Tony Cheng <tony.cheng@amd.com> Acked-by:
Harry Wentland <harry.wentland@amd.com> Signed-off-by:
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Eric Huang authored
Acked-by:
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Eric Huang authored
Acked-by:
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Rex Zhu authored
Acked-by:
Rex Zhu <Rex.Zhu@amd.com> Reviewed-by:
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Eric Huang authored
New helpers for fetching info out of atomfirmware. Acked-by:
Ken Wang <Ken.Wang@amd.com> Signed-off-by:
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Eric Huang authored
Acked-by:
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Eric Huang authored
Acked-by:
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Huang Rui authored
Acked-by:
Huang Rui <ray.huang@amd.com> Reviewed-by:
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Huang Rui authored
Acked-by:
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Huang Rui authored
PSP is responsible for firmware loading on SOC-15 asics. v2: fix memory leak (Ken) Acked-by:
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Leo Liu authored
Signed-off-by:
Leo Liu <leo.liu@amd.com> Reviewed-by:
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Leo Liu authored
Acked-by:
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Ken Wang authored
Acked-by:
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Ken Wang authored
Add support for gfx v9.0. v2: update golden settings from Ken Acked-by:
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Ken Wang authored
v2: fix Makefile Signed-off-by:
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Alex Xie authored
On SOC-15 parts, the GMC (Graphics Memory Controller) consists of two hubs: GFX (graphics and compute) and MM (sdma, uvd, vce). v2: drop sdma from Makefile, fix duplicate return statement. Signed-off-by:
Alex Xie <AlexBin.Xie@amd.com> Reviewed-by:
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Junwei Zhang authored
This handles nbio 6.1 specific implementations which are used by various other IPs. Acked-by:
Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by:
Tom St Denis <tom.stdenis@amd.com> Signed-off-by:
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Alex Xie authored
Reviewed-by:
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Alex Xie authored
Reviewed-by:
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Alex Deucher authored
Flags need to be 0 to be considered invalid. Reviewed-by:
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Huang Rui authored
Defines the header info for the psp firmware. Acked-by:
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Huang Rui authored
Handle ucode differences in vega10. Acked-by:
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Marek Olšák authored
Signed-off-by:
Marek Olšák <marek.olsak@amd.com> Acked-by:
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Alex Deucher authored
v2: Marek: allow shifts >32 in AMDGPU_TILING_SET/GET Acked-by:
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Alex Deucher authored
Acked-by:
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Alex Deucher authored
NGG (Next Generation Graphics) is a new feature in GFX9.0. This adds the relevant parameters. Acked-by:
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Alex Deucher authored
New on SOC-15 asics. Signed-off-by: -
Christian König authored
This allows us to grab IVs without spamming the log. Signed-off-by:
Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by:
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Alex Deucher authored
Reflect the new format on soc-15 asics. Reviewed-by:
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Alex Deucher authored
If the board is atomfirmware based. Acked-by:
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