- 23 Aug, 2013 11 commits
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Tomasz Figa authored
Calling pinctrl_register() means that the driver is fully initialized and might accept pinmux/pinconf requests, so pin groups must be parsed before. This patch fixes this problem by moving device tree parsing before call to pinctrl_register(). In addition, this fixes support for hogs on pin controllers handled by pinctrl-samsung driver. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Mark Brown authored
The device family is called Palmas so there should be a 's' on the end of the name. Signed-off-by: Mark Brown <broonie@linaro.org> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Axel Lin authored
The symbol SPEAr310_pinctrl_of_match does not exist at all. Fix it. We didn't hit the compile error because this driver can only be built-in now. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Maxime Ripard authored
The Allwinner A20 is pin-compatible with the older A10, so the two pin set are quite similar. However, since the A20 has new features, we can't just use the A10 pin set as is, and we need to define our own for the A20. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Maxime Ripard authored
The Allwinner A31 SoC uses the same IP than the one found in the A10/A13, with only different pins. Add the pins and the associated functions found in the A31. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Maxime Ripard authored
Some pin functions in the array were not indented like the other functions in this array. Fix this. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Axel Lin authored
The implementation in pinctrl_register_one_pin() ensures pindesc->name is always not NULL before insert the pindesc to radix tree. If the desc return from pin_desc_get is not NULL, desc->name is always not NULL. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Axel Lin authored
pinctrl_register() returns NULL on error, fix it. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Axel Lin authored
Hold pctldev->mutex mutex_lock when traverse the list. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Axel Lin authored
This one is missed in commit 44d5f7bb "pinctrl: sink pinctrldev_list_mutex". Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Qipan Li authored
the old codes defined uart0_nostreamctrl_pins, but missed pingroup and padmux definition for it. this patch fixes it. Signed-off-by: Qipan Li <Qipan.Li@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 16 Aug, 2013 1 commit
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Sascha Hauer authored
The i.MX pinctrl driver uses 5 different arrays for storing the informations for pins. This requires five allocations. Instead, use a struct type which is more cache friendly, readable and requires less allocations. One array of integers is still needed since the pinctrl framework forces us to maintain it. This also adds checks whether the allocations are succesful which were missing. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 15 Aug, 2013 8 commits
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Sascha Hauer authored
When parsing a function fails this is no reason to make the whole driver fail. Just continue with the next function. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Sascha Hauer authored
The i.MX pinctrl driver completely bails out when it detects an error in the pinctrl nodes. This usually means that whatever error a devicetree has the user is left blind because even the console cannot be initialized without working pinmux. Instead of bailing out completely, just continue probing. This makes the pinctrl driver work, only the erroneous groups will fail later during pin request time. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Sascha Hauer authored
Instead of crashing the kernel print an error message when the fsl,pins property is missing. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Sascha Hauer authored
When printing error messages about errors in the devicetree also print the offending node to give the use a hint what might be wrong. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Julia Lawall authored
Remove unneeded error handling on the result of a call to platform_get_resource when the value is passed to devm_ioremap_resource. Move the call to platform_get_resource adjacent to the call to devm_ioremap_resource to make the connection between them more clear. A simplified version of the semantic patch that makes this change is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression pdev,res,n,e,e1; expression ret != 0; identifier l; @@ - res = platform_get_resource(pdev, IORESOURCE_MEM, n); ... when != res - if (res == NULL) { ... \(goto l;\|return ret;\) } ... when != res + res = platform_get_resource(pdev, IORESOURCE_MEM, n); e = devm_ioremap_resource(e1, res); // </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
Commit e81c8f18 "pinctrl: pinconf-generic: add generic APIs for mapping pinctrl node" Added function prototypes with implicit dependencies on other header files causing build warnings like this: In file included from arch/arm/mach-ux500/board-mop500-pins.c:12:0: include/linux/pinctrl/pinconf-generic.h:142:3: warning: 'struct device_node' declared inside parameter list [enabled by default] unsigned *reserved_maps, unsigned *num_maps); ^ include/linux/pinctrl/pinconf-generic.h:142:3: warning: its scope is only this definition or declaration, which is probably not what you want [enabled by default] include/linux/pinctrl/pinconf-generic.h:142:3: warning: 'struct pinctrl_dev' declared inside parameter list [enabled by default] include/linux/pinctrl/pinconf-generic.h:145:3: warning: 'struct device_node' declared inside parameter list [enabled by default] unsigned *num_maps); ^ Let's just add ifdefs for non-DT systems (the actual code is already ifdefed) and #include <linux/device.h> to get the most important structs and forward-declare the pinctrl core structs. Reported-by: Olof Johansson <olof@lixom.net> Cc: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
The irq flags variable gets a warning like this after commit bf4dae5c "pinctrl: nomadik: delete ancient pin control API": In file included from include/linux/seqlock.h:29:0, from include/linux/time.h:5, from include/linux/stat.h:18, from include/linux/module.h:10, from drivers/pinctrl/pinctrl-nomadik.c:14: drivers/pinctrl/pinctrl-nomadik.c: In function 'nmk_pmx_enable': include/linux/spinlock.h:348:122: warning: 'flags' may be used uninitialized in this function [-Wmaybe-uninitialized] raw_spin_unlock_irqrestore(&lock->rlock, flags); ^ drivers/pinctrl/pinctrl-nomadik.c:1515:16: note: 'flags' was declared here unsigned long flags; The function is question was never changed but it appears the semantic checker could previously determine that the code path that would use the flags was going to either use it or not, but now it can't for some reason. Just fix it up. Reported-by: Olof Johansson <olof@lixom.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Stephen Warren authored
This change makes documentation of the the gpio-ranges property shorter and more succinct, more consistent with the style of the rest of the document, and not mention Linux-specifics such as the API pinctrl_request_gpio(); DT binding documents should be OS independant where at all possible. As part of this, the gpio-ranges property's format is described in BNF form, in order to match the rest of the document. This change also deprecates the #gpio-range-cells property. Such properties are useful when one node references a second node, and that second node dictates the format of the reference. However, that is not the case here; the definition of gpio-ranges itself always dictates its format entirely, and hence the value #gpio-range-cells must always be 3, and hence there is no point requiring any referenced node to include this property. The only remaining need for this property is to ensure compatibility of DTs with older SW that was written to support the previous version of the binding. v4: * Mention #gpio-range-cells as being deprecated, rather than removing all documentation of that property. This allows DTs to be written in a backwards-compatible way if desired, and also allows older DTs to be interpreted fully using the latest documentation. v3: * Mention BNF in commit description. * Fixed typo. * Dropped patch that removed the deprecated property from *.dts, since it's required to boot older kernels. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 14 Aug, 2013 11 commits
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John Crispin authored
We found out how to set the gphy led pinmuxing. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Thomas Langer authored
The pps pin definition is missing in the current code. Signed-off-by: Thomas Langer <thomas.langer@lantiq.com> Acked-by: John Crispin <blogic@openwrt.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Joe Perches authored
commit 3370dc91 ("pinctrl:sirf:re-arch and add support for new SiRFatlas6 SoC") moved the files, update the patterns. Signed-off-by: Joe Perches <joe@perches.com> Acked-by: Barry Song <21cnbao@gmail.com> cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Sachin Kamat authored
__initdata should be placed between the variable name and equal sign for the variable to be placed in the intended section. Fix the examples. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Laurent Pinchart authored
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Laurent Pinchart authored
Name the DU clock input 1 consistently with clock inputs 0 and 2. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
Print out the affected group name on activation of pin mux settings, and warn if you cannot free a pin that should have been part of a certain setting. ChangeLog v1->v2: - Also print the pin name in the error messages. Cc: Sonic Zhang <sonic.zhang@analog.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Laxman Dewangan authored
TI Palmas series Power Management IC have multiple pins which can be configured for different functionality. This pins can be configured for different function. Also their properties like pull up/down, open drain enable/disable are configurable. Add support for pincontrol driver Palmas series device like TPS65913, TPS80036. The driver supports to be register from DT only. Changes from V1: - Add generic property for pins and functions in pinconf-generic. - Add APIs to map the DT and subnode. - Move common utils APIs to the pinctrl-utils from this file. - Update the binding document accordingly. Changes from V2: - Add ack by Lee. - Correct the binding docs. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Acked-by: Lee Jones <lee.jones@linaro.org> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Laxman Dewangan authored
Add generic APIs to map the DT node and its sub node in pinconf generic driver. These APIs can be used from driver to parse the DT node who uses the pinconf generic APIs for defining their nodes. Changes from V1: - Add generic property for pins and functions in pinconf-generic. - Add APIs to map the DT and subnode. - Move common utils APIs to the pinctrl-utils from this file. - Update the binding document accordingly. Changes from V2: - Rebased the pinctrl binding doc on top of Stephen's cleanup. - Rename properties "pinctrl-pins" and "pinctrl-function" to "pins" and "function". Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Laxman Dewangan authored
Some of pincontrol driver needs the utility function to create map list. The utility function needed for adding mux, configs etc. In place of duplicating this in each driver, add the common utility function in common file and use from device specific driver. This will reduce the duplicating of code across drivers. Changes from V1: - Add this files in this patch and add common utility APIs to here. Changes from V2: - Nothing in code. - Added Reviewed by Stephen. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Sonic Zhang authored
One peripheral may share part of its pins with the 2nd peripheral and the other pins with the 3rd. If it requests all pins when part of them has already be requested and owned by the 2nd peripheral, this request fails and pinmux_disable_setting() is called. The pinmux_disable_setting() frees all pins of the first peripheral without checking if the pin is owned by itself or the 2nd, which results in the malfunction of the 2nd peripheral driver. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 07 Aug, 2013 9 commits
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Linus Walleij authored
The pin control subsystem was created to do away with custom pin control APIs such as this one. It was kept for backward-compatibility but is completely unused in the current kernel, so let's delete it. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Stephen Warren authored
pinctrl bindings can benefit from generic property names that define which pins a "pin configuration node" affects, and which mux function to select onto those pins. Document new properties for this purpose so that other bindings may refer to them. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Jingoo Han authored
Added missing __iomem annotation in order to fix the following sparse warnings: drivers/pinctrl/sirf/pinctrl-sirf.c:846:14: warning: incorrect type in assignment (different address spaces) drivers/pinctrl/sirf/pinctrl-sirf.c:846:14: expected void *regs drivers/pinctrl/sirf/pinctrl-sirf.c:846:14: got void [noderef] <asn:2>* drivers/pinctrl/sirf/pinctrl-sirf.c:869:33: warning: incorrect type in assignment (different address spaces) drivers/pinctrl/sirf/pinctrl-sirf.c:869:33: expected void [noderef] <asn:2>*regs drivers/pinctrl/sirf/pinctrl-sirf.c:869:33: got void *regs drivers/pinctrl/sirf/pinctrl-sirf.c:909:17: warning: incorrect type in argument 1 (different address spaces) drivers/pinctrl/sirf/pinctrl-sirf.c:909:17: expected void volatile [noderef] <asn:2>*addr drivers/pinctrl/sirf/pinctrl-sirf.c:909:17: got void *regs Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Jingoo Han authored
Fix the following sparse warning: drivers/pinctrl/pinconf.c:521:20: error: incompatible types in comparison expression (different type sizes) Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Stephen Warren authored
Reword the section of pinctrl-bindings.txt that describes generic properties that pinctrl bindings may use. The aim is to make the text clearer, and more explicitly call out the responsibility of individual bindings that use the generic properties to define which of the properties are used, and how. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Boris BREZILLON authored
The current implementation handle both edge and level interrupts with the 'handle_simple_irq' handler. Level interrupts are active as long as the pin stays at the configured level (low or high). In this case we have to use 'handle_level_irq' which mask the interrupt until the handle has treated it. Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com> Tested-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Sachin Kamat authored
Symbols used only in this file are made static. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Acked-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Sachin Kamat authored
devm_request_and_ioremap is deprecated. Use devm_ioremap_resource instead. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Acked-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Shawn Guo authored
The select input for some pin may not be implemented using the regular select input register but the general purpose register. A real example is that imx6q designers found the select input for USB OTG ID pin is missing at the very late stage, and can not add a new select input register but have to use a general purpose register bit to implement it. The patch adds a workaround for such select input quirk by interpreting the input_val cell of pin function ID in a different way, so that all the info that needed for setting up select input bits in general purpose register could be decoded from there. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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