- 04 Sep, 2013 3 commits
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Joel Fernandes authored
Process SG-elements in batches of MAX_NR_SG if they are greater than MAX_NR_SG. Due to this, at any given time only those many slots will be used in the given channel no matter how long the scatter list is. We keep track of how much has been written inorder to process the next batch of elements in the scatter-list and detect completion. For such intermediate transfer completions (one batch of MAX_NR_SG), make use of pause and resume functions instead of start and stop when such intermediate transfer is in progress or completed as we donot want to clear any pending events. Signed-off-by: Joel Fernandes <joelf@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Joel Fernandes authored
Changes are made here for configuring existing parameters to support DMA'ing them out in batches as needed. Also allocate as many as slots as needed by the SG list, but not more than MAX_NR_SG. Then these slots will be reused accordingly. For ex, if MAX_NR_SG=10, and number of SG entries is 40, still only 10 slots will be allocated to DMA the entire SG list of size 40. Also enable TC interrupts for slots that are a last in a current iteration, or that fall on a MAX_NR_SG boundary. Signed-off-by: Joel Fernandes <joelf@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Vinod Koul authored
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- 03 Sep, 2013 1 commit
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Vinod Koul authored
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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- 02 Sep, 2013 21 commits
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Vinod Koul authored
As pointed by Russell in [1], the sg properties are already availble in struct device, so no need to duplicate here. [1]: http://marc.info/?l=linux-omap&m=137416733628831Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Vinod Koul authored
Conflicts: drivers/dma/sh/Kconfig drivers/dma/sh/shdmac.c Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Vinod Koul authored
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Vinod Koul authored
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Julia Lawall authored
Use devm_ioremap_resource instead of devm_request_and_ioremap. This was done using the semantic patch scripts/coccinelle/api/devm_ioremap_resource.cocci The relevant call to platform_get_resource was manually moved down to the call to devm_ioremap_resource. Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Sachin Kamat authored
kcalloc can return NULL. Check the pointer before dereferencing. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Sachin Kamat authored
'const' was added twice. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Sachin Kamat authored
kfree on a NULL pointer is a no-op. Null pointer check is not necessary. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Daniel Mack authored
Trivial fix for function name mismatches I stumbled over. Signed-off-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Max Filippov authored
Add support for HPB-DMAC found in Renesas R-Car SoCs, using 'shdma-base' DMA driver framework. Based on the original patch by Phil Edworthy <phil.edworthy@renesas.com>. Signed-off-by: Max Filippov <max.filippov@cogentembedded.com> [Sergei: removed useless #include, sorted #include's, fixed HPB_DMA_TCR_MAX, fixed formats and removed line breaks in the dev_dbg() calls, rephrased and added IRQ # to the shdma_request_irq() failure message, added MODULE_AUTHOR(), removed '__init'/'__exit' annotations from the probe()/remove() methods, removed '__initdata' annotation from 'hpb_dmae_driver', fixed guard macro name in the header file, fixed #define ASYNCRSTR_ASRST20, added #define ASYNCRSTR_ASRST24, added the necessary runtime PM calls to the probe() and remove() methods, handled errors returned by dma_async_device_register(), beautified comments and #define's.] Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Jingoo Han authored
Use devm_ioremap_resource() because devm_request_and_ioremap() is obsoleted by devm_ioremap_resource(). Signed-off-by: Jingoo Han <jg1.han@samsung.com> Acked-by: Zhangfei Gao <zhangfei.gao@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Fabio Estevam authored
Sparse report the following warnings: drivers/dma/imx-sdma.c:330:25: warning: symbol 'sdma_imx31' was not declared. Should it be static? drivers/dma/imx-sdma.c:351:25: warning: symbol 'sdma_imx25' was not declared. Should it be static? drivers/dma/imx-sdma.c:357:25: warning: symbol 'sdma_imx35' was not declared. Should it be static? drivers/dma/imx-sdma.c:375:25: warning: symbol 'sdma_imx51' was not declared. Should it be static? drivers/dma/imx-sdma.c:395:25: warning: symbol 'sdma_imx53' was not declared. Should it be static? drivers/dma/imx-sdma.c:414:25: warning: symbol 'sdma_imx6q' was not declared. Should it be static? Make the sdma_driver_data structures static. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Ben Hutchings authored
pch_dma currently isn't auto-loaded if built as a module. Signed-off-by: Ben Hutchings <ben@decadent.org.uk> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Alban Bedel authored
Many audio interface drivers require support of cyclic transfers to work correctly, for example Samsung ASoC DMA driver. This patch adds support for cyclic transfers to the amba-pl08x driver. Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de> [tfiga: Rebase and slightly beautify the original patch.] Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Alban Bedel authored
There are more fields than just SWIDTH in CH_CONTROL register, so read register value must be masked in addition to shifting. Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de> Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Tomasz Figa authored
PL080S has separate register to store transfer size in, allowing single transfer to be much larger than in standard PL080. This patch makes the amba-pl08x driver aware of this and removes writing transfer size to reserved bits of CH_CONTROL register on PL080S, which was not a problem witn transfer sizes fitting the original bitfield of PL080, but now would overwrite other fields. Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Tomasz Figa authored
PL080S is a modified version of PL080 that can be found on Samsung SoCs, such as S3C6400 and S3C6410. It has different offset of CONFIG register, separate CONTROL1 register that holds transfer size and larger maximum transfer size. Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Tomasz Figa authored
This patch refactors debugging code that dumps LLI entries by moving it into separate function, which is stubbed when VERBOSE_DEBUG is not selected. This allows us to get rid of the ugly ifdef from the body of pl08x_fill_llis_for_desc(). No functional change is introduced by this patch. Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Tomasz Figa authored
Currently memory allocated for LLIs is casted to an array of structs, which is fragile and also limits the driver to a single, predefined LLI layout, while there are some variants of PL08x, which have more fields in LLI (namely PL080S with its extra CCTL2). This patch makes LLIs a sequence of 32-bit words, which is just filled with appropriate values in appropriate order and padded with required amount of dummy words (currently zero, but PL080S will make better use of this). Suggested-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Tomasz Figa authored
Some variants of PL08x (namely PL080S, found in Samsung S3C64xx SoCs) have CONFIG register at different offset. This patch makes the driver use offset from vendor data struct. Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Tomasz Figa authored
Further patch will introduce support for PL080S, which requires some things to be done conditionally, thus increasing indentation level of some functions even more. This patch reduces indentation level of pl08x_getbytes_chan() function by inverting several conditions and returning from function wherever possible. Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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- 28 Aug, 2013 2 commits
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Lars-Peter Clausen authored
The pl330 DMA driver is broken in regard to handling a terminate all request while it is processing the list of completed descriptors. This is most visible when calling dmaengine_terminate_all() from within the descriptors callback for cyclic transfers. In this case the TERMINATE_ALL transfer will clear the work_list and stop the transfer. But after all callbacks for all completed descriptors have been handled the descriptors will be re-enqueued into the (now empty) work_list. So the next time dma_async_issue_pending() is called for the channel these descriptors will be transferred again which will cause data corruption. Similar issues can occur if dmaengine_terminate_all() is not called from within the descriptor callback but runs on a different CPU at the same time as the completed descriptor list is processed. This patch introduces a new per channel list which will hold the completed descriptors. While processing the list the channel's lock will be held to avoid racing against dmaengine_terminate_all(). The lock will be released when calling the descriptors callback though. Since the list of completed descriptors might be modified (e.g. by calling dmaengine_terminate_all() from the callback) we can not use the normal list iterator macros. Instead we'll need to check for each loop iteration again if there are still items in the list. The drivers TERMINATE_ALL implementation is updated to move descriptors from both the work_list as well the new completed_list back to the descriptor pool. This makes sure that none of the descripts finds its way back into the work list and also that we do not call any futher complete callbacks after dmaengine_terminate_all() has been called. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Zhangfei Gao authored
Add dmaengine driver for hisilicon k3 platform based on virt_dma Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org> Tested-by: Kai Yang <jean.yangkai@huawei.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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- 27 Aug, 2013 10 commits
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Guennadi Liakhovetski authored
A bad merge resulted in a left-over free_irq() call. This patch removes it. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Jingoo Han authored
The driver core clears the driver data to NULL after device_release or on probe failure. Thus, it is not needed to manually clear the device driver data to NULL. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Acked-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Guennadi Liakhovetski authored
This configuration data will be used, when DMAC DT support is added to r8a73a4. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Guennadi Liakhovetski authored
All shdma DMACs on ARM SoCs share certain register layout patterns, which are currently defined in arch/arm/mach-shmobile/include/mach/dma-register.h. That header is included by SoC-specific setup-*.c files to be used in DMAC platform data. That header, however, cannot be directly used by the driver. This patch copies those defines into a driver-local header to be used by Device Tree configurations. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Guennadi Liakhovetski authored
Macros, named like TEND or SAR lack a namespace and are too broadly named for a global header. Besides, they aren't needed globally. Move them to where they belong - into the driver. Some other macros aren't used at all, remove them. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Guennadi Liakhovetski authored
This facilitates DMAC DT support by eliminating the need in AUXDATA and avoiding creating complex DT data. This also fits well with DMAC devices, of which SoCs often have multiple identical copies and it is perfectly valid to use a single configuration data set for all of them. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Guennadi Liakhovetski authored
Platform data shouldn't be changed at run-time, so, pointers to it should be const. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Guennadi Liakhovetski authored
Fix the following compiler warning: drivers/dma/sh/sudmac.c: In function 'sudmac_chan_remove': drivers/dma/sh/sudmac.c:302: warning: unused variable 'sc' Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Guennadi Liakhovetski authored
Switch shdma to using devm_* managed functions for allocation of memory, requesting IRQs, mapping IO resources etc. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Guennadi Liakhovetski authored
On newer r-car SoCs the CHCLR register only contains one bit per channel, to which a 1 has to be written to reset the channel. Older SoC versions had one CHCLR register per channel, to which a 0 must be written to reset the channel and clear its buffers. This patch adds support for the newer layout. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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- 26 Aug, 2013 3 commits
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Sascha Hauer authored
Now that the sdma driver holds the address tables for i.MX25/5 they are no longer needed in platform_data. Remove them. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Sascha Hauer authored
This adds the ROM script addresses for i.MX25, i.MX5x and i.MX6 to the SDMA driver needed for the driver to work without additional firmware. The ROM script addresses are SoC specific and in some cases even tapeout specific. This patch adds the ROM script addresses only for SoCs which do not have a tapeout specific SDMA ROM, because currently it's unclear how this case should be handled. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Sascha Hauer authored
Use a struct type instead of an enum type for distinguishing between different versions. This makes it simpler to handle multiple differences without cluttering the code with comparisons for certain devtypes. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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