1. 04 Sep, 2013 3 commits
    • Joel Fernandes's avatar
      dma: edma: Write out and handle MAX_NR_SG at a given time · 53407062
      Joel Fernandes authored
      Process SG-elements in batches of MAX_NR_SG if they are greater
      than MAX_NR_SG. Due to this, at any given time only those many
      slots will be used in the given channel no matter how long the
      scatter list is. We keep track of how much has been written
      inorder to process the next batch of elements in the scatter-list
      and detect completion.
      
      For such intermediate transfer completions (one batch of MAX_NR_SG),
      make use of pause and resume functions instead of start and stop
      when such intermediate transfer is in progress or completed as we
      donot want to clear any pending events.
      Signed-off-by: default avatarJoel Fernandes <joelf@ti.com>
      Signed-off-by: default avatarVinod Koul <vinod.koul@intel.com>
      53407062
    • Joel Fernandes's avatar
      dma: edma: Setup parameters to DMA MAX_NR_SG at a time · 6fbe24da
      Joel Fernandes authored
      Changes are made here for configuring existing parameters to support
      DMA'ing them out in batches as needed.
      
      Also allocate as many as slots as needed by the SG list, but not more
      than MAX_NR_SG. Then these slots will be reused accordingly.
      For ex, if MAX_NR_SG=10, and number of SG entries is 40, still only
      10 slots will be allocated to DMA the entire SG list of size 40.
      
      Also enable TC interrupts for slots that are a last in a current
      iteration, or that fall on a MAX_NR_SG boundary.
      Signed-off-by: default avatarJoel Fernandes <joelf@ti.com>
      Signed-off-by: default avatarVinod Koul <vinod.koul@intel.com>
      6fbe24da
    • Vinod Koul's avatar
      Merge branch 'topic/api_caps' into for-linus · bd127639
      Vinod Koul authored
      bd127639
  2. 03 Sep, 2013 1 commit
  3. 02 Sep, 2013 21 commits
  4. 28 Aug, 2013 2 commits
    • Lars-Peter Clausen's avatar
      dma: pl330: Fix handling of TERMINATE_ALL while processing completed descriptors · 39ff8613
      Lars-Peter Clausen authored
      The pl330 DMA driver is broken in regard to handling a terminate all request
      while it is processing the list of completed descriptors. This is most visible
      when calling dmaengine_terminate_all() from within the descriptors callback for
      cyclic transfers. In this case the TERMINATE_ALL transfer will clear the
      work_list and stop the transfer. But after all callbacks for all completed
      descriptors have been handled the descriptors will be re-enqueued into the (now
      empty) work_list. So the next time dma_async_issue_pending() is called for the
      channel these descriptors will be transferred again which will cause data
      corruption. Similar issues can occur if dmaengine_terminate_all() is not called
      from within the descriptor callback but runs on a different CPU at the same time
      as the completed descriptor list is processed.
      
      This patch introduces a new per channel list which will hold the completed
      descriptors. While processing the list the channel's lock will be held to avoid
      racing against dmaengine_terminate_all(). The lock will be released when calling
      the descriptors callback though. Since the list of completed descriptors might
      be modified (e.g. by calling dmaengine_terminate_all() from the callback) we can
      not use the normal list iterator macros. Instead we'll need to check for each
      loop iteration again if there are still items in the list. The drivers
      TERMINATE_ALL implementation is updated to move descriptors from both the
      work_list as well the new completed_list back to the descriptor pool. This makes
      sure that none of the descripts finds its way back into the work list and also
      that we do not call any futher complete callbacks after
      dmaengine_terminate_all() has been called.
      Signed-off-by: default avatarLars-Peter Clausen <lars@metafoo.de>
      Signed-off-by: default avatarVinod Koul <vinod.koul@intel.com>
      39ff8613
    • Zhangfei Gao's avatar
      dmaengine: Add hisilicon k3 DMA engine driver · 8e6152bc
      Zhangfei Gao authored
      Add dmaengine driver for hisilicon k3 platform based on virt_dma
      Signed-off-by: default avatarZhangfei Gao <zhangfei.gao@linaro.org>
      Tested-by: default avatarKai Yang <jean.yangkai@huawei.com>
      Acked-by: default avatarArnd Bergmann <arnd@arndb.de>
      Signed-off-by: default avatarVinod Koul <vinod.koul@intel.com>
      8e6152bc
  5. 27 Aug, 2013 10 commits
  6. 26 Aug, 2013 3 commits