Read the HW PG version of the 18xx chip from FUSE.

Based on an earlier patch by Luciano Coelho <coelho@ti.com>.
Signed-off-by: Arik Nemtsov <arik@wizery.com>
Signed-off-by: Luciano Coelho <coelho@ti.com>

Only wl12xx needs to get the ref_clock anc tcxo_clock values from the
platform data.  Move these elements from the wl1271 structure to
wl12xx's private data.
Signed-off-by: Luciano Coelho <coelho@ti.com>
Signed-off-by: Arik Nemtsov <arik@wizery.com>

The wl12xx.h file now contains mostly definitions that are internal to
wlcore.  Still, some things need to me moved to the public header, so
for now we keep including it in wlcore.h.
Signed-off-by: Luciano Coelho <coelho@ti.com>
Signed-off-by: Arik Nemtsov <arik@wizery.com>

Instead of using hardcoded values for a single frequency, we need to
read the frequency and use the appropriate values for it in the top
initialization.
Signed-off-by: Luciano Coelho <coelho@ti.com>
Signed-off-by: Arik Nemtsov <arik@wizery.com>

Currently (Fw .67) appears to do more harm than good.
Signed-off-by: Arik Nemtsov <arik@wizery.com>
Signed-off-by: Luciano Coelho <coelho@ti.com>

Define the FW pc in the 18xx register translation table. This specific
register is only valid in the boot partition, so change the momentarily
change partitions. This doesn't damage 12xx cards, where the FW pc is
accessible via boot partition as well.
Signed-off-by: Arik Nemtsov <arik@wizery.com>
Signed-off-by: Luciano Coelho <coelho@ti.com>

The firmware uses the SCR_PAD2 register to read the board type passed
from the driver.  The values don't match the ones used in the mac and
phy configuration, so we need to map them before writing.  This commit
adds a translation table that is used when writing the board type to
SCR_PAD2.
Signed-off-by: Luciano Coelho <coelho@ti.com>
Signed-off-by: Arik Nemtsov <arik@wizery.com>

Different board types (ie. FPGA, HDK and DVP/EVB) require slightly
different init configuration options.  Since we cannot probe the type
of board from the actual hardware, we need to pass it as an option
during module load.

This patch adds a module parameters that accepts the 3 different board
types, with DVP/EVB as the default, and uses this value where needed.
Signed-off-by: Luciano Coelho <coelho@ti.com>
Signed-off-by: Arik Nemtsov <arik@wizery.com>

Set an alternate HT cap allowing MIMO rates (but only 20mhz) channels,
when the module is loaded with ht_mode=mimo.
Signed-off-by: Arik Nemtsov <arik@wizery.com>
Signed-off-by: Luciano Coelho <coelho@ti.com>

Define the default HT capabilities of the 18xx chip family - these include
support for wide-channel.
Signed-off-by: Arik Nemtsov <arik@wizery.com>
Signed-off-by: Luciano Coelho <coelho@ti.com>

Add a HW op to add extra enabled rates for AP-mode data-rates. Since
the rates might depend on channel properties, reconfigure AP-mode rates
when these change.

Implement the HW op for the 18xx family, where MIMO or wide-chan rates
can be added.
Signed-off-by: Arik Nemtsov <arik@wizery.com>
Signed-off-by: Luciano Coelho <coelho@ti.com>

Parse the peer ht_cap element containing MCS8-MCS15 rates and pass it
to the FW. Rates unsupported by the HW will be sanitized by mac80211
before reaching us.
Signed-off-by: Arik Nemtsov <arik@wizery.com>
Signed-off-by: Luciano Coelho <coelho@ti.com>

Enable wide-chan or MIMO rates when appropriate.
Signed-off-by: Arik Nemtsov <arik@wizery.com>
Signed-off-by: Luciano Coelho <coelho@ti.com>

Translate the NL80211 channel type to a FW-specific channel type and send
it to the FW as part of the role-start command. For wl12xx this has no
effect - this element is treated as padding.
Signed-off-by: Arik Nemtsov <arik@wizery.com>
Signed-off-by: Luciano Coelho <coelho@ti.com>

Track the current 802.11 channel type, defaulting to a NO_HT channel.
Update the channel type element when changed by mac80211.
Signed-off-by: Arik Nemtsov <arik@wizery.com>
Signed-off-by: Luciano Coelho <coelho@ti.com>

Now wlcore requires the lower drivers to set the correct
configuration.  Move the existing private configuration to the proper
place and add all generic configuration parameters.

The important changes are in Tx interrupt pacing and Rx BA window size.
Signed-off-by: Luciano Coelho <coelho@ti.com>
Signed-off-by: Arik Nemtsov <arik@wizery.com>

Some chip families can checksum certain classes of Rx packets in FW.
Implement the Rx-checksum feature as a HW-op. For the 18xx chip-family,
set Rx-checsum according to indication from FW.
Signed-off-by: Arik Nemtsov <arik@wizery.com>
Signed-off-by: Luciano Coelho <coelho@ti.com>

Some chip families are capable of checksumming certain classes of Tx
packets in HW. Indicate this fact in the netdev features and perform the
HW checksum by protocol type for the 18xx family.

Fix the location of the skb network header when we move it so we can
rely on it when setting the checksum.
Signed-off-by: Arik Nemtsov <arik@wizery.com>
Signed-off-by: Luciano Coelho <coelho@ti.com>

Add wl18xx-specific HW initialization operation and create acx.[ch]
files to support that.
Signed-off-by: Luciano Coelho <coelho@ti.com>
Signed-off-by: Arik Nemtsov <arik@wizery.com>

Implement immediate Tx completion for the 18xx family. Move 18xx
specific Tx code to new tx.c/h files and create helper header files
for definitions.
Signed-off-by: Arik Nemtsov <arik@wizery.com>
Signed-off-by: Luciano Coelho <coelho@ti.com>

Implement the 18xx-specific way for getting the length of a Rx packet.
Signed-off-by: Arik Nemtsov <arik@wizery.com>
Signed-off-by: Luciano Coelho <coelho@ti.com>

Implement the HW op for getting alignment state in wl18xx. The FW aligns
the Rx Ethernet payload data.
Signed-off-by: Arik Nemtsov <arik@wizery.com>
Signed-off-by: Luciano Coelho <coelho@ti.com>

The 18xx FW sends Rx blocks with aligned length.
Signed-off-by: Arik Nemtsov <arik@wizery.com>
Signed-off-by: Luciano Coelho <coelho@ti.com>

The wl18xx chip passes extra information in the firmware status to the
driver.  Add a private data section to handle that.
Signed-off-by: Luciano Coelho <coelho@ti.com>
Signed-off-by: Arik Nemtsov <arik@wizery.com>

Define HW-rate conversion tables for the 18xx chip. Initialize
the appropriate wlcore elements with these tables and values to allow
conversion of HW-rates.
Signed-off-by: Arik Nemtsov <arik@wizery.com>
Signed-off-by: Luciano Coelho <coelho@ti.com>

Set the frame length during Tx in a way compatible with the 18xx FW.
Signed-off-by: Arik Nemtsov <arik@wizery.com>
Signed-off-by: Luciano Coelho <coelho@ti.com>

Add the 18xx variant to the HW Tx descriptor union and set the 18xx
specific values during Tx.
Signed-off-by: Arik Nemtsov <arik@wizery.com>
Signed-off-by: Luciano Coelho <coelho@ti.com>

Implement the calc_tx_blocks op for the 18xx family.
Signed-off-by: Arik Nemtsov <arik@wizery.com>
Signed-off-by: Luciano Coelho <coelho@ti.com>

Initialize the Tx spare block counts for all operating modes in the 18xx
card.
Signed-off-by: Arik Nemtsov <arik@wizery.com>
Signed-off-by: Luciano Coelho <coelho@ti.com>

Initialize the number of Tx-descriptors for the 18xx family.
Signed-off-by: Arik Nemtsov <arik@wizery.com>
Signed-off-by: Luciano Coelho <coelho@ti.com>

Make use of the wlcore provided private storage in the 18xx low-level
driver.
Signed-off-by: Arik Nemtsov <arik@wizery.com>
Signed-off-by: Luciano Coelho <coelho@ti.com>

Add the operations that allow wlcore to trigger commands to the
firmware and acknowledge when an event has been fully received.

Allocate a private buffer to hold the maximum sized cmd. Send the
entire length of the buffer each time a command is sent to signal
EOT. Remove the previous EOT mechanism.
Signed-off-by: Luciano Coelho <coelho@ti.com>
Signed-off-by: Arik Nemtsov <arik@wizery.com>

Implement the boot operation.  Add a wl18xx-specific configuration
structure (namely to configure the mac and phy parameters).

The default hw configuration matches the DVP board.
Signed-off-by: Luciano Coelho <coelho@ti.com>
Signed-off-by: Arik Nemtsov <arik@wizery.com>

Add identify_chip operation to detect the chip ID for wl185x and set
the correct firmware name.
Signed-off-by: Luciano Coelho <coelho@ti.com>
Signed-off-by: Arik Nemtsov <arik@wizery.com>

Add the register table with the appropriate values for wl18xx.
Signed-off-by: Luciano Coelho <coelho@ti.com>
Signed-off-by: Arik Nemtsov <arik@wizery.com>

Define and add the partition table in the wlcore struct.
Signed-off-by: Luciano Coelho <coelho@ti.com>
Signed-off-by: Arik Nemtsov <arik@wizery.com>

We don't have any chip-specific operations yet, but now wlcore has
defined an operations structure and requires the pointer to be set.
Signed-off-by: Luciano Coelho <coelho@ti.com>
Signed-off-by: Arik Nemtsov <arik@wizery.com>

At least in PG1, the wl18xx chips use the same SDIO vendor/device ID,
so it's not possible to figure out which driver is to be used.  As a
workaround, we can check the SDIO revision number, because wl18xx uses
3.00 and wl12xx does not.
Signed-off-by: Luciano Coelho <coelho@ti.com>
Signed-off-by: Arik Nemtsov <arik@wizery.com>

Add the wl18xx module and the probe functions.  Use wlcore for the
main parts (not functional at this point due to differences in the
wl18xx initialization).
Signed-off-by: Luciano Coelho <coelho@ti.com>
Signed-off-by: Arik Nemtsov <arik@wizery.com>