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  1. 18 Mar, 2010 7 commits
    • San Mehat's avatar
      mmc: msm_sdcc: Reduce command timeouts and improve reliability. · 56a8b5b8
      San Mehat authored 
      Based on an original patch by Brent DeGraaf:

"Previous versions of the SD driver were beset with excessive command
timeouts. These timeouts were silent by default, but happened
frequently, especially during heavy system activity and concurrent
access of two or more SD devices. Worst case, these timeouts would
occasionally hit at the end of a successful write, resulting in false
failures that could adversely affect journaling file systems if timing
was unfortunate. This update tightens the association and timing between
dma transfers and the commands that trigger them by utilizing a new api
implemented in the datamover.  In addition, it also fixes a dma cache
coherency issue that was exposed during testing of this fix that
occasionally resulted in card corruption.  Processing of results in the
interrupt status routine was modified to process command results prior to
data because overwritten command results were observed during testing
since the data section can result in command issuances of its own.
This change also eliminates the software command timeout, relying entirely
on the hardware version, since the software timeout was found to cause
problems of its own after extensive testing (having hardware timer and
software timers addressing the same issue was found to cause a race
condition under heavy system load)."

This change originally added PROG_DONE handling, which has been split out
into a separate patch. Also on our platform, the data mover driver maintains
coherency to ensure API reliability, so the above mentioned cache corruption
issue was not an issue for us.
Signed-off-by: default avatarSan Mehat <san@google.com>
Cc: Brian Swetland <swetland@google.com>

Change-Id: Ifbf17cfafb858106d73bf49af52b5161a265a484
Signed-off-by: default avatarSan Mehat <san@google.com>
Signed-off-by: default avatarDaniel Walker <dwalker@codeaurora.org>
      56a8b5b8
    • San Mehat's avatar
      mmc: msm_sdcc: Schedule clock disable after probe · 51905dcb
      San Mehat authored 
      Signed-off-by: default avatarSan Mehat <san@google.com>
Signed-off-by: default avatarDaniel Walker <dwalker@codeaurora.org>
      51905dcb
    • San Mehat's avatar
      mmc: msm_sdcc: Wrap readl/writel calls with appropriate clk delays · 8b1c2ba2
      San Mehat authored 
      As it turns out, all sdcc register writes must be delayed by at
least 3 core clock cycles for the writes to take effect. *sigh*

    Also removes the 30us constant delay on clock enable in favor
of a 3 core clock delay.
Signed-off-by: default avatarSan Mehat <san@google.com>
Signed-off-by: default avatarDaniel Walker <dwalker@codeaurora.org>
      8b1c2ba2
    • San Mehat's avatar
      mmc: msm_sdcc: Driver clocking/irq improvements · 865c8064
      San Mehat authored 
      - Clocks are now disabled after 1 second of inactivity
- Fixed issue which was causing us to loop through our ISR twice
- Bump core clock enable delay to 30us
Signed-off-by: default avatarSan Mehat <san@google.com>
Signed-off-by: default avatarDaniel Walker <dwalker@codeaurora.org>
      865c8064
    • San Mehat's avatar
      msm: Add 'execute' datamover callback · 5b00f40f
      San Mehat authored 
      Based on a patch from Brent DeGraaf:

"The datamover supports channels which can be shared amongst devices.
As a result, the actual data transfer may occur some time after the
request is queued up. Some devices such as mmc host controllers
will timeout if a command is issued too far in advance of the actual
transfer, so if dma to other devices on the same channel is already
in progress or queued up, the added delay can cause pending transfers
to fail before they start. This change extends the api to allow a
user callback to be invoked just before the actual transfer takes
place, thus allowing actions directly associated with the dma
transfer, such as device commands, to be invoked with precise timing.
Without this mechanism, there is no way for a driver to realize
this timing. Also adds a user pointer to the command structure for use
by the caller to reference information that may be needed by the
callback routine for proper identification and processing associated
with that specific request. This change is necessary to fix problems
associated with excessive command timeouts and race conditions in the
mmc driver."

This patch also fixes all the callers of msm_dmov_enqueue_cmd() to
ensure their callback function is NULL.
Signed-off-by: default avatarSan Mehat <san@google.com>
Cc: Brent DeGraaf <bdegraaf@quicinc.com>
Cc: Brian Swetland <swetland@google.com>
Signed-off-by: default avatarDaniel Walker <dwalker@codeaurora.org>
      5b00f40f
    • San Mehat's avatar
      mmc: msm_sdcc: Snoop SDIO_CCCR_ABORT register · b3fa5791
      San Mehat authored 
      Signed-off-by: default avatarSan Mehat <san@google.com>
Signed-off-by: default avatarDaniel Walker <dwalker@codeaurora.org>
      b3fa5791
    • San Mehat's avatar
      mmc: msm_sdcc: Clean up clock management and add a 10us delay after enabling clocks · 4adbbcc7
      San Mehat authored 
      It appears that in some cases there may be a delay on the ARM9 in enabling our clock.
As a result, we may put the controller into a bad state. Delay 10us after enabling
clocks to let the peripheral settle. Note - this is all imperical.

Also ensure set_ios() callback grabs the host lock.
Signed-off-by: default avatarSan Mehat <san@google.com>
Signed-off-by: default avatarDaniel Walker <dwalker@codeaurora.org>
      4adbbcc7
  3. 20 Jan, 2010 1 commit
  5. 24 Dec, 2009 32 commits
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