An error occurred fetching the project authors.
  1. 02 May, 2013 1 commit
  2. 12 Sep, 2012 2 commits
  3. 11 Jul, 2012 1 commit
  4. 10 Jul, 2012 1 commit
  5. 30 Apr, 2012 1 commit
  6. 08 Apr, 2012 2 commits
  7. 08 Mar, 2012 1 commit
    • Benjamin Herrenschmidt's avatar
      powerpc: Call do_page_fault() with interrupts off · a546498f
      Benjamin Herrenschmidt authored
      We currently turn interrupts back to their previous state before
      calling do_page_fault(). This can be annoying when debugging as
      a bad fault will potentially have lost some processor state before
      getting into the debugger.
      
      We also end up calling some generic code with interrupts enabled
      such as notify_page_fault() with interrupts enabled, which could
      be unexpected.
      
      This changes our code to behave more like other architectures,
      and make the assembly entry code call into do_page_faults() with
      interrupts disabled. They are conditionally re-enabled from
      within do_page_fault() in the same spot x86 does it.
      
      While there, add the might_sleep() test in the case of a successful
      trylock of the mmap semaphore, again like x86.
      
      Also fix a bug in the existing assembly where r12 (_MSR) could get
      clobbered by C calls (the DTL accounting in the exception common
      macro and DISABLE_INTS) in some cases.
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      ---
      
      v2. Add the r12 clobber fix
      a546498f
  8. 20 Dec, 2011 1 commit
    • Suzuki Poulose's avatar
      powerpc: Rename mapping based RELOCATABLE to DYNAMIC_MEMSTART for BookE · 0f890c8d
      Suzuki Poulose authored
      The current implementation of CONFIG_RELOCATABLE in BookE is based
      on mapping the page aligned kernel load address to KERNELBASE. This
      approach however is not enough for platforms, where the TLB page size
      is large (e.g, 256M on 44x). So we are renaming the RELOCATABLE used
      currently in BookE to DYNAMIC_MEMSTART to reflect the actual method.
      
      The CONFIG_RELOCATABLE for PPC32(BookE) based on processing of the
      dynamic relocations will be introduced in the later in the patch series.
      
      This change would allow the use of the old method of RELOCATABLE for
      platforms which can afford to enforce the page alignment (platforms with
      smaller TLB size).
      
      Changes since v3:
      
      * Introduced a new config, NONSTATIC_KERNEL, to denote a kernel which is
        either a RELOCATABLE or DYNAMIC_MEMSTART(Suggested by: Josh Boyer)
      Suggested-by: default avatarScott Wood <scottwood@freescale.com>
      Tested-by: default avatarScott Wood <scottwood@freescale.com>
      Signed-off-by: default avatarSuzuki K. Poulose <suzuki@in.ibm.com>
      Cc: Scott Wood <scottwood@freescale.com>
      Cc: Kumar Gala <galak@kernel.crashing.org>
      Cc: Josh Boyer <jwboyer@gmail.com>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: linux ppc dev <linuxppc-dev@lists.ozlabs.org>
      Signed-off-by: default avatarJosh Boyer <jwboyer@gmail.com>
      0f890c8d
  9. 03 Nov, 2011 1 commit
  10. 19 Sep, 2011 2 commits
    • Scott Wood's avatar
      powerpc/32: Pass device tree address as u64 to machine_init · 6dece0eb
      Scott Wood authored
      u64 is used rather than phys_addr_t to keep things simple, as
      this is called from assembly code.
      
      Update callers to pass a 64-bit address in r3/r4.  Other unused
      register assignments that were once parameters to machine_init
      are dropped.
      
      For FSL BookE, look up the physical address of the device tree from the
      effective address passed in r3 by the loader.  This is required for
      situations where memory does not start at zero (due to AMP or IOMMU-less
      virtualization), and thus the IMA doesn't start at zero, and thus the
      device tree effective address does not equal the physical address.
      Signed-off-by: default avatarScott Wood <scottwood@freescale.com>
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      6dece0eb
    • Becky Bruce's avatar
      powerpc: Hugetlb for BookE · 41151e77
      Becky Bruce authored
      Enable hugepages on Freescale BookE processors.  This allows the kernel to
      use huge TLB entries to map pages, which can greatly reduce the number of
      TLB misses and the amount of TLB thrashing experienced by applications with
      large memory footprints.  Care should be taken when using this on FSL
      processors, as the number of large TLB entries supported by the core is low
      (16-64) on current processors.
      
      The supported set of hugepage sizes include 4m, 16m, 64m, 256m, and 1g.
      Page sizes larger than the max zone size are called "gigantic" pages and
      must be allocated on the command line (and cannot be deallocated).
      
      This is currently only fully implemented for Freescale 32-bit BookE
      processors, but there is some infrastructure in the code for
      64-bit BooKE.
      Signed-off-by: default avatarBecky Bruce <beckyb@kernel.crashing.org>
      Signed-off-by: default avatarDavid Gibson <david@gibson.dropbear.id.au>
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      41151e77
  11. 12 Jul, 2011 2 commits
  12. 23 Jun, 2011 1 commit
  13. 31 Mar, 2011 1 commit
  14. 29 Nov, 2010 1 commit
  15. 14 Oct, 2010 1 commit
  16. 25 May, 2010 1 commit
    • Sebastian Andrzej Siewior's avatar
      powerpc/kexec: Add support for FSL-BookE · b3df895a
      Sebastian Andrzej Siewior authored
      This adds support kexec on FSL-BookE where the MMU can not be simply
      switched off. The code borrows the initial MMU-setup code to create the
      identical mapping mapping. The only difference to the original boot code
      is the size of the mapping(s) and the executeable address.
      The kexec code maps the first 2 GiB of memory in 256 MiB steps. This
      should work also on e500v1 boxes.
      SMP support is still not available.
      
      (Kumar: Added minor change to build to ifdef CONFIG_PPC_STD_MMU_64 some
      code that was PPC64 specific)
      Signed-off-by: default avatarSebastian Andrzej Siewior <bigeasy@linutronix.de>
      Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
      b3df895a
  17. 24 May, 2010 2 commits
  18. 17 May, 2010 1 commit
    • Li Yang's avatar
      powerpc/fsl-booke: Fix InstructionTLBError execute permission check · 78e2e68a
      Li Yang authored
      In CONFIG_PTE_64BIT the PTE format has unique permission bits for user
      and supervisor execute.  However on !CONFIG_PTE_64BIT we overload the
      supervisor bit to imply user execute with _PAGE_USER set.  This allows
      us to use the same permission check mask for user or supervisor code on
      !CONFIG_PTE_64BIT.
      
      However, on CONFIG_PTE_64BIT we map _PAGE_EXEC to _PAGE_BAP_UX so we
      need a different permission mask based on the fault coming from a kernel
      address or user space.
      
      Without unique permission masks we see issues like the following with
      modules:
      
      Unable to handle kernel paging request for instruction fetch
      Faulting instruction address: 0xf938d040
      Oops: Kernel access of bad area, sig: 11 [#1]
      Signed-off-by: default avatarLi Yang <leoli@freescale.com>
      Signed-off-by: default avatarJin Qing <b24347@freescale.com>
      Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
      78e2e68a
  19. 13 May, 2010 1 commit
    • Li Yang's avatar
      powerpc/fsl-booke: Fix InstructionTLBError execute permission check · fa6bd996
      Li Yang authored
      In CONFIG_PTE_64BIT the PTE format has unique permission bits for user
      and supervisor execute.  However on !CONFIG_PTE_64BIT we overload the
      supervisor bit to imply user execute with _PAGE_USER set.  This allows
      us to use the same permission check mask for user or supervisor code on
      !CONFIG_PTE_64BIT.
      
      However, on CONFIG_PTE_64BIT we map _PAGE_EXEC to _PAGE_BAP_UX so we
      need a different permission mask based on the fault coming from a kernel
      address or user space.
      
      Without unique permission masks we see issues like the following with
      modules:
      
      Unable to handle kernel paging request for instruction fetch
      Faulting instruction address: 0xf938d040
      Oops: Kernel access of bad area, sig: 11 [#1]
      Signed-off-by: default avatarLi Yang <leoli@freescale.com>
      Signed-off-by: default avatarJin Qing <b24347@freescale.com>
      Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
      fa6bd996
  20. 19 Mar, 2010 1 commit
  21. 17 Mar, 2010 1 commit
  22. 18 Feb, 2010 1 commit
  23. 20 Nov, 2009 1 commit
  24. 02 Sep, 2009 1 commit
  25. 27 Aug, 2009 1 commit
    • Benjamin Herrenschmidt's avatar
      powerpc/mm: Cleanup handling of execute permission · ea3cc330
      Benjamin Herrenschmidt authored
      This is an attempt at cleaning up a bit the way we handle execute
      permission on powerpc. _PAGE_HWEXEC is gone, _PAGE_EXEC is now only
      defined by CPUs that can do something with it, and the myriad of
      #ifdef's in the I$/D$ coherency code is reduced to 2 cases that
      hopefully should cover everything.
      
      The logic on BookE is a little bit different than what it was though
      not by much. Since now, _PAGE_EXEC will be set by the generic code
      for executable pages, we need to filter out if they are unclean and
      recover it. However, I don't expect the code to be more bloated than
      it already was in that area due to that change.
      
      I could boast that this brings proper enforcing of per-page execute
      permissions to all BookE and 40x but in fact, we've had that now for
      some time as a side effect of my previous rework in that area (and
      I didn't even know it :-) We would only enable execute permission if
      the page was cache clean and we would only cache clean it if we took
      and exec fault. Since we now enforce that the later only work if
      VM_EXEC is part of the VMA flags, we de-fact already enforce per-page
      execute permissions... Unless I missed something
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      ea3cc330
  26. 20 Aug, 2009 1 commit
    • Benjamin Herrenschmidt's avatar
      powerpc: Use names rather than numbers for SPRGs (v2) · ee43eb78
      Benjamin Herrenschmidt authored
      The kernel uses SPRG registers for various purposes, typically in
      low level assembly code as scratch registers or to hold per-cpu
      global infos such as the PACA or the current thread_info pointer.
      
      We want to be able to easily shuffle the usage of those registers
      as some implementations have specific constraints realted to some
      of them, for example, some have userspace readable aliases, etc..
      and the current choice isn't always the best.
      
      This patch should not change any code generation, and replaces the
      usage of SPRN_SPRGn everywhere in the kernel with a named replacement
      and adds documentation next to the definition of the names as to
      what those are used for on each processor family.
      
      The only parts that still use the original numbers are bits of KVM
      or suspend/resume code that just blindly needs to save/restore all
      the SPRGs.
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      ee43eb78
  27. 26 Apr, 2009 1 commit
  28. 23 Feb, 2009 1 commit
  29. 12 Feb, 2009 1 commit
    • Kumar Gala's avatar
      powerpc/fsl-booke: Add new ISA 2.06 page sizes and MAS defines · d66c82ea
      Kumar Gala authored
      The Power ISA 2.06 added power of two page sizes to the embedded MMU
      architecture.  Its done it such a way to be code compatiable with the
      existing HW.  Made the minor code changes to support both power of two
      and power of four page sizes.  Also added some new MAS bits and macros
      that are defined as part of the 2.06 ISA.  Renamed some things to use
      the 'Book-3e' concept to convey the new MMU that is based on the
      Freescale Book-E MMU programming model.
      
      Note, its still invalid to try and use a page size that isn't supported
      by cpu.
      Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
      d66c82ea
  30. 29 Jan, 2009 1 commit
    • Kumar Gala's avatar
      powerpc/fsl-booke: Cleanup init/exception setup to be runtime · 105c31df
      Kumar Gala authored
      We currently have a few variants of fsl-booke processors (e500v1, e500v2,
      e500mc, and e200).  They all have minor differences that we had previously
      been handling via ifdefs.
      
      To move towards having this support the following changes have been made:
      
      * PID1, PID2 only exist on e500v1 & e500v2 and should not be accessed on
        e500mc or e200.  We use MMUCFG[NPIDS] to determine which case we are
        since we only touch PID1/2 in extremely early init code.
      
      * Not all IVORs exist on all the processors so introduce cpu_setup
        functions for each variant to setup the proper IVORs that are either
        unique or exist but have some variations between the processors
      Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
      105c31df
  31. 13 Jan, 2009 1 commit
  32. 07 Jan, 2009 2 commits
  33. 21 Dec, 2008 1 commit
  34. 03 Dec, 2008 1 commit