1. 01 Jun, 2020 4 commits
    • Stephen Boyd's avatar
      Merge branches 'clk-mmp', 'clk-intel', 'clk-ingenic', 'clk-qcom' and 'clk-silabs' into clk-next · 5debcd01
      Stephen Boyd authored
       - Start making audio and GPU clks work on Marvell MMP2/MMP3 SoCs
       - Add support for X1830 and X1000 Ingenic SoC clk controllers
       - Add support for Qualcomm's MSM8939 Generic Clock Controller
       - Add some GPU, NPU, and UFS clks to Qualcomm SM8150 driver
       - Enable supply regulators for GPU gdscs on Qualcomm SoCs
       - Add support for Si5342, Si5344 and Si5345 chips
      
      * clk-mmp:
        clk: mmp2: Add audio clock controller driver
        dt-bindings: clock: Add Marvell MMP Audio Clock Controller binding
        clk: mmp2: Add support for power islands
        dt-bindings: marvell,mmp2: Add ids for the power domains
        dt-bindings: clock: Make marvell,mmp2-clock a power controller
        clk: mmp2: Add the audio clock
        clk: mmp2: Add the I2S clocks
        clk: mmp2: Rename mmp2_pll_init() to mmp2_main_clk_init()
        clk: mmp2: Move thermal register defines up a bit
        dt-bindings: marvell,mmp2: Add clock id for the Audio clock
        dt-bindings: marvell,mmp2: Add clock id for the I2S clocks
        clk: mmp: frac: Allow setting bits other than the numerator/denominator
        clk: mmp: frac: Do not lose last 4 digits of precision
      
      * clk-intel:
        clk: intel: remove redundant initialization of variable rate64
        clk: intel: Add CGU clock driver for a new SoC
        dt-bindings: clk: intel: Add bindings document & header file for CGU
      
      * clk-ingenic:
        clk: ingenic: Mark ingenic_tcu_of_match as __maybe_unused
        clk: X1000: Add FIXDIV for SSI clock of X1000.
        dt-bindings: clock: Add and reorder ABI for X1000.
        clk: Ingenic: Add CGU driver for X1830.
        dt-bindings: clock: Add X1830 clock bindings.
        clk: Ingenic: Adjust cgu code to make it compatible with X1830.
        clk: Ingenic: Remove unnecessary spinlock when reading registers.
      
      * clk-qcom:
        clk: qcom: Add missing msm8998 ufs_unipro_core_clk_src
        dt-bindings: clock: Add YAML schemas for QCOM A53 PLL
        clk: qcom: gcc-msm8939: Add MSM8939 Generic Clock Controller
        clk: qcom: gcc: Add support for Secure control source clock
        dt-bindings: clock: Add gcc_sec_ctrl_clk_src clock ID
        clk: qcom: gcc: Add support for a new frequency for SC7180
        clk: qcom: Add DT bindings for MSM8939 GCC
        clk: qcom: gcc: Add missing UFS clocks for SM8150
        clk: qcom: gcc: Add GPU and NPU clocks for SM8150
        clk: qcom: mmcc-msm8996: Properly describe GPU_GX gdsc
        clk: qcom: gdsc: Handle GDSC regulator supplies
        clk: qcom: msm8916: Fix the address location of pll->config_reg
      
      * clk-silabs:
        clk: clk-si5341: Add support for the Si5345 series
      5debcd01
    • Stephen Boyd's avatar
      Merge branches 'clk-unisoc', 'clk-trivial', 'clk-bcm', 'clk-st' and 'clk-ast2600' into clk-next · b6f3162d
      Stephen Boyd authored
      * clk-unisoc:
        clk: sprd: add mipi_csi_xx gate clocks
        clk: sprd: add dt-bindings include for mipi_csi_xx clocks
        dt-bindings: clk: sprd: add mipi_csi_xx clocks for SC9863A
        clk: sprd: check its parent status before reading gate clock
        clk: sprd: return correct type of value for _sprd_pll_recalc_rate
        clk: sprd: mark the local clock symbols static
      
      * clk-trivial:
        clk: versatile: remove redundant assignment to pointer clk
        clk: clk-xgene: Fix a typo in Kconfig
        clk: Remove unused inline function clk_debug_reparent
      
      * clk-bcm:
        clk: bcm2835: Constify struct debugfs_reg32
        clk: bcm2835: Remove casting to bcm2835_clk_register
        clk: bcm2835: Fix return type of bcm2835_register_gate
      
      * clk-st:
        clk: clk-flexgen: fix clock-critical handling
      
      * clk-ast2600:
        clk: ast2600: Fix AHB clock divider for A1
      b6f3162d
    • Stephen Boyd's avatar
      Merge branches 'clk-tegra', 'clk-imx', 'clk-zynq', 'clk-socfpga', 'clk-at91'... · 8c88e568
      Stephen Boyd authored
      Merge branches 'clk-tegra', 'clk-imx', 'clk-zynq', 'clk-socfpga', 'clk-at91' and 'clk-ti' into clk-next
      
       - Support custom flags in Xilinx zynq firmware
       - Various small fixes to the Xilinx clk driver
       - Support for Intel Agilex clks
      
      * clk-tegra:
        clk: tegra: Add Tegra210 CSI TPG clock gate
        clk: tegra30: Use custom CCLK implementation
        clk: tegra20: Use custom CCLK implementation
        clk: tegra: cclk: Add helpers for handling PLLX rate changes
        clk: tegra: pll: Add pre/post rate-change hooks
        clk: tegra: Add custom CCLK implementation
        clk: tegra: Remove the old emc_mux clock for Tegra210
        clk: tegra: Implement Tegra210 EMC clock
        clk: tegra: Export functions for EMC clock scaling
        clk: tegra: Add PLLP_UD and PLLMB_UD for Tegra210
        clk: tegra: Rename Tegra124 EMC clock source file
        dt-bindings: clock: tegra: Add clock ID for CSI TPG clock
      
      * clk-imx:
        clk: imx: use imx8m_clk_hw_composite_bus for i.MX8M bus clk slice
        clk: imx: add imx8m_clk_hw_composite_bus
        clk: imx: add mux ops for i.MX8M composite clk
        clk: imx8m: migrate A53 clk root to use composite core
        clk: imx8mp: use imx8m_clk_hw_composite_core to simplify code
        clk: imx8mp: Define gates for pll1/2 fixed dividers
        clk: imx: imx8mp: fix pll mux bit
        clk: imx8m: drop clk_hw_set_parent for A53
        dt-bindings: clocks: imx8mp: Add ids for audiomix clocks
        clk: imx: Add helpers for passing the device as argument
        clk: imx: pll14xx: Add the device as argument when registering
        clk: imx: gate2: Allow single bit gating clock
        clk: imx: clk-pllv3: Use readl_relaxed_poll_timeout() for PLL lock wait
        clk: imx: clk-sscg-pll: Remove unnecessary blank lines
        clk: imx: drop the dependency on ARM64 for i.MX8M
        clk: imx7ulp: make it easy to change ARM core clk
        clk: imx: imx6ul: change flexcan clock to support CiA bitrates
      
      * clk-zynq:
        clk: zynqmp: Make zynqmp_clk_get_max_divisor static
        clk: zynqmp: Update fraction clock check from custom type flags
        clk: zynqmp: Add support for custom type flags
        clk: zynqmp: fix memory leak in zynqmp_register_clocks
        clk: zynqmp: Fix invalid clock name queries
        clk: zynqmp: Fix divider2 calculation
        clk: zynqmp: Limit bestdiv with maxdiv
      
      * clk-socfpga:
        clk: socfpga: agilex: add clock driver for the Agilex platform
        dt-bindings: documentation: add clock bindings information for Agilex
        clk: socfpga: add const to _ops data structures
        clk: socfpga: remove clk_ops enable/disable methods
        clk: socfpga: stratix10: use new parent data scheme
      
      * clk-at91:
        clk: at91: allow setting all PMC clock parents via DT
        clk: at91: allow setting PCKx parent via DT
        clk: at91: optimize pmc data allocation
        clk: at91: pmc: decrement node's refcount
        clk: at91: pmc: do not continue if compatible not located
        clk: at91: Add peripheral clock for PTC
      
      * clk-ti:
        clk: ti: dra7: remove two unused symbols
        clk: ti: dra7xx: fix RNG clock parent
        clk: ti: dra7xx: mark MCAN clock as DRA76x only
        clk: ti: dra7xx: fix gpu clkctrl parent
        clk: ti: omap5: Add proper parent clocks for l4-secure clocks
        clk: ti: omap4: Add proper parent clocks for l4-secure clocks
        clk: ti: composite: fix memory leak
      8c88e568
    • Stephen Boyd's avatar
      Merge branches 'clk-selectable', 'clk-amlogic', 'clk-renesas', 'clk-samsung'... · 3a57530b
      Stephen Boyd authored
      Merge branches 'clk-selectable', 'clk-amlogic', 'clk-renesas', 'clk-samsung' and 'clk-allwinner' into clk-next
      
       - Allow the COMMON_CLK config to be selectable
      
      * clk-selectable:
        clk: Move HAVE_CLK config out of architecture layer
        MIPS: Loongson64: Drop asm/clock.h include
        ARM: mmp: Remove legacy clk code
        clk: Allow the common clk framework to be selectable
        mmc: meson-mx-sdio: Depend on OF_ADDRESS and not just OF
        MIPS: Remove redundant CLKDEV_LOOKUP selects
        h8300: Remove redundant CLKDEV_LOOKUP selects
        arm64: tegra: Remove redundant CLKDEV_LOOKUP selects
        ARM: Remove redundant CLKDEV_LOOKUP selects
        ARM: Remove redundant COMMON_CLK selects
      
      * clk-amlogic:
        clk: meson: meson8b: Don't rely on u-boot to init all GP_PLL registers
        clk: meson: meson8b: Make the CCF use the glitch-free VPU mux
        clk: meson: meson8b: Fix the vclk_div{1, 2, 4, 6, 12}_en gate bits
        clk: meson: meson8b: Fix the polarity of the RESET_N lines
        clk: meson: meson8b: Fix the first parent of vid_pll_in_sel
        clk: meson: g12a: Prepare the GPU clock tree to change at runtime
        clk: meson: gxbb: Prepare the GPU clock tree to change at runtime
        clk: meson: meson8b: make the hdmi_sys clock tree mutable
        clk: meson8b: export the HDMI system clock
      
      * clk-renesas:
        dt-bindings: clock: renesas: mstp: Convert to json-schema
        dt-bindings: clock: renesas: div6: Convert to json-schema
        clk: renesas: cpg-mssr: Fix STBCR suspend/resume handling
        clk: renesas: rcar-gen2: Remove superfluous CLK_RENESAS_DIV6 selects
        clk: renesas: cpg-mssr: Add R8A7742 support
        dt-bindings: clock: renesas: cpg-mssr: Document r8a7742 binding
        clk: renesas: Add r8a7742 CPG Core Clock Definitions
        dt-bindings: power: rcar-sysc: Add r8a7742 power domain index macros
        MAINTAINERS: Add DT Bindings for Renesas Clock Generators
        clk: renesas: r9a06g032: Fix some typo in comments
        dt-bindings: clock: renesas: rcar-usb2-clock-sel: Add r8a77961 support
      
      * clk-samsung:
        clk: samsung: exynos5433: Add IGNORE_UNUSED flag to sclk_i2s1
        ARM/SAMSUNG EXYNOS ARM ARCHITECTURES: Use fallthrough;
        clk: samsung: Fix CLK_SMMU_FIMCL3 clock name on Exynos542x
        clk: samsung: Mark top ISP and CAM clocks on Exynos542x as critical
      
      * clk-allwinner:
        clk: sunxi: Fix incorrect usage of round_down()
      3a57530b
  2. 29 May, 2020 1 commit
  3. 28 May, 2020 22 commits
  4. 27 May, 2020 13 commits