Merge tag 'tegra-for-3.8-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/soc

From Stephen Warren:
ARM: tegra: core SoC code enhancements

Various small clock initialization table and driver changes to support
WiFi modules, SPI controllers, and host1x (graphics/display hardware).

Various AHB/APB-related clocks were added to the Tegra30 clock driver.

The level 2 cache initialization is now driven by data from device tree,
and the cache configuration tweaked.

AUXDATA is added to support SPI controllers and host1x.

Code to decode Tegra's "speedo" process identification fuses is added.

This pull request is based on tegra-for-3.8-cleanup.

* tag 'tegra-for-3.8-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: (26 commits)
  ARM: tegra: Add Tegra30 host1x clock support
  ARM: tegra: Add AUXDATA for Tegra30 host1x
  ARM: tegra: Add Tegra20 host1x clock support
  ARM: tegra: Add AUXDATA for Tegra20 host1x
  ARM: tegra: Tegra30 speedo-based process identification
  ARM: tegra: Add speedo-based process identification
  ARM: tegra: flexible spare fuse read function
  ARM: tegra: Implement 6395/1 for Tegra
  ARM: tegra: Add OF_DEV_AUXDATA for sflash driver in board dt
  ARM: tegra: enable data prefetch on L2
  ARM: tegra: Add OF_DEV_AUXDATA for SLINK driver in board dt
  ARM: tegra: common: using OF api for L2 cache init
  ARM: tegra: dt: add L2 cache controller
  ARM: tegra30: clocks: add AHB and APB clocks
  ARM: tegra: set up wlan clocks for tegra dt
  ARM: tegra: move irammap.h to mach-tegra
  ARM: tegra: move iomap.h to mach-tegra
  ARM: tegra: remove <mach/dma.h>
  ARM: tegra: move tegra-ahb.h out of arch/arm/mach-tegra/
  ARM: tegra: remove unnecessary includes of <mach/*.h>
  ...

From Maxime Ripard:
Allwinner SoC support for 3.8

* tag 'tags/sunxi-support-for-3.8' of git://github.com/mripard/linux:
  ARM: sunxi: Add entry to MAINTAINERS
  ARM: sunxi: Add device tree for the A13 and the Olinuxino board
  ARM: sunxi: Add earlyprintk support
  ARM: sunxi: Add basic support for Allwinner A1x SoCs
  irqchip: sunxi: Add irq controller driver
  clocksource: sunxi: Add Allwinner A1X Timer Driver
  clk: sunxi: Add dummy fixed rate clock for Allwinner A1X SoCs
Signed-off-by: Olof Johansson <olof@lixom.net>

In order to start upstreaming Broadcom SoC support, create
a starting hierarchy, arch and dts files.
The first support SoC family that is planned is the
BCM281XX (BCM11130/11140/11351/28145/28155) family of dual A9 mobile
SoC cores.
This code is just the skeleton code for get the machine upstreamed. It
has been made MULTIPLATFORM compatible.
Next steps
----------
Upstream a basic set of drivers - sufficient for a console boot to
ramdisk. These will includer timer, gpio, i2c drivers.
After this basic set, we will proceed with a more comprehensive set
of drivers for the 281XX SoC family.

v2 patch mods
--------
 - Remove l2x0_of_init call as there were problems with the code.
   A separate patch will be submitted with cache init code
 - Rename capri files and refs to bcm281xx-based names
 - Add bcm281xx binding doc
 - various misc cleanups

v3 patch mods
-------------
 - Remove extra #include lines
 - Remove remaining references to capri
 - dt uart chipset string added
 - cleaned up chip # references

v4 patch mods
-------------
 - swap order of compatible definitions for uart
 - fix typo

v5 patch mods
-------------
 - Rename bcm281xx to bcm11351 in dts+code,
   leaving references to bcm281xx only in help+comments.

v6 patch mods
-------------
 - fix typo in uart 'compatible' string
Signed-off-by: Christian Daudt <csd@broadcom.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>

From Sekhar Nori:

SoC updates for DaVinci. Changes include:

1) Support for PRUSS UIO driver for DA850 SoC
   and related SRAM support updates.
2) Prepration for common clock migration
3) Serial support related changes for DA850 DT boot

* tag 'davinci-for-v3.8/soc' of git://gitorious.org/linux-davinci/linux-davinci:
  ARM: davinci: da8xx: add DA850 PRUSS support
  ARM: davinci: add platform hook to fetch the SRAM pool
  ARM: davinci: da850: changed SRAM allocator to shared ram.
  ARM: davinci: sram: switch from iotable to ioremapped regions
  uio: uio_pruss: replace private SRAM API with genalloc
  ARM: davinci: serial: provide API to initialze UART clocks
  ARM: davinci: convert platform code to use clk_prepare/clk_unprepare
Signed-off-by: Olof Johansson <olof@lixom.net>

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Stefan Roese <sr@denx.de>

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Stefan Roese <sr@denx.de>

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
CC: Thomas Gleixner <tglx@linutronix.de>

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
CC: Thomas Gleixner <tglx@linutronix.de>
CC: John Stultz <johnstul@us.ibm.com>

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Mike Turquette <mturquette@ti.com>

From Sascha Hauer <s.hauer@pengutronix.de>:

ARM i.MX SoC updates

based on imx-multiplatform branch.

* tag 'imx-soc' of git://git.pengutronix.de/git/imx/linux-2.6:
  ARM i.MX51 babbage: Add display support
  ARM i.MX6: Add IPU support
  ARM i.MX51: Add IPU support
  ARM i.MX53: Add IPU support
  ARM i.MX5: switch IPU clk support to devicetree bindings
  ARM i.MX6: fix ldb_di_sel mux
  ARM i.MX51: setup MIPI during startup
  mx2_camera: Fix regression caused by clock conversion
  ARM: clk-imx27: Add missing clock for mx2-camera
  ARM i.MX27: Fix low reference clock path
  ARM: dts: imx27-3ds: Remove local watchdog inclusion
  watchdog: Support imx watchdog on SOC_IMX53
  ARM: mach-imx: Support for DryIce RTC in i.MX53
  ARM : i.MX27 : split code for allocation of ressources of camera and eMMA
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

The babbage board has a DVI-I output which allows to output analog
and digital signals simultaneously. This patch adds support for it
to the devicetree. The DDC signals are not wired up on the board, so
DRM will fall back on default VESA modes.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>

This adds the IPU devices to the devicetree.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>

This adds the IPU device to the devicetree along with the necessary pinctrl
settings for the parallel display outputs.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>

This adds the IPU device to the devicetree.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>

The i.MX5 clk support has platform based clock bindings for the
IPU. IPU support is devicetree only, so move them over to devicetree
based bindings. Also, enable MIPI clocks which do not have a device
associated with, but still need to be enabled to do graphics on
i.MX51.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>

This adds the mmdc_ch1 as a possible parent for the ldb_di clk.
According to the datasheet, this clock can be selected at this mux.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>

The MIPI interface has to be initialized for proper IPU support.
The MIPI officially is not supported, but still needs initialization.
This patch adds this to the SoC startup as all it does is poking
some magic values into registers for which we do not have documentation.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>

Since mx27 transitioned to the commmon clock framework in 3.5, the correct way
to acquire the csi clock is to get csi_ahb and csi_per clocks separately.

By not doing so the camera sensor does not probe correctly:

soc-camera-pdrv soc-camera-pdrv.0: Probing soc-camera-pdrv.0
mx2-camera mx2-camera.0: Camera driver attached to camera 0
ov2640 0-0030: Product ID error fb:fb
mx2-camera mx2-camera.0: Camera driver detached from camera 0
mx2-camera mx2-camera.0: MX2 Camera (CSI) driver probed, clock frequency: 66500000

Adapt the mx2_camera driver to the new clock framework and make it functional
again.
Tested-by: Gaëtan Carlier <gcembed@gmail.com>
Tested-by: Javier Martin <javier.martin@vista-silicon.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Mauro Carvalho Chehab <mchehab@redhat.com>

During the clock conversion for mx27 the "per4_gate" clock was missed to get
registered as a dependency of mx2-camera driver.

In the old mx27 clock driver we used to have:

DEFINE_CLOCK1(csi_clk, 0, NULL, 0, parent, &csi_clk1, &per4_clk);

,so does the same in the new clock driver
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

The i.MX27 clock tree can either be driven from a 26MHz oscillator
or from a 32768Hz oscillator. The latter was not properly implemented,
the mux between these two pathes was missing. Add this mux and while
at it rename the 'prem' (premultiplier) clk to 'fpm' (Frequency
Pre-Multiplier) to better match the datasheet.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

imx27.dtsi already register the watchdog, so no need to do it in the board dts
file.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

This patch fixes watchdog support after devicetree switch for imx53
Signed-off-by: Roland Stigge <stigge@antcom.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

This patch enables support for i.MX53 in addition to i.MX25 by providing a
dummy clock on i.MX53 since this one doesn't have a separate clock for internal
RTC but the driver requests one.
Signed-off-by: Roland Stigge <stigge@antcom.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

This is to prepare addition of m2m-emmapp driver otherwise
IMX_HAVE_PLATFORM_MX2_CAMERA must be declared even if only Post-Processor is
needed.

IMX_HAVE_PLATFORM_MX2_EMMA define has been added.

Changes since v1:
 - Add "select IMX_HAVE_PLATFORM_MX2_EMMA" for MACH_IMX27_VISSTRIM_M10 platform
   due to pending patch in linux-media tree that will call
   imx27_add_mx2_emmaprp().
Signed-off-by: Gaëtan Carlier <gcembed@gmail.com>
Acked-by: Javier Martin <javier.martin@vista-silicon.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Setup the clock parents for the two display controllers and HDMI.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>

Add the OF_DEV_AUXDATA table entries required to associate the proper
names with host1x and its children. In turn, this allows the devices to
find the required clocks.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>

Extend the pll_d frequency table with a few entries to support common
HDMI and LVDS display modes and setup the clock parents for the two
display controllers and HDMI.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>

Add the OF_DEV_AUXDATA table entries required to associate the proper
names with host1x and its children. In turn, this allows the devices to
find the required clocks.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>

This patch adds speedo-based process identification support for Tegra30.
Signed-off-by: Danny Huang <dahuang@nvidia.com>
[swarren s/Tegra3/Tegra30/ in log print,
s/T30/Tegra30/ in commit description]
Signed-off-by: Stephen Warren <swarren@nvidia.com>

Detect CPU and core process ID by checking speedo corner tables.
This can provide a more accurate process ID.
Signed-off-by: Danny Huang <dahuang@nvidia.com>
[swarren s/Tegra2/Tegra20/ in log print]
Signed-off-by: Stephen Warren <swarren@nvidia.com>

Change the spare fuse base from a definition to a variable.
It provides flexibilty to read spare fuse on different chip.
Signed-off-by: Danny Huang <dahuang@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>

This patch implements ARM linux patch 6395/1 for Tegra. See commit
1a8e41cd "ARM: 6395/1: VExpress: Set bit 22 in the PL310 (cache
controller) AuxCtlr register" for details.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
[swarren: added commit subject for referenced patch]
Signed-off-by: Stephen Warren <swarren@nvidia.com>

Add OF_DEV_AUXDATA for sflash controller driver for Tegra20
board dt files.
Set the parent clock of sflash controller to PLLP and configure
clock to 20MHz.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>

From Simon Horman <horms@verge.net.au>:
  This series is based on the renesas/soc branch of the arm-soc tree.
  There will be a subquent 'SoC2' pull request which is based on this
  pull-request and a pull-request for boards.

* 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: add fsi external clock sh7372
  ARM: shmobile: add fsi external clock on r8a7740
  ARM: shmobile: r8a7740: add FSI-DVI clocks
  ARM: shmobile: sh7372: use sh_clk_fsidiv_register() for FSI-DIV clocks
  ARM: shmobile: sh7372: sh7372_fsidivX_clk become non-global
  sh: clkfwk: add sh_clk_fsidiv_register()
  ARM: shmobile: r8a7779: add USB OHCI clock support
  ARM: shmobile: r8a7779: add USB EHCI clock support
  ARM: shmobile: r8a7740: add USB24 clock explain
  ARM: shmobile: r8a7779: PFC rename PENCx -> USB_PENCx
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Patches from Roland Stigge <stigge@antcom.de>:

  Platform topic branch for lpc32xx

* 'lpc32xx/core' of git://git.antcom.de/linux-2.6:
  ARM: LPC32xx: Add the motor PWM clock
  ARM: LPC32xx: Cleanup irq.c
  ARM: LPC32xx: Relocate calls to irq_set_chained_handler()
  ARM: LPC32xx: Remove superfluous irq_alloc_descs()

Includes an update to v3.7-rc4
Signed-off-by: Arnd Bergmann <arnd@arndb.de>