- 01 May, 2005 40 commits
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Paolo 'Blaisorblade' Giarrusso authored
Split the i386 entry.S files into entry.S and syscall_table.S which is included in the previous one (so actually there is no difference between them) and use the syscall_table.S in the UML build, instead of tracking by hand the syscall table changes (which is inherently error-prone). We must only insert the right #defines to inject the changes we need from the i386 syscall table (for instance some different function names); also, we don't implement some i386 syscalls, as ioperm(), nor some TLS-related ones (yet to provide). Signed-off-by:
Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it> Signed-off-by:
Andrew Morton <akpm@osdl.org> Signed-off-by:
Linus Torvalds <torvalds@osdl.org>
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Paolo 'Blaisorblade' Giarrusso authored
GCC 2.95 uses __va_copy instead of va_copy. Handle it inside compiler.h instead of in a casual file, and avoid the risk that this breaks with a newer compiler (which it could do). Signed-off-by:
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Paolo 'Blaisorblade' Giarrusso authored
Cleanup: make an inline of this empty proc. Signed-off-by:
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Paolo 'Blaisorblade' Giarrusso authored
We want to make possible, for the user, to enable the i586 AES implementation. This requires a restructure. - Add a CONFIG_UML_X86 to notify that we are building a UML for i386. - Rename CONFIG_64_BIT to CONFIG_64BIT as is used for all other archs - Tell crypto/Kconfig that UML_X86 is as good as X86 - Tell it that it must exclude not X86_64 but 64BIT, which will give the same results. - Tell kbuild to descend down into arch/i386/crypto/ to build what's needed. Signed-off-by:
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Rob Landley authored
Old versions of sed from 1998 (predating the first release of gcc 2.95, but still in use by debian stable) don't understand the single-line version of the sed append command. Since newer versions of sed still understand the... ahem, "vintage" form of the command, change our code to use that. Signed-off-by:
Rob Landley <rob@landley.net> Acked-by:
Ian McDonald <imcdnzl@gmail.com> Signed-off-by:
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Andree Leidenfrost authored
Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it> Fix the error path, which is triggered when the processor misses the fpx regs (i.e. the "fxsr" cpuinfo feature). For instance by VIA C3 Samuel2. Signed-off-by: -
blaisorblade@yahoo.it authored
This trick is useless, because sys_ni.c will handle this problem by itself, like it does even on UML for other syscalls. Also, it does not provide the NFSD syscall when NFSD is compiled as a module, which is a big problem. Signed-off-by:
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Jeff Dike authored
Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it> Prevent the kernel from oopsing during the extable sorting, as it can do now, because the extable is in the readonly section of the binary. Jeff says: The exception table turned RO in 2.6.11-rc3-mm1 for some reason. Moving it causes it to land in the writable data section of the binary. Paolo says: This patch fixes a oops on startup, which can be easily triggered by compiling with CONFIG_MODE_TT disabled, and STATIC_LINK either disabled or enabled. The resulting kernel will always Oops on startup, after printing this simple output: I've verified, by binary search on the BitKeeper repository (synced up as of 2.6.12-rc2), starting from the range 2.6.11-2.6.12-rc1, that this bug shows up on BitKeeper revisions in the range [@1.1994.11.168,+inf), i.e. starting from this: [PATCH] lib/sort: Replace insertion sort in exception tables Since UML does not use the exception table, it's likely that insertion sort didn't happen to write anything on the table. Signed-off-by: -
Pavel Machek authored
Those cards really need A in their names. Otherwise it is pretty hard to find anything about them on the net. Signed-off-by:
Pavel Machek <pavel@suse.cz> Signed-off-by:
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Alexander Nyberg authored
This strcpy can run off the end of saved_command_line, and we don't need it any more anyway. Signed-off-by:
Alexander Nyberg <alexn@telia.com> Cc: Andi Kleen <ak@muc.de> Signed-off-by:
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Venkatesh Pallipadi authored
Brings sanitize_e820_map() in x86-64 in sync with that of i386. x86_64 version was missing the changes from this patch. http://linux.bkbits.net:8080/linux-2.6/cset@3e5e4083Y3HevldZl5KCy94V4DcZww?nav=index.html|src/|src/arch|src/arch/i386|src/arch/i386/kernel|related/arch/i386/kernel/setup.cSigned-off-by:
Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Acked-by:
Andi Kleen <ak@muc.de> Signed-off-by:
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Pavel Pisa authored
Patch solves VM86 interrupt emulation deadlock on SMP systems. The VM86 interrupt emulation has been heavily tested and works well on UP systems after last update, but it seems to deadlock when we have used it on SMP/HT boxes now. It seems, that disable_irq() cannot be called from interrupts, because it waits until disabled interrupt handler finishes (/kernel/irq/manage.c:synchronize_irq():while(IRQ_INPROGRESS);). This blocks one CPU after another. Solved by use disable_irq_nosync. There is the second problem. If IRQ source is fast, it is possible, that interrupt is sometimes processed and re-enabled by the second CPU, before it is disabled by the first one, but negative IRQ disable depths are not allowed. The spinlocking and disabling IRQs over call to disable_irq_nosync/enable_irq is the only solution found reliable till now. Signed-off-by:
Michal Sojka <sojkam1@control.felk.cvut.cz> Signed-off-by:
Pavel Pisa <pisa@cmp.felk.cvut.cz> Signed-off-by:
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Venkatesh Pallipadi authored
The specifications that talk about E820 map doesn't have an upper limit on the number of e820 entries. But, today's kernel has a hard limit of 32. With increase in memory size, we are seeing the number of E820 entries reaching close to 32. Patch below bumps the number upto 128. The patch changes the location of EDDBUF in zero-page (as it comes after E820). As, EDDBUF is not used by boot loaders, this patch should not have any effect on bootloader-setup code interface. Patch covers both i386 and x86-64. Tested on: * grub booting bzImage * lilo booting bzImage with EDID info enabled * pxeboot of bzImage Side-effect: bss increases by ~ 2K and init.data increases by ~7.5K on all systems, due to increase in size of static arrays. Signed-off-by:
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Andi Kleen authored
- Initialize workmask correctly on interrupt signal handling - Readd missing cli's in the interrupt return path. Signed-off-by:
Andi Kleen <ak@suse.de> Signed-off-by:
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Zwane Mwaikambo authored
http://bugme.osdl.org/show_bug.cgi?id=4426 vendor_id : AuthenticAMD cpu family : 6 model : 10 model name : AMD Athlon(tm) XP stepping : 0 cpu MHz : 2204.807 <snipped> cpuid level : 1 wp : yes flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 mmx fxsr sse pni syscall mmxext 3dnowext 3dnow bogomips : 4358.14 We're marking bit 0 of extended function 0x80000001 cpuid as PNI support on AMD processors, when it actually denotes x87 FPU present. Patch for i386 and x86_64 below. Signed-off-by:
Zwane Mwaikambo <zwane@arm.linux.org.uk> Cc: Andi Kleen <ak@suse.de> Signed-off-by:
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Jason Gaston authored
This adds the Intel ESB2 HD Audio DID to the hda_intel.c audio driver. Signed-off-by:
Jason Gaston <Jason.d.gaston@intel.com> Signed-off-by:
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Jason Gaston authored
This patch adds the Intel ICH7DH and ICH7-M DH DID's to the irq.c and pci_ids.h files. Signed-off-by:
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john stultz authored
Currently the i386 HPET code assumes the entire HPET implementation from the spec is present. This breaks on boxes that do not implement the optional legacy timer replacement functionality portion of the spec. This patch, which is very similar to my x86-64 patch for the same issue, fixes the problem allowing i386 systems that cannot use the HPET for the timer interrupt and RTC to still use the HPET as a time source. I've tested this patch on a system systems without HPET, with HPET but without legacy timer replacement, as well as HPET with legacy timer replacement. Signed-off-by:
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H. Peter Anvin authored
The recent support for K8 multicore was misported from x86-64 to i386, due to an unnecessary inconsistency between the CPUID code. Sure, there is are no x86-64 VIA chips yet, but it should happen eventually. This patch fixes the i386 bug as well as makes x86-64 match i386 in the handing of the CPUID array. Signed-off-by:
H. Peter Anvin <hpa@zytor.com> Cc: Andi Kleen <ak@suse.de> Signed-off-by:
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Lee Revell authored
Enable write combining for server works LE rev > 6 per http://www.ussg.iu.edu/hypermail/linux/kernel/0104.3/1007.htmlSigned-Off-By:
Lee Revell <rlrevell@joe-job.com> Signed-off-by:
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Stas Sergeev authored
do_debug() and do_int3() return void. This patch fixes the CONFIG_KPROBES variant of do_int3() to return void too and adjusts entry.S accordingly. Signed-off-by:
Stas Sergeev <stsp@aknet.ru> Signed-off-by:
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Jaya Kumar authored
This patch by Jaya Kumar introduces a generic infrastructure to deal with x86 chipsets with nonstandard reset sequences, and adds support for the Geode gx1/cs5530a chipset. Signed-off-by:
Jaya Kumar <jayalk@intworks.biz> Signed-off-by:
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Jack F Vogel authored
A bug against an xSeries system showed up recently noting that the check_nmi_watchdog() test was failing. I have been investigating it and discovered in both i386 and x86_64 the recent change to the routine to use the cpu_callin_map has uncovered a problem. Prior to that change, on an SMP box, the test was trivally passing because all cpu's were found to not yet be online, but now with the callin_map they are discovered, it goes on to test the counter and they have not yet begun to increment, so it announces a CPU is stuck and bails out. On all the systems I have access to test, the announcement of failure is also bougs... by the time you can login and check /proc/interrupts, the NMI count is happily incrementing on all CPUs. Its just that the test is being done too early. I have tried moving the call to the test around a bit, and it was always too early. I finally hit on this proposed solution, it delays the routine via a late_initcall(), seems like the right solution to me. Signed-off-by:
Adrian Bunk <bunk@stusta.de> Cc: Andi Kleen <ak@muc.de> Signed-off-by:
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H. J. Lu authored
The new i386/x86_64 assemblers no longer accept instructions for moving between a segment register and a 32bit memory location, i.e., movl (%eax),%ds movl %ds,(%eax) To generate instructions for moving between a segment register and a 16bit memory location without the 16bit operand size prefix, 0x66, mov (%eax),%ds mov %ds,(%eax) should be used. It will work with both new and old assemblers. The assembler starting from 2.16.90.0.1 will also support movw (%eax),%ds movw %ds,(%eax) without the 0x66 prefix. I am enclosing patches for 2.4 and 2.6 kernels here. The resulting kernel binaries should be unchanged as before, with old and new assemblers, if gcc never generates memory access for unsigned gsindex; asm volatile("movl %%gs,%0" : "=g" (gsindex)); If gcc does generate memory access for the code above, the upper bits in gsindex are undefined and the new assembler doesn't allow it. Signed-off-by: -
Denis Vlasenko authored
This patch shortens non-constant memcpy() by two bytes and fixes spurious out-of-line constant memcpy(). # size vmlinux.org vmlinux text data bss dec hex filename 3954591 1553426 236544 5744561 57a7b1 vmlinux.org 3952615 1553426 236544 5742585 579ff9 vmlinux Signed-off-by:
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Jake Moilanen authored
On our raw spinlocks, we currently have an attempt at the lock, and if we do not get it we enter a spin loop. This spinloop will likely continue for awhile, and we pridict likely. Shouldn't we predict that we will get out of the loop so our next instructions are already prefetched. Even when we miss because the lock is still held, it won't matter since we are waiting anyways. I did a couple quick benchmarks, but the results are inconclusive. 16-way 690 running specjbb with original code # ./specjbb 3000 16 1 1 19 30 120 ... Valid run, Score is 59282 16-way 690 running specjbb with unlikely code # ./specjbb 3000 16 1 1 19 30 120 ... Valid run, Score is 59541 I saw a smaller increase on a JS20 (~1.6%) JS20 specjbb w/ original code # ./specjbb 400 2 1 1 19 30 120 ... Valid run, Score is 20460 JS20 specjbb w/ unlikely code # ./specjbb 400 2 1 1 19 30 120 ... Valid run, Score is 20803 Anton said: Mispredicting the spinlock busy loop also means we slow down the rate at which we do the loads which can be good for heavily contended locks. Note: There are some gcc issues with our default build and branch prediction, but a CONFIG_POWER4_ONLY build should emit them correctly. I'm working with Alan Modra on it now. Signed-off-by:
Jake Moilanen <moilanen@austin.ibm.com> Signed-off-by:
Anton Blanchard <anton@samba.org> Signed-off-by:
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akpm@osdl.org authored
Replace a number of memory barriers with smp_ variants. This means we won't take the unnecessary hit on UP machines. Signed-off-by:
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Anton Blanchard authored
Use smp_mb and smp_wmb. In particular smp_wmb is lighter weight than wmb. Signed-off-by:
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Anton Blanchard authored
Calls into the hypervisor do not raise the thread priority. Ensure we are running at medium priority upon entry to the hypervisor. Signed-off-by:
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Anton Blanchard authored
Recent gcc 4.0 testing uncovered a firmware issue. Some properties are larger than 31 bytes and due to gcc 4.0s better stack allocation this overflow ran over non volatile register storage. Signed-off-by:
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Anton Blanchard authored
We no longer use any ppcdebug stuff in a.out.h, so remove the define. Signed-off-by:
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Anton Blanchard authored
There were a few issues with the ppc64 noexec support: The 64bit ABI has a non executable stack by default. At the moment 64bit apps require a PT_GNU_STACK section in order to have a non executable stack. Disable the read implies exec workaround on the 64bit ABI. The 64bit toolchain has never had problems with incorrect mmap permissions (the 32bit has, thats why we need to retain the workaround). With these fixes as well as a gcc fix from Alan Modra (that was recently committed) 64bit apps work as expected. Signed-off-by:
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Olof Johansson authored
It turns out that our current __hash_page code will do a very hot busy-wait loop waiting on _PAGE_BUSY to be cleared. It even does ldarx/stdcx in the loop, which will bounce reservations around like crazy if there's more than one CPU spinning on the same PTE (or even another PTE in the same reservation granule). The end result is that each fault takes longer when there's contention, which in turn increases the chance of another thread hitting the same fault and also piling up. Not pretty. There's two options here: 1. Do an out-of-line busy loop a'la spinlocks with just loads (no reserves) 2. Just bail and refault if needed. (2) makes sense here: If the PTE is busy, chances are it's in flux anyway and the other code path making a change might just be ready to hash it. This fixes a stampede seen on a large-ish system where a multithreaded HPC app faults in the same text pages on several cpus at the same time. Signed-off-by:
Olof Johansson <olof@lixom.net> Cc: Paul Mackerras <paulus@samba.org> Signed-off-by:
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Paul Mackerras authored
On pSeries systems, according to the platform architecture specs, we are supposed to be supplying a structure to firmware that tells firmware about our capabilities, such as which version of the data structures that describe available memory we are expecting to see. The way we end up having to supply this data structure is a bit gross, since it was designed for AIX and doesn't suit us very well. This patch adds the code to supply this data structure to the firmware. Signed-off-by:
Paul Mackerras <paulus@samba.org> Signed-off-by:
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Benjamin Herrenschmidt authored
This patch converts ppc64 to use the generic pgtable-nopud.h instead of the "fixup" header. Signed-off-by:
Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by:
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akpm@osdl.org authored
- Fix arch/ppc64/kernel/nvram.c:342: warning: `part' might be used uninitialized in this function - Various codingstyle tweaks. Signed-off-by:
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Paul Mackerras authored
When I tried Ben's patches to the powermac sound driver on my G5, I found that it was taking enormous numbers of sound DMA transmit interrupts. This turned out to be because it was incorrectly configured as level-sensitive instead of edge-sensitive, which in turn was because the code that parses the interrupt tree that Open Firmware gives us was incorrectly assigning another device the same irq number as the sound DMA transmit interrupt (i.e. 1). This patch fixes the problem, in a somewhat quick and dirty way for now, but one which will work for all the machines we currently run on. Ultimately Ben and I want to do something more general and robust, but this should go in for 2.6.12. Signed-off-by:
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Olof Johansson authored
Remove vsid argument to create_slbe, since it's no longer used. Spotted by R Sharada. Signed-off-by:
Olof Johansson <olof@austin.ibm.com> Signed-off-by:
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Benjamin Herrenschmidt authored
This patch from Roland adds a PT_NOTE section to both 32 and 64 bits vDSOs to expose the kernel version to glibc, thus avoiding a uname syscall on every launch. This is equivalent to the patches Roland posted already for x86 and x86-64. Note: the 64 bits .note is actually using the 32 bits format. This is normal. The ELF spec specifies a different format for 64 bits .note, but for some reason, this was never properly implemented, the core dumps for example are all using 32 bits format .note, and binutils cannot even read a 64 bits format .note. Talking to our toolchain folks, they think we'd rather stick to 32 bits format .note everywhere and get the spec fixed some day ... Signed-off-by:
Roland McGrath <roland@redhat.com> Signed-off-by:
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Colin Leroy authored
Ben's patch that shutdowns master switch and restores it after resume ("pmac: Improve sleep code of tumbler driver") isn't enough here on an iBook (snapper chip). The master switch is correctly saved and restored, but somehow tumbler_put_master_volume() gets called just after tumbler_set_master_volume() and sets mix->master_vol[*] to 0. So, on resuming, the master switch is reenabled, but the volume is set to 0. Here's a patch that also saves and restores master_vol. Signed-off-by:Colin Leroy <colin@colino.net> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by:
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