1. 07 Dec, 2006 17 commits
    • Christoph Lameter's avatar
      [IA64] resolve name clash by renaming is_available_memory() · 66888a6e
      Christoph Lameter authored
      There is a name clash with ia64 arch code in Andrew's tree. Rename
      is_avialable_memory() to is_memory_available() to avoid the clash.
      Signed-off-by: default avatarChristoph Lameter <clameter@sgi.com>
      Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
      Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
      66888a6e
    • Tony Luck's avatar
      [IA64] Need export for csum_ipv6_magic · a5f8ee02
      Tony Luck authored
      Now we have our own highly optimized assembly code version of
      this routine (Thanks Ken!) we should export it so that it can
      be used.
      Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
      a5f8ee02
    • Matthew Wilcox's avatar
      [IA64] Fix DISCONTIGMEM without VIRTUAL_MEM_MAP · b0f40ea0
      Matthew Wilcox authored
      make allnoconfig currently fails to build because it selects DISCONTIGMEM
      without VIRTUAL_MEM_MAP.  I see no particular reason this combination
      ought to fail, so I fixed it by:
      
       - Including memory_model.h in all circumstances, except when both
         DISCONTIGMEM and VIRTUAL_MEM_MAP are enabled.
       - Defining ia64_pfn_valid() to 1 unless VIRTUAL_MEM_MAP is enabled
      Signed-off-by: default avatarMatthew Wilcox <matthew@wil.cx>
      Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
      b0f40ea0
    • Venkatesh Pallipadi's avatar
      [PATCH] Add support for type argument in PAL_GET_PSTATE · 17e77b1c
      Venkatesh Pallipadi authored
      PAL_GET_PSTATE accepts a type argument to return different kinds of
      frequency information.
      Refer: Intel Itanium®Architecture Software Developer's Manual -
      Volume 2: System Architecture, Revision 2.2
      (http://developer.intel.com/design/itanium/manuals/245318.htm)
      
      Add the support for type argument and use Instantaneous frequency
      in the acpi driver.
      
      Also fix a bug, where in return value of PAL_GET_PSTATE was getting compared
      with 'control' bits instead of 'status' bits.
      Signed-off-by: default avatarVenkatesh Pallipadi <venkatesh.pallipadi@intel.com>
      Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
      17e77b1c
    • Chen, Kenneth W's avatar
      [IA64] tidy up return value of ip_fast_csum · 6dbfc19b
      Chen, Kenneth W authored
      While working on implementing csum_ipv6_magic, I noticed that current
      version of ip_fast_csum will potentially return bits above "unsigned
      short" as 1.  While no harm is done right now because all call sites
      will chop off the upper bits when it uses the return value.  However,
      this is still dangerous and buggy.  Here is a patch to enforce that the
      function really returns unsigned short in the native register format.
      
      The fix is free as there are plenty open slot to add one more asm instruction.
      Signed-off-by: default avatarKen Chen <kenneth.w.chen@intel.com>
      Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
      6dbfc19b
    • Chen, Kenneth W's avatar
      [IA64] implement csum_ipv6_magic for ia64. · 007d77d0
      Chen, Kenneth W authored
      The asm version is 4.4 times faster than the generic C version and
      10X smaller in code size.
      Signed-off-by: default avatarKen Chen <kenneth.w.chen@intel.com>
      Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
      007d77d0
    • Russ Anderson's avatar
      [IA64] More Itanium PAL spec updates · 5b4d5681
      Russ Anderson authored
      Additional updates to conform with Rev 2.2 of Volume 2 of "Intel
      Itanium Architecture Software Developer's Manual" (January 2006).
      
      Add pal_bus_features_s bits 52 & 53 (page 2:347)
      Add pal_vm_info_2_s field max_purges (page 2:2:451)
      Add PAL_GET_HW_POLICY call (page 2:381)
      Add PAL_SET_HW_POLICY call (page 2:439)
      
      Sample output before:
      ---------------------------------------------------------------------
      cobra:~ # cat /proc/pal/cpu0/vm_info
      Physical Address Space         : 50 bits
      Virtual Address Space          : 61 bits
      Protection Key Registers(PKR)  : 16
      Implemented bits in PKR.key    : 24
      Hash Tag ID                    : 0x2
      Size of RR.rid                 : 24
      Supported memory attributes    : WB, UC, UCE, WC, NaTPage
      ---------------------------------------------------------------------
      
      Sample output after:
      ---------------------------------------------------------------------
      cobra:~ # cat /proc/pal/cpu0/vm_info
      Physical Address Space         : 50 bits
      Virtual Address Space          : 61 bits
      Protection Key Registers(PKR)  : 16
      Implemented bits in PKR.key    : 24
      Hash Tag ID                    : 0x2
      Max Purges                     : 1
      Size of RR.rid                 : 24
      Supported memory attributes    : WB, UC, UCE, WC, NaTPage
      ---------------------------------------------------------------------
      
      Signed-off-by: Russ Anderson (rja@sgi.com)
      Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
      5b4d5681
    • Russ Anderson's avatar
      [IA64] Update processor_info features · 895309ff
      Russ Anderson authored
      Add the printing of additional processor features to proc_features.
      
      Based on Rev 2.2 of Volume 2 of "Intel Itanium Architecture Software
      Developer's Manual" (January 2006) fields (pages 2:430-2:432).
      This patch gets the features back in sync with the spec.
      
      Sample output before:
      --------------------------------------------------------------
      cobra:~ # cat /proc/pal/cpu0/processor_info
      XIP,XPSR,XFS implemented                 : On NoCtrl
      XR1-XR3 implemented                      : On NoCtrl
      Disable dynamic predicate prediction     : NotImpl
      Disable processor physical number        : NotImpl
      Disable dynamic data cache prefetch      : NotImpl
      Disable dynamic inst cache prefetch      : NotImpl
      Disable dynamic branch prediction        : NotImpl
      Disable BINIT on processor time-out      : On Ctrl
      Disable dynamic power management (DPM)   : NotImpl
      Disable coherency                        : NotImpl
      Disable cache                            : NotImpl
      Enable CMCI promotion                    : Off Ctrl
      Enable MCA to BINIT promotion            : Off Ctrl
      Enable MCA promotion                     : NotImpl
      Enable BERR promotion                    : NotImpl
      cobra:~ #
      --------------------------------------------------------------
      
      Sample output after:
      --------------------------------------------------------------
      cobra:~ # cat /proc/pal/cpu0/processor_info
      Unimplemented instruction address fault  : NotImpl
      INIT, PMI, and LINT pins                 : NotImpl
      Simple unimplimented instr addresses     : On NoCtrl
      Variable P-state performance             : NotImpl
      Virtual machine features implemeted      : On NoCtrl
      XIP,XPSR,XFS implemented                 : On NoCtrl
      XR1-XR3 implemented                      : On NoCtrl
      Disable dynamic predicate prediction     : NotImpl
      Disable processor physical number        : NotImpl
      Disable dynamic data cache prefetch      : NotImpl
      Disable dynamic inst cache prefetch      : NotImpl
      Disable dynamic branch prediction        : NotImpl
      Disable P-states                         : Off Ctrl
      Enable MCA on Data Poisoning             : Off Ctrl
      Enable vmsw instruction                  : On Ctrl
      Enable extern environmental notification : NotImpl
      Disable BINIT on processor time-out      : On Ctrl
      Disable dynamic power management (DPM)   : NotImpl
      Disable coherency                        : NotImpl
      Disable cache                            : NotImpl
      Enable CMCI promotion                    : Off Ctrl
      Enable MCA to BINIT promotion            : Off Ctrl
      Enable MCA promotion                     : NotImpl
      Enable BERR promotion                    : NotImpl
      cobra:~ #
      --------------------------------------------------------------
      
      Signed-off-by: Russ Anderson (rja@sgi.com)
      Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
      895309ff
    • Russ Anderson's avatar
      [IA64] Add se bit to Processor State Parameter structure · 6533bded
      Russ Anderson authored
      Rev 2.2 of Volume 2 of "Intel Itanium Architecture Software Developer's
      Manual" (January 2006) adds a se bit to the Processor State Parameter
      fields (pages 2:299).  This patch gets the structs back in sync
      with the spec.
      
      Signed-off-by: Russ Anderson (rja@sgi.com)
      Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
      6533bded
    • Russ Anderson's avatar
      [IA64] Add dp bit to cache and bus check structs · 323cbb09
      Russ Anderson authored
      Rev 2.2 of Volume 2 of "Intel Itanium Architecture Software Developer's
      Manual" (January 2006) adds a dp bit to the cache_check and bus_check
      fields (pages 2:401-2:404).  This patch gets the structs back in sync
      with the spec.
      
      Signed-off-by: Russ Anderson (rja@sgi.com)
      Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
      323cbb09
    • John Keller's avatar
      [IA64] SN: Correctly update smp_affinty mask · c6957771
      John Keller authored
      On Altix systems, the /proc/irq/nn/smp_affinity mask is not being setup
      at device iniitalization, or updated after an interrupt redirection.
      This patch resolves those issues.
      Signed-off-by: default avatarJohn Keller <jpk@sgi.com>
      Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
      c6957771
    • Matthew Wilcox's avatar
      [IA64] sparse cleanups · d61b49c1
      Matthew Wilcox authored
      0/NULL confusion and some missing UL on constants.
      Signed-off-by: default avatarMatthew Wilcox <matthew@wil.cx>
      Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
      d61b49c1
    • Zou Nan hai's avatar
      [IA64] IA64 Kexec/kdump · a7956113
      Zou Nan hai authored
      Changes and updates.
      
      1. Remove fake rendz path and related code according to discuss with Khalid Aziz.
      2. fc.i offset fix in relocate_kernel.S.
      3. iospic shutdown code eoi and mask race fix from Fujitsu.
      4. Warm boot hook in machine_kexec to SN SAL code from Jack Steiner.
      5. Send slave to SAL slave loop patch from Jay Lan.
      6. Kdump on non-recoverable MCA event patch from Jay Lan
      7. Use CTL_UNNUMBERED in kdump_on_init sysctl.
      Signed-off-by: default avatarZou Nan hai <nanhai.zou@intel.com>
      Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
      a7956113
    • Jesper Juhl's avatar
      [PATCH] A few small additions and corrections to README · 620034c8
      Jesper Juhl authored
      Here's a small patch which
      
       - adds a few archs to the current list of supported platforms.
       - adds a few missing slashes at the end of URLs.
       - adds a few references to additional documentation.
       - adds "make config" to the list of possible configuration targets.
       - makes a few other minor changes.
      Signed-off-by: default avatarJesper Juhl <jesper.juhl@gmail.com>
      [ Ben Nizette <ben.nizette@iinet.net.au> points out AVR32 arch too ]
      Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
      620034c8
    • Jesper Juhl's avatar
      [PATCH] Clean up 'make help' output for documentation targets. · 6fc52f81
      Jesper Juhl authored
      Here's a patch that cleans up the "make help" output a bit for the
      documentation targets.
      
      Currently the documentation targets are listed completely different than
      all the other targets :
      
        Documentation targets:
          Linux kernel internal documentation in different formats:
          xmldocs (XML DocBook), psdocs (Postscript), pdfdocs (PDF)
          htmldocs (HTML), mandocs (man pages, use installmandocs to install)
      
      with this patch they are more in line with the rest of the output :
      
        Documentation targets:
         Linux kernel internal documentation in different formats:
          htmldocs        - HTML
          installmandocs  - install man pages generated by mandocs
          mandocs         - man pages
          pdfdocs         - PDF
          psdocs          - Postscript
          xmldocs         - XML DocBook
      Signed-off-by: default avatarJesper Juhl <jesper.juhl@gmail.com>
      Acked-by: default avatarRandy Dunlap <randy.dunlap@oracle.com>
      Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
      6fc52f81
    • Linus Torvalds's avatar
      Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus · 3f5e573a
      Linus Torvalds authored
      * 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
        [MIPS] Import updates from i386's i8259.c
        [MIPS] *-berr: Header inclusions for DEC bus error handlers
        [MIPS] Compile __do_IRQ() when really needed
        [MIPS] genirq: use name instead of typename
        [MIPS] Do not use handle_level_irq for ioasic_dma_irq_type.
        [MIPS] pte_offset(dir,addr): parenthesis fix
      3f5e573a
    • Linus Torvalds's avatar
      Merge branch 'release' of master.kernel.org:/home/ftp/pub/scm/linux/kernel/git/aegl/linux-2.6 · 9232d587
      Linus Torvalds authored
      * 'release' of master.kernel.org:/home/ftp/pub/scm/linux/kernel/git/aegl/linux-2.6:
        [IA64] Fix pci.c kernel compilation breakage.
      9232d587
  2. 06 Dec, 2006 23 commits