Initialize all omap-uarts for zoom boards.  Now zoom_peripheral_init
will initialise all uarts for 3630. 3630sdp_board_init call
zoom_peripheral_init so we can now remove serial_init from 3630sdp
board init as zoom_peripheral_init now will do that the same.
Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>

Enable omap-serial driver in /mach-omap2/Kconfig and
move 8250 driver selection for zoom boards. With omap-serial
driver addition all omap-uarts can be handled with
omap-serial driver.

With addition of omap-serial driver console parameter
needs be changed in bootargs from ttyS* should be
replaced with ttyO* [O --> OMAP not ZERO]

For example: ttyS0[UART1 on 3430SDP] changes to ttyO0.

But with some boards that do not use omap-uart as console uart.
we need to handle them with 8250 driver. Ex: ZOOM2/3.
For zoom2/3 board we need to use 8250 serial driver and
console parameter will remain ttyS0 which basically uses
a Quad uart placed on the debug board connected through a
gpio line.
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>

This patch adds driver support for OMAP2/3/4 high speed UART.

The driver is made separate from 8250 driver as we cannot
over load 8250 driver with omap platform specific configuration for
features like DMA, it makes easier to implement features like DMA and
hardware flow control and software flow control configuration with
this driver as required for the omap-platform.
This patch involves only the core driver and its dependent.

Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Acked-by: Alan Cox <alan@linux.intel.com>
Acked-by: Greg Kroah-Hartman <gregkh@suse.de>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>

This patch makes the following:
 - Adds missing wakeup padding register handling.
 - Fixes a hardcode to use PER module ONLY on UART3.
Signed-off-by: Sergio Aguirre <saaguirre@ti.com>
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>

Add prepare idle and resume idle call for uart4 used by 3630.
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>

To standarize among other uarts (1 to 3), we shall now:

 - Enable uart4 autodile bit.
 - Enable uart4 wakeup in PER.
 - Allow uart4 to wakeup the MPU.
Signed-off-by: Sergio Aguirre <saaguirre@ti.com>
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>

This is only valid for omap 36xx family of chips.
Signed-off-by: Sergio Aguirre <saaguirre@ti.com>
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>

Since the UART enable/idle is done during the idle path (with
interrupts disabled), use the non-locking versions of the hwmod
enable/idle functions.
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>

Since the omap_device for UART is currently managed inside the idle
path itself,  don't let the bus-level code suspend/resume the UART.

To prevent this, pm_runtime_get() is used when preparing for suspend
and pm_runtime_put() is used when finished with suspend.
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>

Remove set_uart_globals function as this will not be needed as
physical address for uarts will be taken from hwmod data file.
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>

Major rework of OMAP UART init for omap_device conversion as well as
use with either 8250 driver or new omap-serial driver.

In preparation for a new omap-serial driver, remove 8250 assumptions
and dependencies from the serial core.

Convert UART core and PM support to use omap_device layer. Also add
support for both console on 8250 or omap-serial driver.

omap_device conversion:
- Convert clock API calls to omap_device calls
- Remove all static platform_data setup and configuration.  This is
  all done by the omap_device build phase.
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>

This patch adds omap_hwmod data for UARTs on OMAP2 and OMAP3
platforms.

UART4 support for 3630 and OMAP2 hwmod data added by Govindraj R.
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>

Add uart1-4 hwmod data into omap4_hwmod data file.
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>

Call runtime pm APIs pm_runtime_put_sync() and pm_runtime_get_sync()
for enabling/disabling the clocks, sysconfig settings instead of using
clock FW APIs.
Signed-off-by: Charulatha V <charu@ti.com>
Acked-by: Cousson, Benoit <b-cousson@ti.com>
Acked-by: Wim Van Sebroeck <wim@iguana.be>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>

This patch splits omap_init_wdt() into separate omap_init_wdt()
functions under mach-omap1 and mach-omap2 and set them up with
subsys_initcall.

Also it uses  omap_device_build() API instead of
platform_device_register() for watchdog timer device registration
for OMAP2plus chips.

For OMAP2plus chips, the device specific data defined in centralized
hwmod database will be used.
Signed-off-by: Charulatha V <charu@ti.com>
Acked-by: Cousson, Benoit <b-cousson@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>

Add watchdog timer hwmod data for OMAP4 chip

Note: wd_timer3 in enabled in the hwmod list but it is
not yet supported by the watchdog driver.
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Charulatha V <charu@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>

Add watchdog timer hwmod data for OMAP2430 chip
Signed-off-by: Charulatha V <charu@ti.com>
Acked-by: Cousson, Benoit <b-cousson@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>

Add watchdog timer hwmod data for OMAP2420 chip
Signed-off-by: Charulatha V <charu@ti.com>
Acked-by: Cousson, Benoit <b-cousson@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>

Add watchdog timer hwmod data for OMAP3 chip
Signed-off-by: Charulatha V <charu@ti.com>
Acked-by: Cousson, Benoit <b-cousson@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>

Disable CPUfreq since

1) is not yet supported in mainline, and
2) the current driver fails to suspend properly
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

In working towards a smaller default kernel, only devices used for
early boot should be built in.  Toward that end, build the following
as modules by default:

- bluetooth
- audio: ALSA, ASoC
- WLAN

Uncompressed kernel size comparison:

Before:
   text	   data	    bss	    dec	    hex	filename
6557576	 465088	5616024	12638688	 c0d9e0	vmlinux

After:
   text	   data	    bss	    dec	    hex	filename
5616572	 436448	5610800	11663820	 b1f9cc	vmlinux
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

Enable SMSC911x Ethernet driver for LogicPD's OMAP
3530 LV SOM and OMAP 35x Torpedo board.
Signed-off-by: Tim Nordell <tim.nordell@logicpd.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

Introduce of a generic way to setup smsc911x based Ethernet
controller connected to GPMC similar to gpmc-smc91x but without
timing setup.
Signed-off-by: Tim Nordell <tim.nordell@logicpd.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

Add low-level initialization for hsmmc controller for
LogicPD's OMAP 3530 LV SOM and OMAP 35x Torpedo board.
Signed-off-by: Tim Nordell <tim.nordell@logicpd.com>
[tony@atomide.com: updated for the recent mmc platform init changes]
Signed-off-by: Tony Lindgren <tony@atomide.com>

Adding support for LogicPD's OMAP 3530 LV SOM and
OMAP 35x Torpedo board.
Signed-off-by: Tim Nordell <tim.nordell@logicpd.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

Unnecessary cast from void* in assignment.
Signed-off-by: matt mooney <mfm@muteddisk.com>
Acked-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

add support for TI HECC.
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Tony Lindgren <tony@atomide.com>

add support for NAND flash.
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Tony Lindgren <tony@atomide.com>

add support for hsusb host ports 1, 2 and on-module usb hub.
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Tony Lindgren <tony@atomide.com>

add support for v3020 rtc.
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Tony Lindgren <tony@atomide.com>

Add basic suppot, enable uart and led.
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Tony Lindgren <tony@atomide.com>

When changing the L3 clock frequency, the CPU is executing from internal RAM
and the SDRC clock is disabled. During this time accesses made to external
DDR are stalled. If the ARM subsystem attempts to access the DDR while the
SDRC clock is disabled this will stall the CPU until the access to the SDRC
timeouts. A timeout on the SDRC should never occur. Once a timeout occurs all
the following accesses will be aborted and the DDR is no longer accessible.

Although the code being executed in the internal RAM does not directly access
the DDR, it was found that the branch prediction logic in the CPU may cause
the CPU to prefetch code from a DDR location while the SDRC clock is disabled.
This was causing an SDRC timeout which resulted in a system hang.

This patch fixes this problem by ensuring the branch prediction logic is
disabled while changing the L3 clock frequency. The branch prediction logic
is disabled by clearing the Z-bit in the ARM CTRL register.

Disabling the branch prediction logic does not have any noticable impact
on the execution time of this code section. The hardware observability
signals were used to monitor the sdrc idle time with and without this
patch when operating at different CPU frequencies (150MHz, 500MHz and
600MHz) and the total sdrc idle time when changing frequenct was in
the range of 9-11us. This was measured on an omap3430 SDP running the
omapzoom p-android-omap-2.6.29 branch.
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Richard Woodruff <r-woodruff2@ti.com>
Cc: Tony Lindgren <tony@atomide.com>

This patch has multiple fixes together. To ensure that git bisect work across
commits, all changes are clubbed together

1. Move the common control base address to control core
2. Remove the manually coeded defines and use the ones from headers.
3. Fix the the status register define in id.c for OMAP4
4. Fix all the register define in hsmmc.c
5. Use the control pad accessor API for omap4 hsmmc register accesses
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>

On OMAP4, control module is divided into 4 separate IPs
- OMAP44XX_CTRL_MODULE_CORE
- OMAP44XX_CTRL_MODULE_PAD_CORE
- OMAP44XX_CTRL_MODULE_WKUP
- OMAP44XX_CTRL_MODULE_PAD_WKUP

This patch adds all the omap4 control module register data and
includes them in the common control.h

The register data is autogenerated from the codebase thanks
to Benoit Cousson efforts
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>

On OMAP4 control pad are not addressable from control
core base. So the common omap_ctrl_read/write APIs breaks
Hence export separate APIs to manage the omap4 pad control
registers.

This APIs will work only for OMAP4
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>

On omap4 control module is divided in four IP blocks.
- CTRL_MODULE_CORE			0x4a002000
- CTRL_MODULE_PAD_CORE		0x4a100000
- CTRL_MODULE_WKUP			0x4a30c000
- CTRL_MODULE_PAD_WKUP		0x4a31e000

Addressing all the modules with single base address is not possible
considering 16 bit offsets. The mux code manages the pad core and pad
wakeup related base address inside the mux framework. For other usage
only control core and control pad bases are necessary. So this patch
maps only needed pad control base address which is used by device drivers
and infrastructure code

The main control core base is still kept same in this patch to
keep git-bisect working. This will be fixed in the relevant patch
in this series.
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>

Fix a few OMAP4430 clock tree problems after the recent manual merge of the
various ES2 clock patches:

- usim optional clock and its parent had the same name, rename the parent
usim_fclk -> usim_ck

- OPTFCLKEN_CLK32K is not handled anymore by the USBPHYOCP2SCP module in ES2
Create a new clock that belongs to CM_ALWON_USBPHY_CLKCTRL register

This patch depends on some of the PRCM macro updates from Rajendra.
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
[paul@pwsan.com: tweaked patch description]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Rajendra Nayak <rnayak@ti.com>