- 13 Sep, 2010 4 commits
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Chris Wilson authored
This closes a couple of corner cases where we introduced and forgot about a couple of routines that need to be called when disabling the crtc and then re-enabling it. The code needs to be moved again so that the common bits are shared across generations. Signed-off-by:Chris Wilson <chris@chris-wilson.co.uk>
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Chris Wilson authored
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Chris Wilson authored
One doesn't need to hold the mode lock in order to duplicate a mode. Signed-off-by: -
Chris Wilson authored
Commit 77d07fd9 introduced a regression where by not waiting for the panel to be turned off, left the panel and PLL registers locked across the modeset. Thus the panel remaining blank. As pointed out by Daniel Vetter, when testing LVDS it helps to open the laptop and look at the actual panel you are purporting to test. A second issue with the patch was that in order to modify the panel fitter before gen5, the pipe and the panel must have be completely powered down. So we wait. Signed-off-by:
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- 12 Sep, 2010 5 commits
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Chris Wilson authored
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Chris Wilson authored
The documentation says that an SDVO command takes a maximum of 15us to be processed by the device, and that it is sufficient to read the status byte 3 times (whilst the command is still in the PENDING state) for the driver to be confident that sufficient time has elapsed. We err on the safe side and try 5 times before giving up. The only question that remains: was the old behaviour derived by experiments with real hardware? A look into the murky history of UMS, implies that the behaviour was accidental and the current retry mechanism was solely designed to catch the status byte indicating PENDING with no reference to hardware behaviour. (commit ac9181c014638dbeb334b40b4029d0ccb2b7a0fc in xf86-video-intel) Signed-off-by: -
Chris Wilson authored
Avoid a potentially long busy-wait if we not in the process of atomically switching to the kdb console. Signed-off-by: -
Chris Wilson authored
We just assume that it will happen in a timely manner. A variant of this patch was first written and tested by Arjan van de Van. Signed-off-by: -
Chris Wilson authored
Just assume that it will turn off... Reported-by:
Sitsofe Wheeler <sitsofe@yahoo.com> Signed-off-by:
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- 11 Sep, 2010 7 commits
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Chris Wilson authored
Remove our redundant udelay() as the timings are already handled by the i2c-algo-bit controller. Signed-off-by: -
Chris Wilson authored
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Chris Wilson authored
The purpose is to make the code much easier to read and therefore reduce the possibility for bugs. A side effect is that it also makes it much easier for the compiler, reducing the object size by 4k -- from just a few functions! Signed-off-by: -
Chris Wilson authored
Refactor the common code into seperate functions and use the MIN(large, small) buffer calculation for self-refresh watermarks. Signed-off-by: -
Chris Wilson authored
We need to track different state on each generation in order to detect when we need to refresh the FBC registers. Signed-off-by: -
Jesse Barnes authored
Thermal reporting may not be enabled by default on some machines, so enable the appropriate bits to allow IPS to get the data it needs from the CPU thermal device. Signed-off-by:
Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by:
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Chris Wilson authored
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- 10 Sep, 2010 13 commits
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Chris Wilson authored
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Chris Wilson authored
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Chris Wilson authored
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Jesse Barnes authored
This allows FDI error checking to work. Signed-off-by:
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Jesse Barnes authored
TU size is only part of the M1 and M2 regs, not the N regs. This keeps us from overwriting a reserved field. Signed-off-by:
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Jesse Barnes authored
Easier to read, and will pair up with a disable function. Signed-off-by:
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Jesse Barnes authored
eDP panels require these to be set up prior to panel power sequencing, or they'll fail to power on due to an "asset not ready" check. And of course, eDP panels attached to anything other than DP_A need them enabled regardless, since they'll be driven from the CPU through FDI out to the PCH. Signed-off-by:
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Jesse Barnes authored
This will allow us to optimize our prepare/commit paths a bit better. Signed-off-by:
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Jesse Barnes authored
This was just a workaround for some broken Ironlake CRTC code. Signed-off-by:
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Jesse Barnes authored
So we can use it for CRTC prepare/commit. Signed-off-by:
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Jesse Barnes authored
This way we can also use it in CRTC prepare/commit. Also makes it easier to split out FDI and other code. Signed-off-by:
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Chris Wilson authored
create_singlethreaded_workqueue() is being phased out for a new concurrency managed task infrastructure. Adapt our workqueue constructor to explicitly create a domain that only allows the execution of a single task at any time. All the tasks are expected to require the dev->struct_mutex, so would block concurrency of other tasks if we allow more than a single i915 task to be run at once. Signed-off-by: -
Jesse Barnes authored
We don't know how to enable it safely, especially as outputs turn on and off. When disabling LP1 we also need to make sure LP2 and 3 are already disabled. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=29173 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=29082Reported-by:
Chris Lord <chris@linux.intel.com> Signed-off-by:
Daniel Vetter <daniel.vetter@ffwll.ch> Cc: stable@kernel.org Signed-off-by:
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- 09 Sep, 2010 5 commits
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Chris Wilson authored
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Chris Wilson authored
Currently we have a exact mapping of a connector onto an encoder for its whole lifetime. Make this an explicit property of the structure and so simplify the code. Signed-off-by:
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Chris Wilson authored
Why iterate all the crtcs to find the pipe, when we already know which crtc is attached to which pipe? Signed-off-by:
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Chris Wilson authored
[Patch is slightly larger than is strictly necessary to fixup surrounding checkpatch.pl errors.] Signed-off-by:
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Chris Wilson authored
If we are busy, then we may have woken up the wait_request handler but not yet serviced it before the hang check fires. So in hang check, double check that the i915_gem_do_wait_request() is still pending the wake-up before declaring all hope lost. Fixes regression with e78d73b1. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=30073Reported-and-tested-by:
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- 08 Sep, 2010 6 commits
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Chris Wilson authored
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Jesse Barnes authored
Otherwise we may not be able to train the DP link. Signed-off-by:
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Jesse Barnes authored
When turning on or off the VDD AUX bit, we need to give the panel time to start or stop or AUX transactions may fail. Signed-off-by:
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Jesse Barnes authored
Mode set sequence outlines when the AUX VDD bit should be set and cleared, and it's separate from the panel power sequence. Signed-off-by:
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Jesse Barnes authored
Mode set sequence requires that we start training, then enable the panel, then complete training. So split the DP training function into two parts; the first enables the DP port and sets training pattern 1 and the second completes the training. As part of this, remove some redundant function args from the various DP handling functions and use the intel_dp fields everywhere we can. Signed-off-by:
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Jesse Barnes authored
Mode setting sequence specifies that we use VDD AUX for configuration and detection, and early in the mode set sequence. Only later (after DP_A has started training) should we actually enable panel power. Signed-off-by:
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