- 14 Apr, 2016 1 commit
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Marcin Niestroj authored
uart0 configuration code has been in SOM. However, it is possible to use all (or none) of 6 uart's of AM335x processor present on ChiliSOM. This fix moves declaration of uart0 from ChiliSOM to ChiliBoard, because use of uart is strictly board-specific. Signed-off-by:
Marcin Niestroj <m.niestroj@grinn-global.com> Signed-off-by:
Tony Lindgren <tony@atomide.com>
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- 13 Apr, 2016 1 commit
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Tero Kristo authored
clkout1 clock node and its generation tree was missing. Add this based on the data on TRM and PRCM functional spec. Signed-off-by:
Tero Kristo <t-kristo@ti.com> Tested-by:
Benoit Parrot <bparrot@ti.com> Signed-off-by:
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- 12 Apr, 2016 32 commits
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Roger Quadros authored
On these boards NAND ready pin status is avilable over GPMC_WAIT0 pin. For NAND we don't use GPMC wait pin monitoring but get the NAND Ready/Busy# status using GPIOlib. GPMC driver provides the WAIT0 pin status over GPIOlib. Read speed increases from 13212 KiB/ to 15753 KiB/s and write speed was unchanged at 4404 KiB/s. Measured using mtd_speedtest.ko on omap3-beagle-c4. Signed-off-by:
Roger Quadros <rogerq@ti.com> Signed-off-by:
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Roger Quadros authored
On these boards NAND ready pin status is avilable over GPMC_WAIT0 pin. For NAND we don't use GPMC wait pin monitoring but get the NAND Ready/Busy# status using GPIOlib. GPMC driver provides the WAIT0 pin status over GPIOlib. Read speed increases from 7869 KiB/ to 8875 KiB/s and write speed was unchanged at 5100 KiB/s. Measured using mtd_speedtest.ko on am335x-evm. Cc: Teresa Remmet <t.remmet@phytec.de> Cc: Ilya Ledvich <ilya@compulab.co.il> Cc: Yegor Yefremov <yegorslists@googlemail.com> Cc: Rostislav Lisovy <lisovy@gmail.com> Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com> Signed-off-by:
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Roger Quadros authored
On these boards NAND ready pin status is avilable over GPMC_WAIT0 pin. For NAND we don't use GPMC wait pin monitoring but get the NAND Ready/Busy# status using GPIOlib. GPMC driver provides the WAIT0 pin status over GPIOlib. Read speed increases from 16516 KiB/ to 18813 KiB/s and write speed was unchanged at 9941 KiB/s. Measured using mtd_speedtest.ko. Signed-off-by:
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Roger Quadros authored
On these boards NAND ready pin status is avilable over GPMC_WAIT0 pin. Read speed increases from 13768 KiB/ to 17246 KiB/s. Write speed was unchanged at 7123 KiB/s. Measured using mtd_speedtest.ko. Signed-off-by:
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Roger Quadros authored
GPMC driver provides GPI support for the GPMC_WAIT pins. Mark it gpio controller capable. Signed-off-by:
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Roger Quadros authored
GPMC driver provides GPI support for the GPMC_WAIT pins. Mark it gpio controller capable. Signed-off-by:
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Roger Quadros authored
GPMC driver provides GPI support for the GPMC_WAIT pins. Mark it gpio controller capable. Signed-off-by:
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Roger Quadros authored
GPMC driver provides GPI support for the GPMC_WAIT pins. Mark it gpio controller capable. Signed-off-by:
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Roger Quadros authored
GPMC driver provides GPI support for the GPMC_WAIT pins. Mark it gpio controller capable. Signed-off-by:
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Roger Quadros authored
GPMC driver provides GPI support for the GPMC_WAIT pins. Mark it gpio controller capable. Signed-off-by:
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Roger Quadros authored
GPMC driver provides interrupts and gpio for the GPMC_WAIT pins. Mark it as gpio and interrupt capable. Signed-off-by:
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Roger Quadros authored
GPMC driver provides interrupts and gpio for the GPMC_WAIT pins. Mark it as gpio and interrupt capable. Signed-off-by:
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Roger Quadros authored
GPMC driver provides interrupts and gpio for the GPMC_WAIT pins. Mark it as gpio and interrupt capable. Signed-off-by:
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Paul Kocialkowski authored
This adds support for turning off the main power supply via the TWL6030 on the Kindle Fire (first generation). Signed-off-by:
Paul Kocialkowski <contact@paulk.fr> Signed-off-by:
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Paul Kocialkowski authored
This adds support for the Kindle Fire (first generation) power button LEDs, that are wired to the TWL6030 PWM outputs. Signed-off-by:
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Paul Kocialkowski authored
This adds support for USB OTG on the Kindle Fire (first generation). Signed-off-by:
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Paul Kocialkowski authored
The Amazon Kindle Fire (first generation) codename kc1 is a tablet that was released by Amazon back in 2011. It is using an OMAP4430 SoC GP version. This adds devicetree support for the device, with only a few basic features supported, such as debug uart, i2c and internal emmc. Signed-off-by:
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Paul Kocialkowski authored
This adds the amazon vendor prefix for Amazon.com, Inc. Signed-off-by:
Rob Herring <robh@kernel.org> Signed-off-by:
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Yegor Yefremov authored
Before "tty: Add software emulated RS485 support for 8250" patch Baltos devices relied on MCTRL_GPIO framework to handle both modem signals and RS485 mode. With emulated RS485 support for 8250 we can now use these pins as dedicated RTS/CTS signals taking advantage of hardware flow control etc. when operating in RS232 mode. Signed-off-by:
Yegor Yefremov <yegorslists@googlemail.com> Signed-off-by:
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Schuyler Patton authored
The AM572x-IDK board is a board based on TI's AM5728 SOC which has a dual core 1.5GHz A15 processor. This board is a development platform for the Industrial market with: - 2GB of DDR3L - Dual 1Gbps Ethernet - HDMI, - PRU-ICSS - uSD - 16GB eMMC - CAN - RS-485 - PCIe - USB3.0 - Video Input Port - Industrial IO port and expansion connector The link to the data sheet and TRM can be found here: http://www.ti.com/product/AM5728 This patch creates a common dtsi file that will provide a common board dtsi file to define the nodes that are common to AM57xx (including the upcoming AM5718) IDK boards. Initial support is only for basic peripherals Signed-off-by:
Schuyler Patton <spatton@ti.com> Signed-off-by:
Nishanth Menon <nm@ti.com> Signed-off-by:
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Lokesh Vutla authored
TI's Industrial Communication Engine EVM is a low cost hardware mainly developed for industrial communication type applications using serial or Ethernet based interfaces. This platform features TI's AM3359 with 800MHz single core Cortex-A8 processor, 256MB DDR3, 64MB SPI flash, 8MB NOR Flash, mmc, usb, can, dual Ethernet ports. For more information, look at HW user guide[1], Data manual[2]. Just add basic support for the moment. [1] http://processors.wiki.ti.com/index.php/AM335x_Industrial_Communication_Engine_EVM_Rev2_1_HW_User_Guide [2] http://www.ti.com/lit/ds/symlink/am3359.pdfSigned-off-by:
Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by:
Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by:
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Franklin S Cooper Jr authored
When possible generic node names should be used. So change the node name from ehrpwm to pwm. Signed-off-by:
Franklin S Cooper Jr <fcooper@ti.com> Signed-off-by:
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Ben Hutchings authored
The binding definition for the PCF857x GPIO expanders doesn't mention a "ti,pcf8575" compatible string. This is apparently because TI is only a second source - there is no functional difference between PCF8575 chips manufactured by TI and NXP, and the same board might be populated with either depending on availability. This is not a problem in practice because the I2C core uses of_modalias_node() before matching drivers and this strips the manufacturer name. Signed-off-by:
Ben Hutchings <ben.hutchings@codethink.co.uk> Acked-by:
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Filip Matijević authored
Signed-off-by:
Filip Matijević <filip.matijevic.pz@gmail.com> Signed-off-by:
Sebastian Reichel <sre@kernel.org> Acked-by:
Pavel Machek <pavel@ucw.cz> Signed-off-by:
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Filip Matijević authored
Signed-off-by:
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Sebastian Reichel authored
Signed-off-by:
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Sebastian Reichel authored
Like the Nokia N900, the N950 has leds to show the state of sys_clkreq and sys_off_mode pins. A detailed description for the LEDs and OMAP's sleep states can be found in Tony's commit for the Nokia N900: c1be2032Signed-off-by:
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Sebastian Reichel authored
Signed-off-by:
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Sebastian Reichel authored
Add keypad matrix information based on data from Nokia N950 Kernel. Signed-off-by:
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Sebastian Reichel authored
Add regulator configuration as found in the board files of Nokia's kernel. Signed-off-By:
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Roger Quadros authored
The switch configuration for NAND is actually the other way round. Also mention ON/OFF states as that is more natural to understand (without the help of schematics) when compared to HIGH/LOW. Signed-off-by:
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Nishanth Menon authored
Few regulators information were missing from DT. Add those missing regulators. Signed-off-by:
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- 11 Apr, 2016 6 commits
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Suman Anna authored
Add the DT node for Timer12 present on DRA7 family of SoCs. Timer12 is present in PD_WKUPAON power domain, and has the same capabilities as the other timers, except for the fact that it serves as a secure timer on HS devices and is clocked only from the secure 32K clock. Signed-off-by:
Suman Anna <s-anna@ti.com> Signed-off-by:
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Suman Anna authored
The Timers 13 through 16 have been added previously in disabled state. These timers are common timers that are present on all DRA7 family of SoCs, so enable these devices by default like the rest of the DMTimers. Signed-off-by:
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Peter Ujfalusi authored
Add nodes to represent all McASP ports in the dra7 family. For system consistency use the eDMA for audio operations. sDMA would be fine for 4/5/6/7/8 since their DAT port is not through L3 interconnect. Signed-off-by:
Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by:
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Peter Ujfalusi authored
rename the mcasp8_ahclk_mux to mcasp8_ahclkx_mux. Signed-off-by:
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Peter Ujfalusi authored
Since we switched to use eDMA we can now safely enable the FIFO in McASP. This will reduce the chance of McASP level under/overflow. Signed-off-by:
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Peter Ujfalusi authored
The assigned-clock* needs to be in the root of the device's node. If it is in the sub-node the CCF will ignore it. Since the clkout2 is used by the codec as MCLK, move the clock parent selection to that node. Signed-off-by:
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