- 11 Jan, 2013 3 commits
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Tony Lindgren authored
Some systems compile in both ARMv6 and ARMv7 into multiplatform configurations. This means the default compiler flags are for ARMv6, and we will get: arch/arm/mach-mvebu/coherency_ll.S: Assembler messages: arch/arm/mach-mvebu/coherency_ll.S:45: Error: selected processor does not support `dsb' Fix this by specifying ARMv7 flags for coherency_ll.o. Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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Linus Walleij authored
The Integrator/AP syscon remapping was done in the .setup() function rather than .preinit() which is wrong - .preinit() is called before .setup() and the former also use the syscon base and cause a crash since it was not yet remapped. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
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git://git.infradead.org/users/jcooper/linuxOlof Johansson authored
From Jason Cooper: mvebu fixes for v3.8-rc3 - gpio fixes in mvebu, kirkwood, and dove - small DT fix for mvebu (correct RAM size) * tag 'mvebu_fixes_for_v3.8-rc3' of git://git.infradead.org/users/jcooper/linux: arm: mvebu: Fix memory size for Armada 370 DB ARM: Dove: add Cubox sdhci card detect gpio ARM: Kirkwood: fix ns2 gpios by converting to pinctrl arm: mvebu: use global interrupts for GPIOs on Armada XP
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- 10 Jan, 2013 3 commits
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Gregory CLEMENT authored
Actually the Armada 370 DB (aka DB-88F6710-BP-DDR3) come with 1GB and not 512MB. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Sebastian Hesselbarth authored
Card detect for sdhci on Cubox is connected to the wrong pin (sdio1_cd instead of sdio0_cd). With support for cd-gpios and pinctrl add the corresponding properties to DT for Cubox. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Simon Guinot authored
Note that the pinctrl conversion also fixes GPIO support for ns2 boards. Since commit f9e75922: "ARM: Kirkwood: Make use of mvebu pincltl and gpio", the mvbu_gpio driver is used for DT boards. As mvbu_gpio relies on the pinctrl driver, then a pinctrl definition must be given to allow the GPIO configuration. Signed-off-by: Simon Guinot <simon.guinot@sequanux.org> Acked-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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- 08 Jan, 2013 15 commits
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Olof Johansson authored
Merge tag 'omap-for-v3.8-rc2/fixes-signed-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes From Tony Lindgren: The biggest change is a fix to deal with different power state on omap2 registers that causes issues trying to use common PM code. Also fix few incorrect registers, and an issue for omap1 USB, and few sparse fixes for issues that sneaked in with all the clean-up. * tag 'omap-for-v3.8-rc2/fixes-signed-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP2+: am33xx-hwmod: Fix wrongly terminated am33xx_usbss_mpu_irqs array ARM: OMAP1: fix USB configuration use-after-release ARM: OMAP2/3: PRM: fix bogus OMAP2xxx powerstate return values ARM: OMAP3: clock data: Add missing enable/disable for EMU clock ARM: OMAP4: PRM: Correct wrong instance usage for reading reset sources ARM: OMAP4: PRM: fix RSTTIME and RSTST offsets ARM: OMAP4: PRM: Correct reset source map ARM: OMAP: SRAM: resolve sparse warnings ARM: OMAP AM33xx: hwmod data: resolve sparse warnings ARM: OMAP: 32k counter: resolve sparse warnings Signed-off-by: Olof Johansson <olof@lixom.net>
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Olof Johansson authored
Merge branch 'v3.8-samsung-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into fixes From Kukjin Kim: Most of them are EXYNOS5440 fixes which are for changing uart console, cpu id (typo) and silent complaining gpio error in kernel boot. * 'v3.8-samsung-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: EXYNOS: skip the clock initialization for exynos5440 ARM: EXYNOS: enable PINCTRL for EXYNOS5440 ARM: dts: use uart port1 for console on exynos4210-smdkv310 ARM: dts: use uart port0 for console on exynos5440-ssdk5440 ARM: SAMSUNG: fix the cpu id for EXYNOS5440 ARM: EXYNOS: Revise HDMI resource size
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git://git.linaro.org/people/shawnguo/linux-2.6Olof Johansson authored
From Shawn Guo: I have to send one critical mxsfb fix through arm-soc, as FB maintainer is unresponsive for quite a while. People start complaining the missing of such an important fix. * tag 'mxs-fixes-3.8' of git://git.linaro.org/people/shawnguo/linux-2.6: video: mxsfb: fix crash when unblanking the display ARM: dts: imx23-olinuxino: Fix IOMUX settings
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git://git.linaro.org/people/shawnguo/linux-2.6Olof Johansson authored
From Shawn Guo: It includes one critical fix - wrong flexcan2 clock will hang system when the port gets brought up. The other two are non-critical fixes, which are sent together here, since it's still early -rc stage. * tag 'imx-fixes-3.8' of git://git.linaro.org/people/shawnguo/linux-2.6: ARM: mx5: Fix MX53 flexcan2 clock ARM: dts: imx31-bug: Fix manufacturer compatible string clk: imx: Remove 'clock-output-names' from the examples
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Thomas Petazzoni authored
The Armada XP GPIO controller has two ways of notifying interrupts: using global interrupts or using per-CPU interrupts. In an attempt to use the best available features, the 'marvell,armadaxp-gpio' compatible string selects a variant of the gpio-mvebu driver that makes use of the per-CPU interrupts. Unfortunately, this doesn't work properly in a SMP context, because we fall into cases where the GPIO interrupt is enabled on CPU X at the GPIO controller level, but on CPU Y at the interrupt controller level. It is not yet clear how to fix that easily. So for 3.8, our approach is to switch to global interrupts for GPIOs, so that we do not fall into this per-CPU interrupts problem. This patch therefore fixes GPIO interrupts on Armada XP platforms. Without this patch, GPIO interrupts simply do not work reliably, because their proper operation depends on which CPU the code requesting the interrupt is running. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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git://git.infradead.org/users/jcooper/linuxOlof Johansson authored
From Jason Cooper: fixes for mvebu/kirkwood v3.8 - use correct uart driver for mvebu boards - add a missing DT clocks - gpio-poweroff level vs. edge triggering, use gpio_is_valid() - remove an inappropriate __init, modules need to access function. - various DT fixes - error handling in mv_xor * tag 'mvebu_fixes_for_v3.8' of git://git.infradead.org/users/jcooper/linux: pinctrl: mvebu: make pdma clock on dove mandatory ARM: Dove: Add pinctrl clock to DT dma: mv_xor: fix error handling for clocks dma: mv_xor: fix error handling of mv_xor_channel_add() arm: mvebu: Add missing ; for cpu node. arm: mvebu: Armada XP MV78230 has only three Ethernet interfaces arm: mvebu: Armada XP MV78230 has two cores, not one clk: mvebu: Remove inappropriate __init tagging ARM: Kirkwood: Use fixed-regulator instead of board gpio call ARM: Kirkwood: Fix missing sdio clock ARM: Kirkwood: Switch TWSI1 of 88f6282 to DT clock providers Power: gpio-poweroff: Fix documentation and gpio_is_valid ARM: Kirkwood: Fix missing clk for USB device. arm: mvebu: Use dw-apb-uart instead of ns16650 as UART driver Signed-off-by: Olof Johansson <olof@lixom.net>
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Olof Johansson authored
I mismerged a previous branch from Alexander, and accidentally left in ARCH_USES_GETTIMEOFFSET. Remove it. Signed-off-by: Olof Johansson <olof@lixom.net> Cc: Alexander Shiyan <shc_work@mail.ru>
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Olof Johansson authored
Merge tag 'nomadik-fixes-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into fixes From Linus Walleij: Two fixes to the Nomadik: - Delete a dangling include - Bump IRQ numbers to offset at 32 * tag 'nomadik-fixes-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik: ARM: nomadik: bump the IRQ numbers again ARM: nomadik: delete dangling include
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Rob Herring authored
This fixes suspend to RAM adding necessary save and restore of L2 and GIC. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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Rob Herring authored
When we fail to power down, we need to clear out the power request. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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Rob Herring authored
With commit 384a2902 (ARM: gic: use a private mapping for CPU target interfaces), wake-up IPIs now go to all cores as the gic cpu interface numbering may not follow core numbering. This broke secondary boot on highbank since the boot address was already set for all secondary cores, this caused all cores to boot before the kernel was ready. Fix this by moving the setting of the jump address to highbank_boot_secondary instead of highbank_smp_prepare_cpus and highbank_cpu_die. Also, clear the address when we boot. This prevents cores from booting before they are actually triggered and is also necessary to get suspend/resume to work. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
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Rob Herring authored
s/hignbank/highbank/ Signed-off-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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Rob Herring authored
With the addition of commit a0ae0240 (ARM: kernel: add device tree init map function), the cpu reg values must match the cpu mpidr register or we'll get warnings. For some reason, the CLUSTERID on highbank is 9, so the reg value needs to be 0x90n to quiet the warnings. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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Rob Herring authored
While device_type is considered deprecated, it is still needed for tools like lshw to identify cpu nodes. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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Marek Vasut authored
The second FlexCAN port uses different clock than the first one, configure correct clock to prevent hanging of the system during bringing up of the port. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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- 07 Jan, 2013 3 commits
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Pantelis Antoniou authored
The IRQ array must be terminated by -1 and not by -1+OMAP_INTC_START This led to having a resource list of 100s of IRQs. Looks like this was caused by commit a2cfc509 (ARM: OMAP3+: hwmod: Add AM33XX HWMOD data) that probably had some search and replace updates done for the patch for sparse irq support. Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com> Acked-by: Paul Walmsley <paul@pwsan.com> [tony@atomide.com: updated wit information about the breaking commit] Signed-off-by: Tony Lindgren <tony@atomide.com>
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Sebastian Hesselbarth authored
With the ability to pass clocks through DT, now make the pdma clock of dove pinctrl mandatory. Otherwise, pinctrl will hang the system when accessing some registers. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Sebastian Hesselbarth authored
During merge of the mvebu patches a clock gate for pinctrl was lost. This patch just readds the clock gate. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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- 06 Jan, 2013 12 commits
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Thomas Petazzoni authored
When a channel fails to initialize, we release all ressources, including clocks. However, a XOR unit is not necessarily associated to a clock (some variants of Marvell SoCs have a clock for XOR units, some don't), so we shouldn't unconditionally be releasing the clock. Instead, just like we do in the mv_xor_remove() function, we should check if one clock was found before releasing it. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Thomas Petazzoni authored
When mv_xor_channel_add() fails for one XOR channel, we jump to the err_channel_add label to clean up all previous channels that had been initialized correctly. Unfortunately, while handling this error condition, we were disposing the IRQ mapping before calling mv_xor_channel_remove() (which does the free_irq()), which is incorrect. Instead, do things properly in the reverse order of the initialization: first remove the XOR channel (so that free_irq() is done), and then dispose the IRQ mapping. This avoids ugly warnings when for some reason one of the XOR channel fails to initialize. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Andrew Lunn authored
The Armada XP MV78230 DT include file is missing a ; at the end of the cpu node. Reported-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Thomas Petazzoni authored
We originally thought that the MV78230 variant of the Armada XP had four Ethernet interfaces, like the other variants MV78260 and MV78460. In fact, this is not true, and the MV78230 has only three Ethernet interfaces. So, the definitions of the Ethernet interfaces is now done as follows: * armada-370-xp.dtsi: definitions of the first two interfaces, that are common to Armada 370 and Armada XP * armada-xp.dtsi: definition of the third interface, common to all Armada XP variants. * armada-xp-mv78260.dtsi and armada-xp-mv78460.dtsi: definition of the fourth interface. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Thomas Petazzoni authored
Contrary to our understanding at the time armada-xp-mv78230.dtsi was written, the MV78230 variant of the Armada XP SoC has two cores and not one. This patch updates the .dtsi file to take into account this reality. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Joshua Coombs authored
If the Orion WDT driver is built as a module, an opps occurs during clk lookup when calling mvebu_clk_gating_get_src(). Remove the inappropriate __init tag so the function is available for modules after kernel init. Signed-off-by: Joshua Coombs <josh.coombs@gmail.com> Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Andrew Lunn authored
With the change to a DT based pinctrl/gpio driver, using gpio API calls in board-*.c files no longer works, a dereferenced NULL pointer exception occurs instead. By converting the GPIO code into a fixed-regulator which gets probed later once pinctrl/gpio is available, we avoid the exception. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Stefan Peter <s.peter@mplch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Andrew Lunn authored
We moved to declaring clk gates in DT. However, device which do not yet have a DT binding need to have a clkdev alias. This was missing for SDIO. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Stefan Peter <s.peter@mplch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Nobuhiro Iwamatsu authored
Clock Management of kirkwood has moved to DT clock providers. However, TWSI1 has not yet been done. This switches TWSI1 of 88f6282 to DT clock providers. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Andrew Lunn authored
Improve the documentation to clarify level vs edge triggered power off. Improve the comments for level vs edge triggered power off. Make use of gpio_is_valid(). Reported-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Andrew Lunn authored
Without the clock being held by a driver, it gets turned off at a bad time causing the SoC to lockup. This is often during reboot. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Stefan Peter <s.peter@mpl.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Gregory CLEMENT authored
The UART controller used in the Armada 370 and Armada XP SoCs is the Synopsys DesignWare 8250 (aka Synopsys DesignWare ABP UART). The improper use of the ns16550 can lead to a kernel oops during boot if a character is sent to the UART before the initialization of the driver. The DW APB has an extra interrupt that gets raised when writing to the LCR when busy. This explains why we need to use dw-apb-uart driver to handle this. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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- 05 Jan, 2013 1 commit
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Kukjin Kim authored
Since exynos5440 can support only common clk stuff, so this patch skips legacy exynos5 clock initialization. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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- 04 Jan, 2013 3 commits
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Lothar Waßmann authored
The VDCTRL4 register does not provide the MXS SET/CLR/TOGGLE feature. The write in mxsfb_disable_controller() sets the data_cnt for the LCD DMA to 0 which obviously means the max. count for the LCD DMA and leads to overwriting arbitrary memory when the display is unblanked. Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Acked-by: Juergen Beisert <jbe@pengutronix.de> Tested-by: Lauri Hintsala <lauri.hintsala@bluegiga.net> Cc: <stable@vger.kernel.org> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Fabio Estevam authored
In the compatible field we should point the manufacturer of the board, which in this case is Buglabs. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Fabio Estevam authored
'clock-output-names' is not used in any of the dts/dtsi files for i.mx. Remove it from the examples, so that the example and the real usage in the dtsi files can match. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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