Only available for R4000 style TLBs anyway and proper ordering of
initialization code made this crude interface unncecessary.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

On MIPS the generic PCI code has always defaulted to L1_CACHE_BYTES
because the architecutre PCI code did not provide a better default.
In particular on systems with S-caches or T-caches this was suboptimal.

Provide a better default by setting pci_dfl_cache_line_size based on
the size of the line size of the lowest level of the cache hierarchy.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/2982/

When flushing TLB, if @vma is backed by huge page, we could flush huge
TLB, due to that huge page is defined to be far from normal page.
Signed-off-by: Hillf Danton <dhillf@gmail.com>
Acked-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Cc: "Jayachandran C." <jayachandranc@netlogicmicro.com>
Patchwork: https://patchwork.linux-mips.org/patch/2825/Signed-off-by: David Daney <david.daney@cavium.com>
Acked-by: Hillf Danton <dhillf@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/3114/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3006/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

The PB1200 has the CPLD located at an address which on the DB1200 is
RAM;  reading the Board-ID sometimes results in a PB1200 being detected
instead (especially during reboots after long uptimes).
On the other hand, the address of the DB1200's CPLD is hosting Flash
chips on the PB1200.  Test for the DB1200 first and additionally do a
quick write-test to the hexleds register to make sure we're writing
to the CPLD.
Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3005/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

With a generic plat_irq_dispatch (for Alchemy at least) code for both
interrupt controller types can coexist in a single kernel image and be
autodetected at runtime.
Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2935/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

IC and GPIC are now chain handlers of the traditional MIPS IRQ controller.
Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2933/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

No need for a device_initcall.
Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2934/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Wire up the ADS7846 touchscreen controller on the DB1100.
Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2879/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Add necessary transceiver control platform data and hook up the
IrDA peripheral on the DB1000 and DB1100 boards.
Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2878/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Moderate driver cleanup:
convert to platform driver, get rid of board-specific code.

Driver loads and runs on a DB1100 board.  But since I have no other
IrDA hardware to exchange data with I can't say whether it really sends
and receives.
Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
Cc: Samuel Ortiz <samuel@sortiz.org>
Cc: netdev@vger.kernel.org
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2877/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

The information in those headers is no longer necessary.
Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2876/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Transform the au1550nd.c driver into a platform_driver and hook it
up in the PB1550 board (gen_nand works fine on the DB1550, but since
I don't have a PB1550 to test this driver stays for now).
Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
Cc: linux-mtd@lists.infradead.org
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2875/
Patchwork: https://patchwork.linux-mips.org/patch/3160/Acked-by: Artem Bityutskiy <dedekind1@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Since commit [e58aa3d2: genirq: Run irq handlers with interrupts disabled],
We run all interrupt handlers with interrupts disabled and we even check
and yell when an interrupt handler returns with interrupts enabled (see
commit [b738a50a: genirq: Warn when handler enables interrupts]).

So now this flag is a NOOP and can be removed.

[ralf@linux-mips.org: Fixed up conflicts in
arch/mips/alchemy/common/dbdma.c, arch/mips/cavium-octeon/smp.c and
arch/mips/kernel/perf_event.c.]
Signed-off-by: Yong Zhang <yong.zhang0@gmail.com>
To: linux-kernel@vger.kernel.org
Cc: tglx@linutronix.de
linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2835/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

This patch addresses a couple of related problems:

1) The kernel may reside in physical memory outside of the ranges set
   by plat_mem_setup().  If this is the case, init mem cannot be
   reused as it resides outside of the range of pages that the kernel
   memory allocators control.

2) initrd images might be loaded in physical memory outside of the
   ranges set by plat_mem_setup().  The memory likewise cannot be
   reused.  The patch doesn't handle this specific case, but the
   infrastructure is useful for future patches that do.

The crux of the problem is that there are memory regions that need be
memory_present(), but that cannot be free_bootmem() at the time of
arch_mem_init().  We create a new type of memory (BOOT_MEM_INIT_RAM)
for use with add_memory_region().  Then arch_mem_init() adds the init
mem with this type if the init mem is not already covered by existing
ranges.

When memory is being freed into the bootmem allocator, we skip the
BOOT_MEM_INIT_RAM ranges so they are not clobbered, but we do signal
them as memory_present().  This way when they are later freed, the
necessary memory manager structures have initialized and the Sparse
allocater is prevented from crashing.

The Octeon specific code that handled this case is removed, because
the new general purpose code handles the case.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1988/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Gup is used in a few cases, say futex.

This work is derived from the x86 version, and operations of pte and pmd are
adapted to the defines of MIPS in straight forward manner.

[ralf@linux-mips.org: Fixed up reject in arch/mips/mm/Makefile due to
whitespace formatting differences.  Fixed build error in gup.c due to
conflicting changes elsewhere in the kernel.]
Signed-off-by: Hillf Danton <dhillf@gmail.com>
Cc: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2859/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

If we only flush the TLB of the given huge page, the TLB cache remains hot
for the relevant mm as it is, and less will be refilled after flush, huge
or not.
Signed-off-by: Hillf Danton <dhillf@gmail.com>
Cc: linux-mips@linux-mips.org
Acked-by: David Daney <david.daney@cavium.com>
Patchwork: https://patchwork.linux-mips.org/patch/2860/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

SGI IP22/IP28 machines have GIO busses for adding graphics and other
extension cards. This patch adds support for GIO driver/device
handling and converts the newport console driver to a GIO driver.

[ralf@linux-mips.org: Fixed build error caused by the modules.h -> export.h
changes.]
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Acked-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
To: linux-fbdev@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/2886/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

All Devboards can use the 32kHz counter as a RTC device.

Also delete the custom CMOS RTC header, which can be used for the
DS1693 on the PB1500.  But since it doesn't have a buffer battery
it is as useful as the on-chip RTC which I prefer.
Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2874/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

This patch hooks up the 2 MMC sockets on the DB1100 board.
Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2873/
Patchwork: https://patchwork.linux-mips.org/patch/2920/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

These 3 boards are very similar; with this patch a single kernel image
which runs on all three can be built.

Tested on DB1500 and DB1100.
Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2872/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

The PB1200 is basically a DB1200 with additional MMC and camera sockets
and different base addresses for external hardware (CPLD, IDE, Net, NAND).

This patch implements the missing PB1200 features in DB1200 support code
and runtime board detection.

Tested on DB1200 only.
Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2880/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

au1200fb calls 3 functions which have to be defined in board code.
Fix this ugliness with the introduction of platform_data.
Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
Cc: linux-fbdev@vger.kernel.org
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2871/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2884/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Most of these files are have more comments than real code;  merge
them all into single board-<name>.c files.
Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2869/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2868/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2867/
Patchwork: https://patchwork.linux-mips.org/patch/2919/
Patchwork: https://patchwork.linux-mips.org/patch/2928/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Add basic support for the Au1300 variant(s):
- New GPIO/Interrupt controller
- DBDMA ids
- USB setup
- MMC support
- enable various PSC drivers
- detection code.
Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2866/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Initially I had to write to both the MASK and ENABLE registers, otherwise
the CPLD would generate tons of spurious interrupts.  With the change to
the demux handler to disable the muxed line, it is now sufficient to
disable the interrupt by writing either the enable or mask register.
Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2865/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

No test hardware and no (apparent) users.  These boards seem very
similar to the DB1500, so if required support can be brought back
again (I have datasheets) but then with dedicated board code, not
tacked on to DB1000 support.
Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2864/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Noone seems to have test hardware or care anymore.  Drop PB1000 support
and along with it the old Alchemy PCMCIA socket driver.
Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: linux-mips@linux-mips.org
Cc: netdev@vger.kernel.org
Cc: linux-pcmcia@lists.infradead.org
Patchwork: https://patchwork.linux-mips.org/patch/2881/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Move add_wired_entry to its own header file from where it will be
always included.  Patch up other users of add_wired_entry to also include
the header as needed.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Panic() invokes printk() to add a \n internally, so panic arguments should
not themselves end in \n.  Panic invocations in arch/mips and elsewhere
are inconsistently sometimes terminating in \n, sometimes not.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Move PCI Controller PM to syscore_ops since the platform_driver PM methods
are called way too late on resume and far too early on suspend (after and
before PCI device resume/suspend).
This also allows to simplify wired entry management a bit.
Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3007/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

* 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jlbec/ocfs2: (31 commits)
  ocfs2: avoid unaligned access to dqc_bitmap
  ocfs2: Use filemap_write_and_wait() instead of write_inode_now()
  ocfs2: honor O_(D)SYNC flag in fallocate
  ocfs2: Add a missing journal credit in ocfs2_link_credits() -v2
  ocfs2: send correct UUID to cleancache initialization
  ocfs2: Commit transactions in error cases -v2
  ocfs2: make direntry invalid when deleting it
  fs/ocfs2/dlm/dlmlock.c: free kmem_cache_zalloc'd data using kmem_cache_free
  ocfs2: Avoid livelock in ocfs2_readpage()
  ocfs2: serialize unaligned aio
  ocfs2: Implement llseek()
  ocfs2: Fix ocfs2_page_mkwrite()
  ocfs2: Add comment about orphan scanning
  ocfs2: Clean up messages in the fs
  ocfs2/cluster: Cluster up now includes network connections too
  ocfs2/cluster: Add new function o2net_fill_node_map()
  ocfs2/cluster: Fix output in file elapsed_time_in_ms
  ocfs2/dlm: dlmlock_remote() needs to account for remastery
  ocfs2/dlm: Take inflight reference count for remotely mastered resources too
  ocfs2/dlm: Cleanup dlm_wait_for_node_death() and dlm_wait_for_node_recovery()
  ...

The dqc_bitmap field of struct ocfs2_local_disk_chunk is 32-bit aligned,
but not 64-bit aligned.  The dqc_bitmap is accessed by ocfs2_set_bit(),
ocfs2_clear_bit(), ocfs2_test_bit(), or ocfs2_find_next_zero_bit().  These
are wrapper macros for ext2_*_bit() which need to take an unsigned long
aligned address (though some architectures are able to handle unaligned
address correctly)

So some 64bit architectures may not be able to access the dqc_bitmap
correctly.

This avoids such unaligned access by using another wrapper functions for
ext2_*_bit().  The code is taken from fs/ext4/mballoc.c which also need to
handle unaligned bitmap access.
Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com>
Acked-by: Joel Becker <jlbec@evilplan.org>
Cc: Mark Fasheh <mfasheh@suse.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Joel Becker <jlbec@evilplan.org>