- 03 May, 2012 16 commits
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Christian König authored
Nothing chipset or ring specific with it, so also move it to radon_ring. Signed-off-by:
Christian König <deathsimple@vodafone.de> Reviewed-by:
Jerome Glisse <jglisse@redhat.com> Signed-off-by:
Dave Airlie <airlied@redhat.com>
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Christian König authored
Fixing just another deadlock problem with gpu reset tests. Signed-off-by:
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Christian König authored
Don't hard code the 10 seconds timeout. Compute jobs can run much longer. Signed-off-by:
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Christian König authored
It isn't chipset specific, so it makes no sense to have that inside r100.c. Signed-off-by:
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Christian König authored
Instead of all this humpy pumpy with recursive mutex (which also fixes only halve of the problem) move the actual gpu reset out of the fence code, return -EDEADLK and then reset the gpu in the calling ioctl function. v2: Split removal of radeon_mutex into separate patch. Return -EAGAIN if reset is successful. Signed-off-by: -
Christian König authored
Rings need to lock in order, otherwise the ring subsystem can deadlock. v2: fix error handling and number of locked doublewords. v3: stop creating unneeded semaphores. Signed-off-by:
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Christian König authored
It's never used and so practically superfluous. Signed-off-by:
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Christian König authored
As discussed with Michel that name better describes the behavior of this function. Signed-off-by:
Michel Dänzer <michel.daenzer@amd.com> Reviewed-by:
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Christian König authored
We should signal the caller that we haven't waited at all. v2: only change fence_wait_next not fence_wait_last. Signed-off-by:
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Christian König authored
Aligning offset can make it bigger than tmp->offset leading to an overrun bug in the following subtraction. v2: Against initial suspicions this can't happen in mainline, so no need to push it into stable. Signed-off-by: -
Christian König authored
Previusly multiple rings could trigger multiple GPU resets at the same time. Signed-off-by:
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Christian König authored
Removing all the different error messages and having just one standard behaviour over all chipset generations. Signed-off-by:
Alex Deucher <alexander.deucher@amd.com> Reviewed-by:
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Christian König authored
Just register the debugfs files on init instead of checking the chipset type multiple times. Signed-off-by:
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Christian König authored
It makes no sense at all to have more than one flag. Signed-off-by:
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Christian König authored
Different rings have different criteria to test if they are stuck. v2: rebased on current drm-next Signed-off-by:
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Patrik Jakobsson authored
Signed-off-by:
Patrik Jakobsson <patrik.r.jakobsson@gmail.com> Acked-by:
Alan Cox <alan@linux.intel.com> Signed-off-by:
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- 02 May, 2012 2 commits
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Dave Airlie authored
These can all be trigged from userspace if you pass the right values. v2: rebase on later kernel. Reviewed-by:
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Dave Airlie authored
Merge tag 'drm-intel-next-2012-04-23' of git://people.freedesktop.org/~danvet/drm-intel into drm-core-next Daniel Vetter writes: A new drm-intel-next pull. Highlights: - More gmbus patches from Daniel Kurtz, I think gmbus is now ready, all known issues fixed. - Fencing cleanup and pipelined fencing removal from Chris. - rc6 residency interface from Ben, useful for powertop. - Cleanups and code reorg around the ringbuffer code (Ben&me). - Use hw semaphores in the pageflip code from Ben. - More vlv stuff from Jesse, unfortunately his vlv cpu is doa, so less merged than I've hoped for - we still have the unused function warning :( - More hsw patches from Eugeni, again, not yet enabled fully. - intel_pm.c refactoring from Eugeni. - Ironlake sprite support from Chris. - And various smaller improvements/fixes all over the place. Note that this pull request also contains a backmerge of -rc3 to sort out a few things in -next. I've also had to frob the shortlog a bit to exclude anything that -rc3 brings in with this pull. Regression wise we have a few strange bugs going on, but for all of them closer inspection revealed that they've been pre-existing, just now slightly more likely to be hit. And for most of them we have a patch already. Otherwise QA has not reported any regressions, and I'm also not aware of anything bad happening in 3.4. * tag 'drm-intel-next-2012-04-23' of git://people.freedesktop.org/~danvet/drm-intel: (420 commits) drm/i915: rc6 residency (fix the fix) drm/i915/tv: fix open-coded ARRAY_SIZE. drm/i915: invalidate render cache on gen2 drm/i915: Silence the change of LVDS sync polarity drm/i915: add generic power management initialization drm/i915: move clock gating functionality into intel_pm module drm/i915: move emon functionality into intel_pm module drm/i915: move drps, rps and rc6-related functions to intel_pm drm/i915: fix line breaks in intel_pm drm/i915: move watermarks settings into intel_pm module drm/i915: move fbc-related functionality into intel_pm module drm/i915: Refactor get_fence() to use the common fence writing routine drm/i915: Refactor fence clearing to use the common fence writing routine drm/i915: Refactor put_fence() to use the common fence writing routine drm/i915: Prepare to consolidate fence writing drm/i915: Remove the unsightly "optimisation" from flush_fence() drm/i915: Simplify fence finding drm/i915: Discard the unused obj->last_fenced_ring drm/i915: Remove unused ring->setup_seqno drm/i915: Remove fence pipelining ...
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- 01 May, 2012 5 commits
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Rafał Miłecki authored
Signed-off-by:
Rafał Miłecki <zajec5@gmail.com> Tested-by:
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Rafał Miłecki authored
If we want hdmi_offset to be relative to the first block, zero value can be used also for enabled block. Signed-off-by:
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Rafał Miłecki authored
R6xx has routable blocks, but there's nothing wrong in assignment based on dig_encoder. We didn't really need that algorithm. Signed-off-by:
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Rafał Miłecki authored
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Rafał Miłecki authored
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- 30 Apr, 2012 1 commit
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Dave Airlie authored
this fixes a report that the new load code needed to be updated for ajax's validity changes. Signed-off-by:
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- 27 Apr, 2012 15 commits
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Robert Morell authored
This helper macro retrieves the fractional part of a fixed20_12 20.12 fixed-point number. Signed-off-by:
Robert Morell <rmorell@nvidia.com> Signed-off-by:
Olof Johansson <olofj@chromium.org> Signed-off-by:
Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by:
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Alan Cox authored
Some boards such as the Intel D2700MUD allow you to have over 4GB of RAM. The GTT on the PVR based devices is 32bit however. Hugh Dickins points out that we should therefore be setting the mapping gfp mask. This is not the whole fix for the problem. Some further shmem patches will be needed to deal with the corner cases. Signed-off-by:
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Alan Cox authored
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Alan Cox authored
This provides the needed callback hooks to add hotplug display support to the GMA36x0 devices. Signed-off-by:
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Alan Cox authored
In particular clean up the errata handling and correct the crtc masks. We do this a bit differently using our device abstraction for neatness. This doesn't address the ACPI opregion and hotplug plumbing, nor the IRQ related changes that will need. It touches on backlight init but the full backlight support is not in this change set. Signed-off-by:
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Alan Cox authored
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Alan Cox authored
The problem in console mode is lack of linear memory. We can solve that by dropping to 16bpp. The mode setting X server will allocate its own GEM framebuffer in 32bpp and all will be well. We could just do 16bpp anyway but that would be a regression on the lower modes as many distributions don't yet ship the generic mode setting KMS drivers. Signed-off-by:
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Alan Cox authored
Introduce a panel presence check for Cedartrail. Non netbook devices don't necessarily have a panel attached. Signed-off-by:
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Alan Cox authored
Pull in various i915 bits that we will need to begin tackling the LVDS detect and ACPI events. We try and drift towards the i915 version of the code with the long term goal that at least some of it can one day be unified. Signed-off-by:
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Alan Cox authored
We don't want them uncached, combining will do nicely and fixes the performance problem with the generic modesetting X server. Signed-off-by:
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Alan Cox authored
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Alan Cox authored
We need to pull more stuff from the VBT in order to configure the clocking correctly in all cases. Add the relevant bits from the other CDV driver work. Signed-off-by:
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Alan Cox authored
This was reported a long time ago (and I apologize to whoever it was that reported it as I've lost the original report). Signed-off-by:
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Ian Pilcher authored
EDID vendor IDs are always 3 characters long (4 with the terminating 0). It doesn't make any sense to have a (possibly 8-byte) pointer to the ID string in the quirk structure. Signed-off-by:
Ian Pilcher <arequipeno@gmail.com> Reviewed-by:
Adam Jackson <ajax@redhat.com> Signed-off-by:
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Adam Jackson authored
Requiring the first byte of the EDID base block header to be 0 means we don't fix up as many transfer errors as we could. Instead have the callers specify whether it's meant to be block 0 or not, and conditionally run header fixup based on that. Bugzilla: https://bugzilla.redhat.com/812890Signed-off-by:
Alex Deucher <alexdeucher@gmail.com> Reviewed-by:
Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by:
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- 24 Apr, 2012 1 commit
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Matthew Garrett authored
This fixes the build breakage reported by Stephen in -next when merging the drm-next tree. Signed-off-by:
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